am33xx: Correct MMC1, remove MMC2 support

- Correct the MMC1 base offset
- Remove MMC2 (that area is reserved and not MMC2).
- Add the real BOOT_DEVICE_MMC2 value

Signed-off-by: Tom Rini <trini@ti.

am33xx: Correct MMC1, remove MMC2 support

- Correct the MMC1 base offset
- Remove MMC2 (that area is reserved and not MMC2).
- Add the real BOOT_DEVICE_MMC2 value

Signed-off-by: Tom Rini <trini@ti.com>

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i.MX28: bug fixes in PMU configuration code

Signed-off-by: Stathis Voukelatos <stathis.voukelatos@linn.co.uk>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>

MX28: Move the u-boot.bd info CPUDIR/SOCDIR

This gets us rid of duplication of the same file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <

MX28: Move the u-boot.bd info CPUDIR/SOCDIR

This gets us rid of duplication of the same file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>

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mxs: rename mx28.c to mxs.c as it is common to i.MX233 and i.MX28 SoCs

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

mxs: Clarify why we poweroff in case of brownout in 5v conflict

If VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes unreliable
but this wasn't clear on code so a comment has been added to clari

mxs: Clarify why we poweroff in case of brownout in 5v conflict

If VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes unreliable
but this wasn't clear on code so a comment has been added to clarify
it.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

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mxs: Reowork SPL to use 'mxs' prefix for methods

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

mxs: prefix register structs with 'mxs' prefix

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

mxs: prefix register acessor macros with 'mxs' prefix

As the register accessing mode is the same for all i.MXS SoCs we ought
to use 'mxs' prefix intead of 'mx28'.

Signed-off-by: Otavio Salvador <ot

mxs: prefix register acessor macros with 'mxs' prefix

As the register accessing mode is the same for all i.MXS SoCs we ought
to use 'mxs' prefix intead of 'mx28'.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

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mxs: reorganize source directory for easy sharing of code in i.MXS SoCs

Most code can be shared between i.MX23 and i.MX28 as both are from
i.MXS family; this source directory structure makes easy to

mxs: reorganize source directory for easy sharing of code in i.MXS SoCs

Most code can be shared between i.MX23 and i.MX28 as both are from
i.MXS family; this source directory structure makes easy to share code
among them.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>

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MX28: use a clear name for DDR2 initialization

The mx28 prefix has been added to the initialization data and function
so it is clear by which SoC it is used as i.MX233 will have a specific
one. Whil

MX28: use a clear name for DDR2 initialization

The mx28 prefix has been added to the initialization data and function
so it is clear by which SoC it is used as i.MX233 will have a specific
one. While on that, we also change it to static.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>

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MX28: extend print_cpuinfo() to use chip information

The information now is gathered from HW_DIGCTL_CHIPID register and
includes the chip modem and revision on the output.

Signed-off-by: Otavio Sal

MX28: extend print_cpuinfo() to use chip information

The information now is gathered from HW_DIGCTL_CHIPID register and
includes the chip modem and revision on the output.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

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imx: Use a clear identification of an unidentified CPU type

In case an unidentified CPU type is detected it now returns
i.MX??, in a const char.

Signed-off-by: Otavio Salvador <otavio@ossystems.com

imx: Use a clear identification of an unidentified CPU type

In case an unidentified CPU type is detected it now returns
i.MX??, in a const char.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>

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Enable the EMAC clock in at91_macb_hw_init().

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlema

Enable the EMAC clock in at91_macb_hw_init().

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

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arm : Atmel : add at91sam9x5ek board support

Add at91sam9x5ek board support, this board support the following SoCs
AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35

Using at91sam9x5

arm : Atmel : add at91sam9x5ek board support

Add at91sam9x5ek board support, this board support the following SoCs
AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35

Using at91sam9x5ek_nandflash to configure for the board
Now only supports NAND with software ECC boot up

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[move MAINTAINERS entry to right place]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

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DaVinci DA8xx: fix set_cpu_clk_info()

For the DA8xx family of SoCs, the set_cpu_clk_info() function was not
initialising the DSP frequency, leading to 'bdinfo' command output such as:

[...snip...

DaVinci DA8xx: fix set_cpu_clk_info()

For the DA8xx family of SoCs, the set_cpu_clk_info() function was not
initialising the DSP frequency, leading to 'bdinfo' command output such as:

[...snip...]
ARM frequency = 300 MHz
DSP frequency = -536870913 MHz
DDR frequency = 300 MHz

This commit provides a separate implementation of set_cpu_clk_info() for
the DA8xx SoCs that initialises the DSP frequency to zero (since
currently the DSP is not enabled by U-Boot on any DA8xx platform). The
separate implementation is justified because there is no common code
between DA8xx and the other SoC families. It is now much easier to
understand the flow of the two separate functions.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Hadli, Manjunath <manjunath.hadli@ti.com>
Cc: Heiko Schocher <hs@denx.de>

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DaVinci DA8xx: replace magic number for DDR speed

Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which do

DaVinci DA8xx: replace magic number for DDR speed

Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>

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dm: Move OMAP GPIO driver to drivers/gpio/

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.den

dm: Move OMAP GPIO driver to drivers/gpio/

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

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am33xx: Rework pinmux functions

- Move definition of the EEPROM contents to <asm/arch/sys_proto.h>
- Make some defines a little less generic now.
- Pinmux must be done by done by SPL now.
- Create

am33xx: Rework pinmux functions

- Move definition of the EEPROM contents to <asm/arch/sys_proto.h>
- Make some defines a little less generic now.
- Pinmux must be done by done by SPL now.
- Create 3 pinmux functions, uart0, i2c0 and board.
- Add pinmux specific to Starter Kit EVM for MMC now.

Signed-off-by: Tom Rini <trini@ti.com>

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am33xx evm: Add CONFIG_CMD_EEPROM and related

am33xx boards have at least one eeprom and in the case of beaglebones
with capes, more.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Add support for TI AM335x StarterKit EVM

- Board requires gpio0 #7 to be set to power DDR3.
- Board uses DDR3, add a way to determine which DDR type to call
config_ddr with.
- Both of the

am33xx: Add support for TI AM335x StarterKit EVM

- Board requires gpio0 #7 to be set to power DDR3.
- Board uses DDR3, add a way to determine which DDR type to call
config_ddr with.
- Both of the above require filling in the header structure early, move
it into the data section.

Signed-off-by: Tom Rini <trini@ti.com>

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am33xx: Remove board/ti/am335x/evm.c

The intention has always been (and boards are to support) an i2c EEPROM
that will identify what hardware they are, allowing a single binary to
support multiple b

am33xx: Remove board/ti/am335x/evm.c

The intention has always been (and boards are to support) an i2c EEPROM
that will identify what hardware they are, allowing a single binary to
support multiple boards. As such, remove the 'evm.c' file as there is
nothing EVM centric in it currently, only SoC peripheral configuration.

Signed-off-by: Tom Rini <trini@ti.com>

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am33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and support

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Rework config_ddr to make DDR3 support easier.

In order to support DDR3 as well as DDR2, we need to perform the same
init sequence, but with different values. So change config_ddr() to
togg

am33xx: Rework config_ddr to make DDR3 support easier.

In order to support DDR3 as well as DDR2, we need to perform the same
init sequence, but with different values. So change config_ddr() to
toggle setting pointers/etc for what DDR2 wants, and then calling.

Signed-off-by: Tom Rini <trini@ti.com>

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am33xx: Move some variables in emif4.c, mark them static.

We need vtpreg and ddrctrl but no longer need a second ddrregs.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Correct and clean up ddr_regs struct

The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry.
Correct this by documenting a missing register that will be used at some
point in

am33xx: Correct and clean up ddr_regs struct

The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry.
Correct this by documenting a missing register that will be used at some
point in the future (when write leveling is supported). Further, the
cmdNcs{force,delay} fields are undocumented and we have been setting
them to zero, remove. Next, setting of the
'DATAn_REG_PHY_USE_RANK0_DELAYS field belongs with the rest of the
ddr_data entries, so program it there. Finally, comment on how we are
configuring the DATA1 registers that correspond to the DATA0 (dt0)
registers defined in the struct.

Signed-off-by: Tom Rini <trini@ti.com>

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