| 2d61084b | 05-Aug-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Add cpu_eth_init function
This supports ethernet driver of RMOBILE R8A7740.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwama
arm: rmobile: Add cpu_eth_init function
This supports ethernet driver of RMOBILE R8A7740.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| 62d0b6ba | 20-Jul-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Add support PFC of Renesas R8A7740
Renesas R8A7740 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel.
Signed-off-by: Hideyuki Sano <h
arm: rmobile: Add support PFC of Renesas R8A7740
Renesas R8A7740 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel.
Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| cfa291b7 | 20-Jul-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Add support Renesas R8A7740
Renesas R8A7740 is CPU with Cortex-A9. This supports the basic register definition and GPIO.
Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Si
arm: rmobile: Add support Renesas R8A7740
Renesas R8A7740 is CPU with Cortex-A9. This supports the basic register definition and GPIO.
Signed-off-by: Hideyuki Sano <hideyuki.sano.dn@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| 2c541df9 | 03-Aug-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Add support TMU base timer function
Some rmobile SoC has TMU base timer function. This supports TMU.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by:
arm: rmobile: Add support TMU base timer function
Some rmobile SoC has TMU base timer function. This supports TMU.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| 2f7ea5b0 | 25-Jul-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Change initializing ICCICR register
There is rmobile without ICCICR. ICCICR is initialized only when ICCICR is defined.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.
arm: rmobile: Change initializing ICCICR register
There is rmobile without ICCICR. ICCICR is initialized only when ICCICR is defined.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| 4f007b83 | 25-Jul-2012 |
Tetsuyuki Kobayashi <koba@kmckk.co.jp> |
arm: rmobile: kzm9g: separate cpu_rev to integer and fraction
According to SoC document, revision info is separated to integer part and fracton part. So I separete rmobile_get_cpu_rev() to rmobile_g
arm: rmobile: kzm9g: separate cpu_rev to integer and fraction
According to SoC document, revision info is separated to integer part and fracton part. So I separete rmobile_get_cpu_rev() to rmobile_get_cpu_rev_integer() and rmobile_get_cpu_rev_fraction().
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| 170cc96f | 25-Jul-2012 |
Tetsuyuki Kobayashi <koba@kmckk.co.jp> |
arm: rmobile: kzm9g: fix CPU info
CPU info register was read wrongly by mistake. And function rmobile_get_cpu_rev() was not called properly.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Si
arm: rmobile: kzm9g: fix CPU info
CPU info register was read wrongly by mistake. And function rmobile_get_cpu_rev() was not called properly.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| c7ee8a50 | 05-Jul-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Support build with gcc-4.6 or later
Latest rmobile code was tested by using old gcc (gcc-4.4). When we use gcc-4.6 (or later), the build is made, but does not work. This solves a probl
arm: rmobile: Support build with gcc-4.6 or later
Latest rmobile code was tested by using old gcc (gcc-4.4). When we use gcc-4.6 (or later), the build is made, but does not work. This solves a problem not to work by add -march=armv5 to compiple option when we built in gcc-4.6 (or later). I tested by linaro's compiler version 2012.04-20120426.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| b045a237 | 20-Jul-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Add support PFC of Renesas SH73A0
Renesas SH73A0 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel.
Signed-off-by: Nobuhiro Iwamatsu
arm: rmobile: Add support PFC of Renesas SH73A0
Renesas SH73A0 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| 1cdf2482 | 19-Aug-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Add support Renesas SH73A0
Renesas SH73A0 is CPU with Cortex-A9. This supports the basic register definition and GPIO.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.c
arm: rmobile: Add support Renesas SH73A0
Renesas SH73A0 is CPU with Cortex-A9. This supports the basic register definition and GPIO.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| 4fb44e22 | 13-Jun-2012 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Add basic support for Renesas R-Mobile
This patch adds minimum support for R-Mobile. Only minimal support with timer. This CPU can uses the peripheral of Renesas SuperH.
Signed-off-by
arm: rmobile: Add basic support for Renesas R-Mobile
This patch adds minimum support for R-Mobile. Only minimal support with timer. This CPU can uses the peripheral of Renesas SuperH.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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| 90207b62 | 18-Sep-2012 |
Joel A Fernandes <joelagnel@ti.com> |
am33xx: Fix fetching of mmc1 bootmode from bootrom for AM33XX
U-boot should not ignore getting the bootmode passed on from the bootrom. With this, U-boot SPL knows it was loaded from MMC1 and use th
am33xx: Fix fetching of mmc1 bootmode from bootrom for AM33XX
U-boot should not ignore getting the bootmode passed on from the bootrom. With this, U-boot SPL knows it was loaded from MMC1 and use this info to read full U-boot from MMC1 as well.
Cc: pprakash@ti.com Cc: trini@ti.com Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
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| cec2655c | 27-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-net |
| 3f7f2414 | 14-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORK
- Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add s
ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORK
- Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add spl_boot_device() that returns the statically chosen boot device.
Signed-off-by: Tom Rini <trini@ti.com>
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| d97b4ce8 | 14-Aug-2012 |
Tom Rini <trini@ti.com> |
SPL: NAND: Move arch/arm/cpu/armv7/omap-common/spl_nand.c to common/spl
We move the spl_nand_load_image function to common/spl. This will allow for easier integration of SPL-boots-Linux code on oth
SPL: NAND: Move arch/arm/cpu/armv7/omap-common/spl_nand.c to common/spl
We move the spl_nand_load_image function to common/spl. This will allow for easier integration of SPL-boots-Linux code on other arches.
Signed-off-by: Tom Rini <trini@ti.com>
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| 6507f133 | 22-Aug-2012 |
Tom Rini <trini@ti.com> |
SPL: Create arch/arm/lib/spl.c for board_init_f and jump_to_image_linux
In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer, clear the BSS and call board_init_r. We mark this as
SPL: Create arch/arm/lib/spl.c for board_init_f and jump_to_image_linux
In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer, clear the BSS and call board_init_r. We mark this as weak as some platforms may need to perform additional initalization at this point. We provide a gd that we know will be in a usable location, once the BSS has been cleared to help with this as well. Finally, we no longer call relocate_code so remove that from the armv7 version.
Next, both board_init_f and jump_to_image_linux are going to be inherently arch-specific, so move these versions to arch/arm/lib/spl.c
Signed-off-by: Tom Rini <trini@ti.com>
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| 47f7bcae | 13-Aug-2012 |
Tom Rini <trini@ti.com> |
SPL: Move the omap SPL framework to common/spl
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL framework, enable on all of the previously using boards. We move the spl_ymodem.c
SPL: Move the omap SPL framework to common/spl
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL framework, enable on all of the previously using boards. We move the spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave the NAND one in-place as we plan to replace it later in this series.
We use common/spl to avoid linker problems with respect to merging constant strings in objects. Otherwise all strings in common/ will be linked in and kept which grows SPL in size too much.
Signed-off-by: Tom Rini <trini@ti.com>
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| d7cb93b2 | 14-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Move gpmc_init() to spl_board_init()
This is an OMAP/related-specific function, move calling it to spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that enabled NAND and di
ARM: SPL: Move gpmc_init() to spl_board_init()
This is an OMAP/related-specific function, move calling it to spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that enabled NAND and didn't enable this already.
Signed-off-by: Tom Rini <trini@ti.com>
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| d4c4e0e1 | 14-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Start hooking in the current SPI SPL support
Signed-off-by: Tom Rini <trini@ti.com> |
| 026b2fe3 | 14-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Clean up spl.c / spl_nand.c slightly
- Remove includes we don't need - Switch some printf statements to puts - Convert some printf statements to debug, introduce new puts statements - In
ARM: SPL: Clean up spl.c / spl_nand.c slightly
- Remove includes we don't need - Switch some printf statements to puts - Convert some printf statements to debug, introduce new puts statements - In most cases saying just "No mkimage signature, assuming u-boot.bin" or similar is sufficient. This also means the non-DEBUG case doesn't need printf, in the core of SPL. - The other case here is that PLAIN_VERSION provided what we wanted already, so just use it.
Signed-off-by: Tom Rini <trini@ti.com>
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| f0881250 | 14-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Make spl_mmc.c more generic
Move the default omap/related-centric board_mmc_init to arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines to <asm/spl.h>. Also use mmc->re
ARM: SPL: Make spl_mmc.c more generic
Move the default omap/related-centric board_mmc_init to arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines to <asm/spl.h>. Also use mmc->read_bl_len rather than MMCSD_SECTOR_SIZE
Signed-off-by: Tom Rini <trini@ti.com>
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| 55cdbb8d | 14-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>
Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK.
Signed-
ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>
Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK.
Signed-off-by: Tom Rini <trini@ti.com>
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| 24dafad5 | 13-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Only call mem_malloc_init if configured
We can only attempt to setup a malloc pool if CONFIG_SYS_SPL_MALLOC_START is defined, and not all boards require it. Make the call depend on the def
ARM: SPL: Only call mem_malloc_init if configured
We can only attempt to setup a malloc pool if CONFIG_SYS_SPL_MALLOC_START is defined, and not all boards require it. Make the call depend on the define.
Signed-off-by: Tom Rini <trini@ti.com>
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| 8082fda9 | 13-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Remove NAND_MODE_HW_ECC from spl_nand.c
This detection code doesn't (and can't) do anything currently, so remove.
Signed-off-by: Tom Rini <trini@ti.com> |
| 37189a19 | 14-Aug-2012 |
Tom Rini <trini@ti.com> |
ARM: SPL: Rename omap_boot_mode to spl_boot_mode()
Signed-off-by: Tom Rini <trini@ti.com> |