| c3d2c24f | 05-Apr-2013 |
Tom Rini <trini@ti.com> |
OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC
In the case of booting from certain peripherals, such as UART, we must not see what the device descriptor says for RAW or FAT mode because
OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC
In the case of booting from certain peripherals, such as UART, we must not see what the device descriptor says for RAW or FAT mode because in addition to being nonsensical, it leads to a hang. This is why we have a test currently for the boot mode being within range. The problem however is that on some platforms we get MMC2_2 as the boot mode and not the defined value for MMC2, and in others we get the value for MMC2_2. This is required to fix eMMC booting on omap5_uevm.
Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC).
Signed-off-by: Tom Rini <trini@ti.com>
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| d3d82e9f | 04-Apr-2013 |
Lokesh Vutla <lokeshvutla@ti.com> |
arm: omap4: Fix SDRAM AUTO DETECTION
Commit "8602114 omap: emif: configure emif only when required" breaks SDRAM_AUTO_DETECTION. The issue is dmm_init() depends on emif_sizes[](SDRAM Auto detection)
arm: omap4: Fix SDRAM AUTO DETECTION
Commit "8602114 omap: emif: configure emif only when required" breaks SDRAM_AUTO_DETECTION. The issue is dmm_init() depends on emif_sizes[](SDRAM Auto detection) done in do_sdram_init(). The above commit moves dmm_init() above do_sdram_init() because of which dmm_init() uses uninitialized emif_sizes[]. So instead of using global emif_sizes[], get sdram details locally and calculate emif sizes.
Reported-by: Michael Cashwell <mboards@prograde.net> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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| a8f408a8 | 04-Apr-2013 |
Lubomir Popov <lpopov@mm-sol.com> |
OMAP: Fix copy-paste bug that did not enable UART4 clock
V2 fixes line wrap issue of the patch itself.
UART3 was enabled twice instead of UART4.
One more cosmetic change in a comment on EMIF clock
OMAP: Fix copy-paste bug that did not enable UART4 clock
V2 fixes line wrap issue of the patch itself.
UART3 was enabled twice instead of UART4.
One more cosmetic change in a comment on EMIF clock.
Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Reviewed-by: R Sricharan <r.sricharan@ti.com>
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| d1da76e9 | 03-Apr-2013 |
Hunter, Jon <jon-hunter@ti.com> |
omap2420-h4: Fix get_timer() and CONFIG_SYS_HZ
The function get_timer() should return time in ms and CONFIG_SYS_HZ should be set to 1000 by default. Fix both of these items.
Signed-off-by: Jon Hunt
omap2420-h4: Fix get_timer() and CONFIG_SYS_HZ
The function get_timer() should return time in ms and CONFIG_SYS_HZ should be set to 1000 by default. Fix both of these items.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
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| da634ae3 | 04-Apr-2013 |
Andreas Bießmann <andreas.devel@googlemail.com> |
omap_gpmc: change nandecc command
With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bi
omap_gpmc: change nandecc command
With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend.
In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
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| 5bf299bc | 02-Apr-2013 |
Andreas Bießmann <andreas.devel@googlemail.com> |
asm/omap_gpmc.h: consolidate common defines
arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new
asm/omap_gpmc.h: consolidate common defines
arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new header.
Introduce a new asm/omap_gpmc.h which defines the command part and pulls in the architecture specific one.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
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| 5aa014d6 | 03-Apr-2013 |
Tom Rini <trini@ti.com> |
am335x: Enable MMC1 clock
We must not assume ROM has enabled the clock for MMC1.
Reported-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Peter Korsgaard
am335x: Enable MMC1 clock
We must not assume ROM has enabled the clock for MMC1.
Reported-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
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| fed029f3 | 04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' |
| be08abc2 | 04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' |
| 5eaa2156 | 27-Mar-2013 |
Stephen Warren <swarren@wwwdotorg.org> |
ARM: bcm2835: fix get_timer() to return ms
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer driver to conform to this.
Have the timer implementation export a custom API get_ti
ARM: bcm2835: fix get_timer() to return ms
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer driver to conform to this.
Have the timer implementation export a custom API get_timer_us() for use by the BCM2835 MMC API, which needs us resolution for a HW workaround.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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| 38e70077 | 27-Mar-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx6: Fix get_board_rev() for the mx6 solo case
When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev() returns 0x62xxx, which is not a value understood by the VPU (Video Proc
mx6: Fix get_board_rev() for the mx6 solo case
When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev() returns 0x62xxx, which is not a value understood by the VPU (Video Processing Unit) library in the kernel and causes the video playback to fail.
The expected values for get_board_rev are: 0x63xxx: For mx6quad/dual 0x61xxx: For mx6dual-lite/solo
So adjust get_board_rev() accordingly and make it as weak function, so that we do not need to define it in every mx6 board file.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
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| 472d5460 | 01-Apr-2013 |
York Sun <yorksun@freescale.com> |
Consolidate bool type
'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99.
All other #define, typedef
Consolidate bool type
'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99.
All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0.
Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files.
Signed-off-by: York Sun <yorksun@freescale.com>
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| 07cd5c74 | 28-Mar-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos: pwm: Remove dead code of function exynos5_get_pwm_clk
As we shall now be using clock_get_periph_rate function. We find no reason for keeping code in function exynos5_get_pwm_clk. Hence, remo
Exynos: pwm: Remove dead code of function exynos5_get_pwm_clk
As we shall now be using clock_get_periph_rate function. We find no reason for keeping code in function exynos5_get_pwm_clk. Hence, removing it.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| e2338704 | 28-Mar-2013 |
Padmavathi Venna <padma.v@samsung.com> |
Exynos: pwm: Use generic api to get pwm clk freq
Use generic api to get the pwm clock frequency
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes a
Exynos: pwm: Use generic api to get pwm clk freq
Use generic api to get the pwm clock frequency
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 12a46a38 | 28-Mar-2013 |
Padmavathi Venna <padma.v@samsung.com> |
Exynos: clock: Add generic api to get the clk freq
Add generic api to get the frequency of the required peripherial. This API gets the source clock frequency and returns the required frequency by di
Exynos: clock: Add generic api to get the clk freq
Add generic api to get the frequency of the required peripherial. This API gets the source clock frequency and returns the required frequency by dividing with first and second dividers based on the requirement.
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 92809eee | 28-Mar-2013 |
Gabe Black <gabeblack@google.com> |
Exynos: Tidy up the pwm_config function in the exynos pwm driver
Some small fixes in the exynos pwm driver:
1. NS_IN_HZ is non-sensical since these are not compatible units. This constant actually
Exynos: Tidy up the pwm_config function in the exynos pwm driver
Some small fixes in the exynos pwm driver:
1. NS_IN_HZ is non-sensical since these are not compatible units. This constant actually describes the number of nanoseconds in a second. Renamed it to NS_IN_SEC. Also dropped the unnecessary parenthesis. 2. The variable "period" is not used to hold a period, it's used to hold a frequency. Renamed it to "frequency". 3. tcmp is an unsigned value, so (tcmp < 0) will never be true and the if which checks that condition will never execute. Also, there should be no problem if the pwm never switches, so there's no reason to subtract one from tcmp and therefore no reason to compare it against zero. Removed both ifs. If they weren't removed, tcmp should be a signed value. 4. Add a check for a 0 period.
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly.
Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 34b5ee1f | 28-Mar-2013 |
Gabe Black <gabeblack@google.com> |
Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4
The pwm_config function in the exynos pwm driver divides by its period period parameter. A function was calling pwm_config wi
Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4
The pwm_config function in the exynos pwm driver divides by its period period parameter. A function was calling pwm_config with a 0ns period and a 0ns duty cycle. That doesn't actually make any sense physically, and results in a divide by zero in the driver. This change changes the parameters to be a 100000ns period and duty cycle.
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly.
Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| c059f274 | 28-Mar-2013 |
Gabe Black <gabeblack@google.com> |
Exynos: pwm: Fix two bugs in the exynos pwm configuration code
First, the "div" value was being used incorrectly to compute the frequency of the PWM timer. The value passed in is a constant which re
Exynos: pwm: Fix two bugs in the exynos pwm configuration code
First, the "div" value was being used incorrectly to compute the frequency of the PWM timer. The value passed in is a constant which reflects the value that would be found in a configuration register, 0 to 4. That should correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was being used instead.
Second, the reset value of the timers were being calculated to give an overall frequency, thrown out, and set to a maximum value. This was done so that PWM 4 could be used as the system clock by counting down from a high value, but it was applied indiscriminantly. It should at most be applied only to PWM 4.
This change also takes the opportunity to tidy up the pwm_init function.
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly.
Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| f24869d3 | 28-Mar-2013 |
Che-Liang Chiou <clchiou@chromium.org> |
Exynos: Add timer_get_us function
timer_get_us returns the time in microseconds since a certain reference point of history. However, it does not guarantee to return an accurate time after a long pe
Exynos: Add timer_get_us function
timer_get_us returns the time in microseconds since a certain reference point of history. However, it does not guarantee to return an accurate time after a long period; instead, it wraps around (that is, the reference point is reset to some other point of history) after some periods. The frequency of wrapping around is about an hour (or 2^32 microseconds).
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 3d00c0cb | 28-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Exynos: Change get_timer() to work correctly
At present get_timer() does not return sane values. It should count up smoothly in milliscond intervals.
We can change the PWM to count down at 1MHz, pr
Exynos: Change get_timer() to work correctly
At present get_timer() does not return sane values. It should count up smoothly in milliscond intervals.
We can change the PWM to count down at 1MHz, providing a resolution of 1us and a range of about an hour between required get_timer() calls.
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| d0f34f10 | 29-Mar-2013 |
Anatolij Gustschin <agust@denx.de> |
Merge branch 'for-v2013.04'
Conflicts: drivers/video/Makefile
Signed-off-by: Anatolij Gustschin <agust@denx.de> |
| d53e340e | 15-Mar-2013 |
Vincent Stehlé <v-stehle@ti.com> |
armv7: do not relocate _start twice
The _start symbol is already relocated, so do not add the relocation the second time in c_runtime_cpu_setup.
This fixes e.g. the abort exception handling path, w
armv7: do not relocate _start twice
The _start symbol is already relocated, so do not add the relocation the second time in c_runtime_cpu_setup.
This fixes e.g. the abort exception handling path, which ended in double fault due to bad address in VBAR.
Signed-off-by: Vincent Stehlé <v-stehle@ti.com> Reported-by: Lubomir Popov <lpopov@mm-sol.com>
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| de63ac27 | 04-Mar-2013 |
R Sricharan <r.sricharan@ti.com> |
ARM: mmu: Set domain permissions to client access
The 'XN' execute never bit is set in the pagetables. This will prevent speculative prefetches to non executable regions. But the domain permissio
ARM: mmu: Set domain permissions to client access
The 'XN' execute never bit is set in the pagetables. This will prevent speculative prefetches to non executable regions. But the domain permissions are set as master in the DACR register. So the pagetable attribute for 'XN' is not effective. Change the permissions to client.
This fixes lot of speculative prefetch aborts seen on OMAP5 secure devices.
Signed-off-by: R Sricharan <r.sricharan@ti.com> Tested-by: Vincent Stehle <v-stehle@ti.com> Cc: Vincent Stehle <v-stehle@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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| 7ee68fe8 | 29-Nov-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: Add L2 Cache Support.
This patch set adds L2 Cache Support to EXYNOS.
Signed-off-by: Arun Mankuzhi <arun.m@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by
EXYNOS5: Add L2 Cache Support.
This patch set adds L2 Cache Support to EXYNOS.
Signed-off-by: Arun Mankuzhi <arun.m@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 412665b4 | 26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' |