ARM: refactor compiler options in config.mk

Every ARM cpu config.mk (arch/arm/cpu/{CPUDIR}/config.mk) defines:

PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float

So, this patch moves the com

ARM: refactor compiler options in config.mk

Every ARM cpu config.mk (arch/arm/cpu/{CPUDIR}/config.mk) defines:

PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float

So, this patch moves the common compiler options to arch/arm/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

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arm: zynq: Fix timer loadaddress

Reload address was written to the counter register
instead of load register.
The problem happens when timer expires but never
reload to ~0UL (it is downcount timer).

arm: zynq: Fix timer loadaddress

Reload address was written to the counter register
instead of load register.
The problem happens when timer expires but never
reload to ~0UL (it is downcount timer).

Reported-by: Stephen MacMahon <stephenm@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM: OMAP5: Avoid writing into LDO SRAM bits

Writing magic bits into LDO SRAM was suggested only for OMAP5432
ES1.0. Now these are no longer applicable. Moreover these bits should
not be overwritten

ARM: OMAP5: Avoid writing into LDO SRAM bits

Writing magic bits into LDO SRAM was suggested only for OMAP5432
ES1.0. Now these are no longer applicable. Moreover these bits should
not be overwritten as they are loaded from EFUSE. So avoid
writing into these registers.

Boot tested on OMAP5432 ES2.0

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

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am335x:Handle worst case scenario for Errata 1.0.24

In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop

am335x:Handle worst case scenario for Errata 1.0.24

In Errata 1.0.24, if the board is running at OPP50 and has a warm reset,
the boot ROM sets the frequencies for OPP100. This patch attempts to
drop the frequencies back to OPP50 as soon as possible in the SPL. Then
later the voltages and frequencies up set higher.

Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
[trini: Adapt to current framework]
Signed-off-by: Tom Rini <trini@ti.com>

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am335x_evm: am33xx_spl_board_init function and scale core frequency

Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we se

am335x_evm: am33xx_spl_board_init function and scale core frequency

Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed. In the
case of Beaglebone White, we need to make sure we are on AC power, and
are on later than rev A1, and then we can ramp up to the PG1.0 maximum
of 720Mhz. In the case of Beaglebone Black, we are either on PG2.0 that
supports 1GHz or PG2.1. As PG2.0 may or may not have efuse_sma set, we
cannot rely on this probe. In the case of the GP EVM, EVM SK and IDK we
need to rely on the efuse_sma if we are on PG2.1, and the defaults for
PG1.0/2.0.

Signed-off-by: Tom Rini <trini@ti.com>

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mx6slevk: Add Ethernet support

mx6slevk has a SMSC8720 connected in RMII mode.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

am33xx: Add am33xx_spl_board_init function, call

We need to allow for a further call-out in spl_board_init. Call this
am33xx_spl_board_init and add a __weak version. This function may be
used to s

am33xx: Add am33xx_spl_board_init function, call

We need to allow for a further call-out in spl_board_init. Call this
am33xx_spl_board_init and add a __weak version. This function may be
used to scale the MPU frequency up, depending on board needs.

Signed-off-by: Tom Rini <trini@ti.com>

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Cosmetic: Fix a number of typos, no functional changes.

Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.

Signed-off-by

Cosmetic: Fix a number of typos, no functional changes.

Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>

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ARM: s3c44b0: remove remainders of dead board

Because commit 5dc5f36 removed B2 board support,
arch/arm/cpu/s3c44b0/* and arch/arm/include/asm/arch-s3c44b0/*
are not necessary anymore.

Signed-off-b

ARM: s3c44b0: remove remainders of dead board

Because commit 5dc5f36 removed B2 board support,
arch/arm/cpu/s3c44b0/* and arch/arm/include/asm/arch-s3c44b0/*
are not necessary anymore.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>

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mx27: add missing constant for mx27

Add some missing constant (chip select, ...)

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
Acked-by:

mx27: add missing constant for mx27

Add some missing constant (chip select, ...)

Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Signed-off-by: Eric Jarrige <eric.jarrige@armadeus.org>
Acked-by: Stefano Babic <sbabic@denx.de>

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ARM: mxs: Receive r0 and r1 passed from BootROM

Make sure value in register r0 and r1 is preserved and passed to
the board_init_ll() and mxs_common_spl_init() where it can be
processed further. The

ARM: mxs: Receive r0 and r1 passed from BootROM

Make sure value in register r0 and r1 is preserved and passed to
the board_init_ll() and mxs_common_spl_init() where it can be
processed further. The value in r0 can be configured during the
BootStream generation to arbitary value, r1 contains pointer to
return value from CALL'd function.

This patch also clears the value in r0 before returning to BootROM
to make sure the BootROM is not confused by this value.

Finally, this patch cleans up some comments in the start.S file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>

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ARM: mxs: Document the power block initialization

This patch adds documentation for the functions used during the
initialization of MXS power block.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: F

ARM: mxs: Document the power block initialization

This patch adds documentation for the functions used during the
initialization of MXS power block.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>

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mx6: Fix calculation of emi_slow clock rate

This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0,
that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSE

mx6: Fix calculation of emi_slow clock rate

This is porting of Freescale's patch from version imx_v2009.08_3.0.35_4.0.0,
that fixes the obvious mistype of bits offset macro name (ACLK_EMI_PODF_OFFSET
was used instead of ACLK_EMI_SLOW_PODF_OFFSET).

Using the occasion, change the variable name 'emi_slow_pof' to more consistent
'emi_slow_podf'.

Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>

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socfpga: Creating driver for Reset Manager

Consolidating reset code into reset_manager.c. Also
separating reset configuration for virtual target and
real hardware Cyclone V development kit

Signed-o

socfpga: Creating driver for Reset Manager

Consolidating reset code into reset_manager.c. Also
separating reset configuration for virtual target and
real hardware Cyclone V development kit

Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>

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arm: lds: Remove libgcc eabi exception handling tables

Remove ARM eabi exception handling tables (for frame unwinding).
AFAICT, u-boot stubs away the frame unwiding routines, so the tables will
more

arm: lds: Remove libgcc eabi exception handling tables

Remove ARM eabi exception handling tables (for frame unwinding).
AFAICT, u-boot stubs away the frame unwiding routines, so the tables will
more or less just consume space. It should be OK to remove them.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Conflicts:
drivers/serial/serial.c

The conflict above was a trivial case of adding one init
function in each branch, and manually resolved

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

Conflicts:
drivers/serial/serial.c

The conflict above was a trivial case of adding one init
function in each branch, and manually resolved in merge.

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Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'

Merge 'u-boot-microblaze/zynq' into (u-boot-arm/master'

Conflicts:
arch/arm/include/asm/arch-zynq/hardware.h

The conflict above was trivial and solved during merge.

i.MX6: Set and clear the gating bits for Phase Fractional Dividers

This addresses silicon errata ERR006282 as described in this
document:
https://community.freescale.com/docs/DOC-94581

Also implem

i.MX6: Set and clear the gating bits for Phase Fractional Dividers

This addresses silicon errata ERR006282 as described in this
document:
https://community.freescale.com/docs/DOC-94581

Also implemented in Freescale's 2009.08-based release:

http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/
Commit id: b7c5badf94ffbe6cd0845efbb75e16e05e3af404

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>

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ARM: mxs: rename function that sets AUTO_RESTART flag

The AUTO_RESTART flag of HW_RTC_PERSISTENT0 register will
power up the chip automatically 180ms after power down.
This bit must be enabled by th

ARM: mxs: rename function that sets AUTO_RESTART flag

The AUTO_RESTART flag of HW_RTC_PERSISTENT0 register will
power up the chip automatically 180ms after power down.
This bit must be enabled by the boot loader to ensure the
target can start upon hardware reset or watchdog reset
even when powered from a battery.

Currently the function named 'mxs_power_clear_auto_restart()'
is setting this flag although the 'clear' in its name suggest
the opposite.

This patch renames the function to 'mxs_power_set_auto_restart()'
and removes the comment about EVK revision A which was confusing
because the function indeed was setting the flag.

Signed-off-by: Hector Palacios <hector.palacios@digi.com>

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ARM: mxs: tools: Add mkimage support for MXS bootstream

Add mkimage support for generating and verifying MXS bootstream.
The implementation here is mostly a glue code between MXSSB v0.4
and mkimage,

ARM: mxs: tools: Add mkimage support for MXS bootstream

Add mkimage support for generating and verifying MXS bootstream.
The implementation here is mostly a glue code between MXSSB v0.4
and mkimage, but the long-term goal is to rectify this and merge
MXSSB with mkimage more tightly. Once this code is properly in
U-Boot, MXSSB shall be deprecated in favor of mkimage-mxsimage
support.

Note that the mxsimage generator needs libcrypto from OpenSSL, I
therefore enabled the libcrypto/libssl unconditionally.

MXSSB: http://git.denx.de/?p=mxssb.git;a=summary

The code is based on research presented at:
http://www.rockbox.org/wiki/SbFileFormat

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>

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imx: add status reporting for HAB status

Add functions to report the HAB (High Assurance Boot) status
of e.g. i.MX6 CPUs.

This is taken from

git://git.freescale.com/imx/uboot-imx.git branch imx_v2

imx: add status reporting for HAB status

Add functions to report the HAB (High Assurance Boot) status
of e.g. i.MX6 CPUs.

This is taken from

git://git.freescale.com/imx/uboot-imx.git branch imx_v2009.08_3.0.35_4.0.0
cpu/arm_cortexa8/mx6/generic.c
include/asm-arm/arch-mx6/mx6_secure.h

Signed-off-by: Stefano Babic <sbabic@denx.de>

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arm: omap3: fix SRAM copy and execution sequence

Fix size calculation in copy of go_to_speed into SRAM.
Use SRAM_CLK_CODE in call to SRAM-based go_to_speed.

Signed-off-by: Albert ARIBAUD <albert.u.

arm: omap3: fix SRAM copy and execution sequence

Fix size calculation in copy of go_to_speed into SRAM.
Use SRAM_CLK_CODE in call to SRAM-based go_to_speed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

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ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration

OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
This memory has 4Gb x 2CS = 8Gb configuration.
Add configuration for runtime calculat

ARM: OMAP4470: Add Elpida EDB8164B3PF memory configuration

OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board.
This memory has 4Gb x 2CS = 8Gb configuration.
Add configuration for runtime calculation and precalculated cases.

Patch is based on a draft Lubomir's patch [1].

[1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
[taras@ti.com: cleaned up patch and fixed precalculated values]
Signed-off-by: Taras Kondratiuk <taras@ti.com>

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