| d12010b0 | 23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: am33xx: Provide platform data for GPIOs
Provide suitable platform data for am33xx boards, so that these boards can
use driver model for GPIO access.
Signed-off-by: Simon Glass <sjg@chromium.org
dm: am33xx: Provide platform data for GPIOs
Provide suitable platform data for am33xx boards, so that these boards can
use driver model for GPIO access.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
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| 03a3536c | 23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-tegra |
| 45ccec8f | 23-Oct-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig
The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE
kconfig: move CONFIG_USE_PRIVATE_LIBGCC to Kconfig
The private libgcc is supported only on ARM, MIPS, PowerPC, SH, x86.
Those architectures should "select" HAVE_PRIVATE_LIBGCC and
CONFIG_USE_PRIVATE_LIBGCC should depend on it.
Currently, this option is enabled on Tegra boards and x86 architecture.
Move the definition from header files to Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
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| 52edc877 | 21-Oct-2014 |
Igor Grinberg <grinberg@compulab.co.il> |
omap3: Kconfig: fix the cm-t35 board option prompt
The cm-t35 board support covers both cm-t3530 and cm-t3730 boards.
Mention both boards in the Kconfig option prompt.
Signed-off-by: Igor Grinberg
omap3: Kconfig: fix the cm-t35 board option prompt
The cm-t35 board support covers both cm-t3530 and cm-t3730 boards.
Mention both boards in the Kconfig option prompt.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
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|
| 26459488 | 22-Oct-2014 |
Hao Zhang <hzhang@ti.com> |
ARM: keystone: cmd_ddr3: add ddr3 commands to test ddr
Add ddr3 commands:
test <start_addr in hex> <end_addr in hex> - test DDR from start\n
address to end address\n
ddr compare <start_addr in hex
ARM: keystone: cmd_ddr3: add ddr3 commands to test ddr
Add ddr3 commands:
test <start_addr in hex> <end_addr in hex> - test DDR from start\n
address to end address\n
ddr compare <start_addr in hex> <end_addr in hex> <size in hex> -\n
compare DDR data of (size) bytes from start address to end
address\n
ddr ecc_err <addr in hex> <bit_err in hex> - generate bit errors\n
in DDR data at <addr>, the command will read a 32-bit data\n
from <addr>, and write (data ^ bit_err) back to <addr>\n
Delete CONFIG_MAX_UBOOT_MEM_SIZE, as it was supposed to be used
for ddr3 commands and for now it's not needed any more.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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|
| 89f44bb0 | 22-Oct-2014 |
Vitaly Andrianov <vitalya@ti.com> |
keystone2: ecc: add ddr3 error detection and correction support
This patch adds the DDR3 ECC support to enable ECC in the DDR3
EMIF controller for Keystone II devices.
By default, ECC will only be
keystone2: ecc: add ddr3 error detection and correction support
This patch adds the DDR3 ECC support to enable ECC in the DDR3
EMIF controller for Keystone II devices.
By default, ECC will only be enabled if RMW is supported in the
DDR EMIF controller. The entire DDR memory will be scrubbed to
zero using an EDMA channel after ECC is enabled and before
u-boot is re-located to DDR memory.
An ecc_test environment variable is added for ECC testing.
If ecc_test is set to 0, a detection of 2-bit error will reset
the device, if ecc_test is set to 1, 2-bit error detection
will not reset the device, user can still boot the kernel to
check the ECC error handling in kernel.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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| 079da2d5 | 22-Oct-2014 |
Vitaly Andrianov <vitalya@ti.com> |
ARM: keystone: msmc: extend functionality of SES
Add functions to set/get SES PMAX values of Pivilege ID pair.
Also add msmc module definitions.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Sig
ARM: keystone: msmc: extend functionality of SES
Add functions to set/get SES PMAX values of Pivilege ID pair.
Also add msmc module definitions.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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|
| 69a3b811 | 17-Oct-2014 |
Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> |
ARM: keystone: clock: add support for K2E SoCs
For K2E and K2L SoCs clock output from PASS PLL has to be enabled
after NETCP domain and PA module are enabled. So create new function
for that and cal
ARM: keystone: clock: add support for K2E SoCs
For K2E and K2L SoCs clock output from PASS PLL has to be enabled
after NETCP domain and PA module are enabled. So create new function
for that and call it after PA module is enabled.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
show more ...
|
| 345af534 | 22-Oct-2014 |
Hao Zhang <hzhang@ti.com> |
keystone2: k2l-evm: add board support
This patch adds Keystone II Lammar (K2L) EVM board support.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by:
keystone2: k2l-evm: add board support
This patch adds Keystone II Lammar (K2L) EVM board support.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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|
| b66604fb | 22-Oct-2014 |
Hao Zhang <hzhang@ti.com> |
keystone2: enable OSR clock domain for K2L SoC
This patches enables the On-chip Shared Ram clock domain for K2L SoC.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.kh
keystone2: enable OSR clock domain for K2L SoC
This patches enables the On-chip Shared Ram clock domain for K2L SoC.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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|
| 5ec66b14 | 22-Oct-2014 |
Hao Zhang <hzhang@ti.com> |
ARM: keystone2: spl: move board specific code
The initialization of PLLs is a part of board specific code, so
move it appropriate places.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by:
ARM: keystone2: spl: move board specific code
The initialization of PLLs is a part of board specific code, so
move it appropriate places.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
show more ...
|
| bc45d572 | 22-Oct-2014 |
Hao Zhang <hzhang@ti.com> |
keystone2: msmc: add MSMC cache coherency support for K2L SOC
This patch adds Keystone II Lamar (K2L) SoC specific definitions
to support MSMC cache coherency.
Acked-by: Vitaly Andrianov <vitalya@t
keystone2: msmc: add MSMC cache coherency support for K2L SOC
This patch adds Keystone II Lamar (K2L) SoC specific definitions
to support MSMC cache coherency.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
show more ...
|
| 61d12258 | 22-Oct-2014 |
Hao Zhang <hzhang@ti.com> |
keystone2: clock: add K2L clock definitions and commands
This patch adds clock definitions and commands to support Keystone II
K2L SOC.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ha
keystone2: clock: add K2L clock definitions and commands
This patch adds clock definitions and commands to support Keystone II
K2L SOC.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
show more ...
|
| 529ce1ee | 22-Oct-2014 |
Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> |
ARM: cmd_clock: generalize command usage description
The usage description of commands refers to headers of sources,
that is not correct. This patch is intended to fix it.
Also generalize code in or
ARM: cmd_clock: generalize command usage description
The usage description of commands refers to headers of sources,
that is not correct. This patch is intended to fix it.
Also generalize code in order to reduce SoC dependent #ifdefs.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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|
| ef454717 | 05-Sep-2014 |
Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> |
dma: keystone_nav: move keystone_nav driver to driver/dma/
The keystone_nav is used by drivers/net/keystone_net.c driver to
send and receive packets, but currently it's placed at keystone
arch sourc
dma: keystone_nav: move keystone_nav driver to driver/dma/
The keystone_nav is used by drivers/net/keystone_net.c driver to
send and receive packets, but currently it's placed at keystone
arch sources. So it should be in the drivers directory also.
It's separate driver that can be used for sending and receiving
pktdma packets by others drivers also.
This patch just move this driver to appropriate directory and
doesn't add any functional changes.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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|
| ed948e29 | 05-Sep-2014 |
Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> |
keystone2: keystone_nav: don't use hard addresses in netcp_pktdma
Use definitions in netcp_pktdma instead direct addresses.
The definitions can be set specifically for SoC, so there
is no reason to
keystone2: keystone_nav: don't use hard addresses in netcp_pktdma
Use definitions in netcp_pktdma instead direct addresses.
The definitions can be set specifically for SoC, so there
is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
show more ...
|
| afa479cf | 05-Sep-2014 |
Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> |
keystone2: keystone_nav: don't use hard addresses in qm_config
Use definitions in qm_config. The definitions can be set specifically
for SoC, so there is no reason to check SoC type while initializa
keystone2: keystone_nav: don't use hard addresses in qm_config
Use definitions in qm_config. The definitions can be set specifically
for SoC, so there is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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|
| 1721fe69 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: kirkwood: Remove some dead code from cpu.c
All those functions removed with this patch are not accessed at all. So lets
remove them.
Signed-off-by: Stefan Roese <sr@denx.de> |
| 41e5ee54 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: armada-xp: Add basic support for Marvell Armada XP SoC
This basic support for the Marvell Armada XP is base on the existing kirkwood
support. Which has been generatized by moving some common fi
arm: armada-xp: Add basic support for Marvell Armada XP SoC
This basic support for the Marvell Armada XP is base on the existing kirkwood
support. Which has been generatized by moving some common files into
common marvell locations.
This is in preparation for the upcoming Armada XP MV78460 support.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
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| d5c5132f | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: marvell: Extract kirkwood gpio functions into new common file gpio.c
This makes is possible to use those gpio functions from other MVEBU SoC's as well.
Signed-off-by: Stefan Roese <sr@denx.de>
arm: marvell: Extract kirkwood gpio functions into new common file gpio.c
This makes is possible to use those gpio functions from other MVEBU SoC's as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
show more ...
|
| 3dc23f78 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: marvell: Move arch/kirkwood.h to arch/soc.h
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese <s
arm: marvell: Move arch/kirkwood.h to arch/soc.h
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
show more ...
|
| d80cca29 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common
By moving some kirkwood files into a Marvell common directory, those files
can be used by other Marvell platforms as well. The name
arm: kirkwood: Move some SoC files into new arch/arm/mvebu-common
By moving some kirkwood files into a Marvell common directory, those files
can be used by other Marvell platforms as well. The name mvebu is taken
from the Linux kernel source tree. It has been chosen there to represent
the SoC's from the Marvell EBU (Engineering Business Unit). Those SoC's
currently are:
Armada 370/375/XP, Dove, mv78xx0, Kirkwood, Orion5x
This will be used by the upcoming Armada XP (MV78460) platform support.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
show more ...
|
| 7f196101 | 21-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.
(Note that the soft SPI part of universal is omitted, since th
dm: exynos: Make sure that GPIOs are requested
With driver model GPIOs must be requested before use. Make sure this is
done correctly.
(Note that the soft SPI part of universal is omitted, since this driver
is about to be replaced with a driver-model-aware version)
Signed-off-by: Simon Glass <sjg@chromium.org>
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|
| 903fd795 | 21-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare
the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass <sjg
dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare
the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| 8c33ba7b | 10-Oct-2014 |
Marcel Ziswiler <marcel@ziswiler.com> |
ARM: tegra: Use mem size from MC in combination with get_ram_size()
On popular request this now completes the Warren's work started for
TK1:
aeb3fcb35956461077804720b8a252d50758d7e0
ARM: tegra: Use
ARM: tegra: Use mem size from MC in combination with get_ram_size()
On popular request this now completes the Warren's work started for
TK1:
aeb3fcb35956461077804720b8a252d50758d7e0
ARM: tegra: Use mem size from MC rather than ODMDATA
In addition to the move of using the Tegra memory controller (MC)
register rather than ODMDATA for T20, T30 and T114 as well it further
uses the generic get_ram_size() function (see "common/memsize.c")
<supposed to be used in each and every U-Boot port>TM. Added benefit is
that it should <catch 99% of hardware related (i. e. reliably
reproducible) memory errors> as well.
Thoroughly tested on the various Toradex line of Tegra modules
available which unfortunately does not include T114 and T124 (yet at
least) plus on the Jetson TK1.
Based-on-work-by: Stephen Warren <swarren@nvidia.com>
Based-on-work-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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