| ec79c798 | 21-Jan-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: add static to local functions
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
| 44843749 | 19-Jan-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: fix IECTRL set code for PH1-Pro4
For PH1-Pro4, the bit 6 of the IECTRL must be set. It is the only available bit in this register. There is no effect of the write access to the othe
ARM: UniPhier: fix IECTRL set code for PH1-Pro4
For PH1-Pro4, the bit 6 of the IECTRL must be set. It is the only available bit in this register. There is no effect of the write access to the other bits.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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| 061ae4c0 | 19-Jan-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: describe init_page_table shorter
The assembly directive ".rept ... .endr" allows us to write the init_page_table much shorter. To make things further simpler, set the text and stack
ARM: UniPhier: describe init_page_table shorter
The assembly directive ".rept ... .endr" allows us to write the init_page_table much shorter. To make things further simpler, set the text and stack area as Normal Memory, and the other sections as Device attribute.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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| 89a7c773 | 13-Jan-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: UniPhier: fix comments in SoC Glue init function
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
| dacc0881 | 14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sun9i: Add sun9i (A80) clock setup support
Add initial sun9i (A80) clock setup support, enough to get the uart + mmc going.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell
sun9i: Add sun9i (A80) clock setup support
Add initial sun9i (A80) clock setup support, enough to get the uart + mmc going.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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| 22b61834 | 14-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Drop pll6 setting from clock_init_uart
As the comment says now that we have SPL support this is no longer necessary, as PLL6 is already setup with the exact same parameters by the SPL.
Signe
sunxi: Drop pll6 setting from clock_init_uart
As the comment says now that we have SPL support this is no longer necessary, as PLL6 is already setup with the exact same parameters by the SPL.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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| d9efd47c | 30-Dec-2014 |
Peng Fan <Peng.Fan@freescale.com> |
imx:mx6sx add dram io configure for mx6sx
Define two structure mx6sx_iomux_ddr_regs and mx6sx_iomux_grp_regs. Add a new function mx6sx_dram_iocfg to configure dram io.
Since mx6sx only have one cha
imx:mx6sx add dram io configure for mx6sx
Define two structure mx6sx_iomux_ddr_regs and mx6sx_iomux_grp_regs. Add a new function mx6sx_dram_iocfg to configure dram io.
Since mx6sx only have one channel mmdc0, define a new empty macro MMDC1 to replace mmdc1->entry=value for mx6sx. And to other mx6 soc, MMDC1 effects as "mmdc1->entry=value".
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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| b56f6e2b | 21-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Restore lowlevel_init usage
2 recent sunxi changes have removed the usage of lowlevel_init by moving some code around and then setting CONFIG_SKIP_LOWLEVEL_INIT. This is problematic for 2 rea
sunxi: Restore lowlevel_init usage
2 recent sunxi changes have removed the usage of lowlevel_init by moving some code around and then setting CONFIG_SKIP_LOWLEVEL_INIT. This is problematic for 2 reasons:
1) It does not just stop s_init from being called, it also stops cpu_init_cp15 from getting called, which is undesirable.
2) We want u-boot.bin to be usable standalone, without SPL, some people e.g. use an upstream u-boot.bin together with Allwinner's boot0 loader. So u-boot.bin must (re)initialize the gpios, timer, etc.
This commit restores the lowlevel_init / s_init usage, while keeping the changes to no longer use the global-data (gd) struct in the SPL.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| 80caacf9 | 23-Dec-2014 |
Simon Glass <sjg@chromium.org> |
zynq: Remove reference to gdata
The global_data pointer (gd) has already been set before board_init_f() is called. We should not assign it again. We should also not use gdata since it is going away.
zynq: Remove reference to gdata
The global_data pointer (gd) has already been set before board_init_f() is called. We should not assign it again. We should also not use gdata since it is going away.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| 765ece8b | 03-Dec-2014 |
Bo Shen <voice.shen@atmel.com> |
ARM: atmel: sama5d4: add usb device initial code
Signed-off-by: Bo Shen <voice.shen@atmel.com> |
| 99197a9e | 18-Nov-2014 |
Heiko Schocher <hs@denx.de> |
arm, arm926ejs: make thumb mode compileable
in thumb mode compiler says for example for arch/arm/lib/cache-cp15.c when enabling CONFIG_SYS_THUMB_BUILD:
{standard input}: Assembler messages: {standa
arm, arm926ejs: make thumb mode compileable
in thumb mode compiler says for example for arch/arm/lib/cache-cp15.c when enabling CONFIG_SYS_THUMB_BUILD:
{standard input}: Assembler messages: {standard input}:373: Error: selected processor does not support Thumb mode `mrc p15,0,r4,c1,c0,0' {standard input}:416: Error: selected processor does not support Thumb mode `mcr p15,0,r3,c2,c0,0'
so, if caches are disabled, do not use this command on arm926ejs. used on at91 in SPL, to reduce size of SPL.
Signed-off-by: Heiko Schocher <hs@denx.de>
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| 2b7c0f30 | 23-Dec-2014 |
Simon Glass <sjg@chromium.org> |
sunxi: Drop use of lowlevel_init()
This does nothing now, so drop it. We have SPL anyway to do our low-level init.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.
sunxi: Drop use of lowlevel_init()
This does nothing now, so drop it. We have SPL anyway to do our low-level init.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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| f630974c | 23-Dec-2014 |
Simon Glass <sjg@chromium.org> |
sunxi: Move SPL s_init() code to board_init_f()
The current sunxi implementation uses gdata, which is going away. It also sets up DRAM before board_init_f() in SPL.
There is really no reason to do
sunxi: Move SPL s_init() code to board_init_f()
The current sunxi implementation uses gdata, which is going away. It also sets up DRAM before board_init_f() in SPL.
There is really no reason to do much in s_init() since board_init_f() is called immediately afterwards. The only change is that we need our own implementation of board_init_f() which sets up DRAM before the BSS (which is in DRAM) is cleared.
The s_init() code runs once for SPL and again for U-Boot proper. We shouldn't need to init the clock/timer/gpio/i2c init twice, so just have it in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| a6b541b0 | 19-Dec-2014 |
Tom Rini <trini@ti.com> |
TI ARMv7: Don't use GD before crt0.S has set it
Prior to this change we set the gd pointer early so that we can store data in it. This becomes problematic for DM changes as well as being odd in gen
TI ARMv7: Don't use GD before crt0.S has set it
Prior to this change we set the gd pointer early so that we can store data in it. This becomes problematic for DM changes as well as being odd in general. Re-work the code paths so that we don't need to set the gd pointer so early and instead can rely upon the normal setting of it.
In order to do this we do need to move certain calls from s_init into spl_board_init(), mainly preloader_console_init and save_omap_boot_params.
Tested on: Beaglebone Black, AM43xx GP EVM, Beagleboard, Beagleboard xM, OMAP5 uEVM, DRA7xx EVM Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
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| ab77f241 | 15-Jan-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-ti |
| f1075aed | 14-Jan-2015 |
Michal Simek <michal.simek@xilinx.com> |
ARM: armv8: Fix typo in commentary
Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
| 9637c4b2 | 08-Dec-2014 |
Evgeni Dobrev <evgeni@studio-punkt.com> |
Add support for Seagate BlackArmor NAS220
Add support for Seagate BlackArmor NAS220
Signed-off-by: Evgeni Dobrev <evgeni@studio-punkt.com> |
| a90e77db | 11-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: usbc: Add support for usb-vbus0 controller by axp drivebus pin
The axp221 / axp223's N_VBUSEN pin can be configured as an output rather then an input, and this is used on some boards to contr
sunxi: usbc: Add support for usb-vbus0 controller by axp drivebus pin
The axp221 / axp223's N_VBUSEN pin can be configured as an output rather then an input, and this is used on some boards to control usb-vbus0, add support for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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| 4458b7a6 | 07-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: usbc: Add support for usb0 to the common usbc code
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> |
| 0eccec4e | 07-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Move usb-controller init code out of ehci-sunxi.c for reuse for otg
Most of the usb-controller init code found in ehci-sunxi.c also is necessary to init the otg usb controller, so move it to
sunxi: Move usb-controller init code out of ehci-sunxi.c for reuse for otg
Most of the usb-controller init code found in ehci-sunxi.c also is necessary to init the otg usb controller, so move it to a common place.
While at it also update various #ifdefs / defines for sun8i support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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| 05c4bd3e | 31-Dec-2014 |
Jan Kiszka <jan.kiszka@siemens.com> |
sun7i: Move psci_arch_init close to text_end
"adr rX, text_end" only works if the label is close. Adding further code to the other functions will prevent this. So move the containing function close
sun7i: Move psci_arch_init close to text_end
"adr rX, text_end" only works if the label is close. Adding further code to the other functions will prevent this. So move the containing function close to label. No functional change.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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| 602fa46c | 31-Dec-2014 |
Jan Kiszka <jan.kiszka@siemens.com> |
sun7i: Add support for taking CPUs offline via PSCI
Based on the original version by Marc Zyngier. It adds a psci_cpu_off implementation for the A20 SoC. The mechanism works by first preparing the c
sun7i: Add support for taking CPUs offline via PSCI
Based on the original version by Marc Zyngier. It adds a psci_cpu_off implementation for the A20 SoC. The mechanism works by first preparing the calling CPU to go offline (disable and flush cache, disable SMP), then requesting CPU 0 to pull the plug. The request is sent as FIQ on SGI15.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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| 25508ab2 | 27-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: Fix PLL1 running at half speed on sun8i
PLL1 on sun6i / sun8i also has a p factor which divides the clock by 2^p (to the power p). On sun6i the p factor is ignored, but on sun8i it is used an
sunxi: Fix PLL1 running at half speed on sun8i
PLL1 on sun6i / sun8i also has a p factor which divides the clock by 2^p (to the power p). On sun6i the p factor is ignored, but on sun8i it is used and we were setting it to 1, resulting in the CPU running at 504 MHz instead of 1008 MHz, this commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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| c3d2b963 | 24-Dec-2014 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Fix buggy sun6i/sun8i DRAM size detection logic
After reboot, reset or even short power off, DRAM typically retains the old stale data for some period of time (for this type of memory, the bi
sunxi: Fix buggy sun6i/sun8i DRAM size detection logic
After reboot, reset or even short power off, DRAM typically retains the old stale data for some period of time (for this type of memory, the bits of data are stored in slowly discharging capacitors).
The current sun6i/sun8i DRAM size detection logic, which is inherited from the Allwinner code, relies on using a large magic signature with the hope that it is unique enough and unlikely to ever accidentally match this leftover garbage data in RAM. But this approach is inherently unsafe, as can be demonstrated using the following test program:
/***** A testcase for reproducing the problem ******/
void main(int argc, char *argv[]) { size_t size, i; uint32_t *buf; /* Allocate the buffer */ if (argc < 2 || !(size = (size_t)atoi(argv[1]) * 1048576) || !(buf = malloc(size))) { printf("Need buffer size in MiB as a cmdline argument\n"); exit(1); } /* Fill it with the Allwinner DRAM "magic" values */ for (i = 0; i < size / 4; i++) buf[i] = 0xaa55aa55 + ((uintptr_t)&buf[i] / 4) % 64; /* Try to reboot */ system("reboot"); /* And wait */ for (;;) {} } /***************************************************/
If this test program is run on the device (giving it a large chunk of memory), then the DRAM size detection logic in u-boot gets confused after reboot and fails to initialize DRAM properly.
A better approach is not to rely on luck and abstain from making any assumptions about the properties of the leftover garbage data in RAM. Instead just use a more reliable code for testing whether two different addresses refer to the same memory location.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| 08fd1479 | 07-Dec-2014 |
Hans de Goede <hdegoede@redhat.com> |
sun8i: Add dram initialization support
Based on the register / dram_para headers from the Allwinner u-boot / linux sources + the init sequences from boot0.
Signed-off-by: Hans de Goede <hdegoede@re
sun8i: Add dram initialization support
Based on the register / dram_para headers from the Allwinner u-boot / linux sources + the init sequences from boot0.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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