| 6c747f4a | 06-Jan-2015 |
York Sun <yorksun@freescale.com> |
armv8/fsl-lsch3: Change normal memory shareability
According to hardware implementation, a single outer shareable global
coherence group is defined. Inner shareable has not bee enabled.
Signed-off-
armv8/fsl-lsch3: Change normal memory shareability
According to hardware implementation, a single outer shareable global
coherence group is defined. Inner shareable has not bee enabled.
Signed-off-by: York Sun <yorksun@freescale.com>
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| db75356f | 16-Feb-2015 |
Stephen Warren <swarren@wwwdotorg.org> |
bcm2836 SoC support (used in Raspberry Pi 2 model B)
The bcm2835 and bcm2836 are essentially identical, except:
- The CPU is an ARM1176 v.s. a quad-core Cortex-A7.
- The physical address of many IO
bcm2836 SoC support (used in Raspberry Pi 2 model B)
The bcm2835 and bcm2836 are essentially identical, except:
- The CPU is an ARM1176 v.s. a quad-core Cortex-A7.
- The physical address of many IO controllers has moved.
Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH),
update the existing bcm2835 code to handle the minor differences, and
plumb it into the ARMv7 CPU architecture.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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| 56f86e39 | 20-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
ARM: kirkwood: move SOC sources to mach-kirkwood
Move
arch/arm/cpu/arm926ejs/kirkwood/* -> arch/arm/mach-kirkwood/*
Note:
Perhaps, can we merge arch/arm/mach-kirkwood and
arch/arm/mvebu-common in
ARM: kirkwood: move SOC sources to mach-kirkwood
Move
arch/arm/cpu/arm926ejs/kirkwood/* -> arch/arm/mach-kirkwood/*
Note:
Perhaps, can we merge arch/arm/mach-kirkwood and
arch/arm/mvebu-common into arch/arm/mach-mvebu, like Linux?
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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| 840fe95c | 16-Feb-2015 |
Siarhei Siamashka <siarhei.siamashka@gmail.com> |
sunxi: Support the FEL boot mode in the regular u-boot build
So that the CONFIG_SPL_FEL option is not needed anymore. And the regular
SPL binary, generated by the default u-boot build, is now also b
sunxi: Support the FEL boot mode in the regular u-boot build
So that the CONFIG_SPL_FEL option is not needed anymore. And the regular
SPL binary, generated by the default u-boot build, is now also bootable
over USB in the FEL mode. The SPL still can boot from the SD card too.
A bunch of system registers need to be saved/restored in order to ensure
that the IRQ handler still works in the BROM FEL code after getting
control back from the SPL. This is done in the sunxi code instead of
abusing ifdefs in 'start.S'.
The decision whether to load the main u-boot binary from the SD card or
return to the FEL code in the BROM is done at runtime.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
[hdegoede@redhat.com: Since we now restore various regs before returning to
the FEL BROM code we can drop the sunxi specific #ifdefs in start.S]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| 66c98a0c | 11-Feb-2015 |
Vitaly Andrianov <vitalya@ti.com> |
keystone2: ddr3: eliminate using global ddr3_size variable
KS2 ddr3 initialization uses ddr3_size global variable before u-boot
relocation. Even if the variable is not being used after relocation,
w
keystone2: ddr3: eliminate using global ddr3_size variable
KS2 ddr3 initialization uses ddr3_size global variable before u-boot
relocation. Even if the variable is not being used after relocation,
writing to it corrupts relocation table.
This patch removes the global ddr3_size variable and uses local one
instead.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
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| bba379d4 | 11-Feb-2015 |
Steve Kipisz <s-kipisz2@ti.com> |
clock_am43xx:Set the MAC clock to /5 for OPP100
When EMAC is in the boot order, the boot ROM sets OPP50 and the
MAC clock is set to /2. SPL needs to change it to /5 for Ethernet
to generate the corr
clock_am43xx:Set the MAC clock to /5 for OPP100
When EMAC is in the boot order, the boot ROM sets OPP50 and the
MAC clock is set to /2. SPL needs to change it to /5 for Ethernet
to generate the correct txclk. This patch sets it correctly.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
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