History log of /rk3399_rockchip-uboot/arch/arm/cpu/armv7/sleep.S (Results 1 – 3 of 3)
Revision Date Author Comments
# a059684b 13-Feb-2019 Joseph Chen <chenjh@rock-chips.com>

armv7: sleep.S: support other v7 cpu

Change-Id: Ib1b1cb973054c9faa6a11da8fc1ad7f1d5aec214
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>


# abf4f551 13-Feb-2019 Joseph Chen <chenjh@rock-chips.com>

armv7: sleep.S: rename _suspend_gd to __suspend_gd

Change-Id: I97911822c5616dbcbb3b28a156a3759f3b6b2af3
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>


# 54925552 07-Nov-2017 Joseph Chen <chenjh@rock-chips.com>

arm: armv7: introduce cpu suspend and resume support

Just like linux, it supports cpu save and restore context
during enter and exit low power mode. With this patch, cpu
is able to suspend with core

arm: armv7: introduce cpu suspend and resume support

Just like linux, it supports cpu save and restore context
during enter and exit low power mode. With this patch, cpu
is able to suspend with core power off.

Workflow for trap into ATF for system suspend:
cpu_suspend
-> cpu_do_suspend
-> arch specific fn: int (*fn)(unsigned long)
-> psci_system_suspend(deliver 'cpu_resume()' address to ATF)
-> ATF system suspend
<- ATF system resume
<- cpu_resume
<- cpu_do_resume
next instruction

Notice: If needed, you should remember to save and restore GIC by yourself.

Change-Id: I5cb6fb6ac5b6a7f4ec4a975b0fc38250b000b28e
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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