| #
17fa0326 |
| 18-Jan-2017 |
Heiko Schocher <hs@denx.de> |
serial, ns16550: bugfix: ns16550 fifo not enabled
commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor" breaks u-boot commandline working with long commands sending to the board.
Since the abo
serial, ns16550: bugfix: ns16550 fifo not enabled
commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor" breaks u-boot commandline working with long commands sending to the board.
Since the above patch, you have to setup the fcr register.
For board/archs which enable OF_PLATDATA, the new field fcr in struct ns16550_platdata is not filled with a default value ...
This leads in not setting up the uarts fifo, which ends in problems, when you send long commands to u-boots commandline.
Detected this issue with automated tbot tests on am335x based shc board.
The error does not popup, if you type commands. You need to copy&paste a long command to u-boots commandshell (or send a long command with tbot)
Possible boards/plattforms with problems: ./arch/arm/cpu/arm926ejs/lpc32xx/devices.c ./arch/arm/mach-tegra/board.c ./board/overo/overo.c ./board/quipos/cairo/cairo.c ./board/logicpd/omap3som/omap3logic.c ./board/logicpd/zoom1/zoom1.c ./board/timll/devkit8000/devkit8000.c ./board/lg/sniper/sniper.c ./board/ti/beagle/beagle.c ./drivers/serial/serial_rockchip.c
Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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| #
2f6ed3b8 |
| 08-Mar-2016 |
Adam Ford <aford173@gmail.com> |
ARM: Various: Future-proof serial platdata
A few boards still use ns16550_platdata structures, but assume the structure is going to be in a specific order. By explicitly naming each entry, this shou
ARM: Various: Future-proof serial platdata
A few boards still use ns16550_platdata structures, but assume the structure is going to be in a specific order. By explicitly naming each entry, this should also help 'future-proof' in the event the structure changes.
Tested on the Logic PD Torpedo + Wireless.
I only changed a handful of devices that used the same syntax as the Logic board. Appologies if I missed one or stepped on toes. Thanks to Derald Woods and Alexander Graf.
Signed-off-by: Adam Ford <aford173@gmail.com>
V6: Add fix to arch/arm/cpu/armv7/am33xx/board.c
V5: Add fix to arch/arm/cpu/arm926ejs/lpc32xx/devices.c
V4: Fix subject heading
V3: Remove reg_offset out in all the structs. It was reverted out, and and if it did exist, it would get initialized to 0 by default.
V2: I hastily copy-pasted the boards without looking at the UART number. This addresses 3 boards that use UART3 and not UART1. Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
1222305b |
| 19-Dec-2015 |
Vladimir Zapolskiy <vz@mleia.com> |
arm: lpc32xx: switch SPL builds to driver model
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART
arm: lpc32xx: switch SPL builds to driver model
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART in SPL image is removed and well as definitions for non-DM NS16550 driver, its DM version is used instead.
Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE for LPC32xx boards.
The change adds about 5KB to the resulting SPL image (for devkit3250 board SPL image is increased from 10672 to 15608 bytes).
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
d25ba89e |
| 19-Dec-2015 |
Vladimir Zapolskiy <vz@mleia.com> |
arm: lpc32xx: switch serial console to driver model
On NXP LPC32xx platform for non-SPL builds the change adds standard (NS16550) and high-speed UARTs to driver model. Due to specific of DM NS16550
arm: lpc32xx: switch serial console to driver model
On NXP LPC32xx platform for non-SPL builds the change adds standard (NS16550) and high-speed UARTs to driver model. Due to specific of DM NS16550 device description UART clock can not be got in runtime and by default it is set to 13MHz, if board PERIPH_CLK is different, this should be specified in board configuration file.
For SPL builds HSUARTs are disabled and non-DM NS16550 driver is compiled, if needed.
The change also updates default configs of devkit3250 and work_92105 boards to reflect updates in platform files.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
13a39725 |
| 14-Oct-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master'
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| #
bab8d1e2 |
| 27-Aug-2015 |
Vladimir Zapolskiy <vz@mleia.com> |
lpc32xx: remove duplicated DMA_CLK_ENABLE bit definition
Because there is an originally defined CLK_DMA_ENABLE macro in clk.h, no reason to add another DMA_CLK_ENABLE macro with the same value.
Rem
lpc32xx: remove duplicated DMA_CLK_ENABLE bit definition
Because there is an originally defined CLK_DMA_ENABLE macro in clk.h, no reason to add another DMA_CLK_ENABLE macro with the same value.
Remove DMA_CLK_ENABLE, since it does not follow naming convention from the code, this implies renaming of DMA_CLK_ENABLE to CLK_DMA_ENABLE in lpc32xx/devices.c file.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
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| #
adf8d58d |
| 13-Aug-2015 |
Sylvain Lemieux <slemieux@tycoint.com> |
usb: lpc32xx: add host USB driver
Incorporate USB driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are: - lpc32xx USB driver - lpc3250 header file USB registers definition.
usb: lpc32xx: add host USB driver
Incorporate USB driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are: - lpc32xx USB driver - lpc3250 header file USB registers definition.
The legacy driver was updated and clean-up as part of the integration with the latest u-boot.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Vladimir Zapolskiy <vz@mleia.com>
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| #
980db8ca |
| 10-Aug-2015 |
Sylvain Lemieux <slemieux@tycoint.com> |
dma: lpc32xx: add DMA driver
Incorporate DMA driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are: - lpc32xx DMA driver - lpc3250 header file DMA registers definition.
The
dma: lpc32xx: add DMA driver
Incorporate DMA driver from legacy LPCLinux NXP BSP. The files taken from the legacy patch are: - lpc32xx DMA driver - lpc3250 header file DMA registers definition.
The legacy driver was updated and clean-up as part of the integration with the latest u-boot.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Vladimir Zapolskiy <vz@mleia.com>
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| #
fcd78fa6 |
| 12-Aug-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-net
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| #
dcfd37e5 |
| 18-Jul-2015 |
Vladimir Zapolskiy <vz@mleia.com> |
nand: lpc32xx: add SLC NAND controller support
The change adds support of LPC32xx SLC NAND controller.
LPC32xx SoC has two different mutually exclusive NAND controllers to communicate with single a
nand: lpc32xx: add SLC NAND controller support
The change adds support of LPC32xx SLC NAND controller.
LPC32xx SoC has two different mutually exclusive NAND controllers to communicate with single and multiple layer chips.
This simple driver allows to specify NAND chip timings and defines custom read_buf()/write_buf() operations, because access to 8-bit data register must be 32-bit aligned.
Support of hardware ECC calculation is not implemented (data correction is always done by software), since it requires a working DMA engine.
The driver can be included to an SPL image.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
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| #
1a791892 |
| 06-Jul-2015 |
Vladimir Zapolskiy <vz@mleia.com> |
net: lpc32xx: add RMII phy mode support
LPC32xx MAC and clock control configuration requires some minor quirks to deal with a phy connected by RMII.
It's worth to mention that the kernel and legacy
net: lpc32xx: add RMII phy mode support
LPC32xx MAC and clock control configuration requires some minor quirks to deal with a phy connected by RMII.
It's worth to mention that the kernel and legacy BSP from NXP sets SUPP_RESET_RMII == (1 << 11) bit, however the description of this bit is missing in shared LPC32x0 User Manual UM10326 Rev. 3, July 22, 2011 and in LPC32x0 Draft User Mannual Rev. 00.27, November 20, 2008, also in my tests an SMSC LAN8700 phy device connected over RMII seems to work correctly without touching this bit.
Add support of RMII, if CONFIG_RMII is defined, this option is aligned with a number of boards, which already define the same config value.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
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| #
59064346 |
| 10-Apr-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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| #
981219ee |
| 31-Mar-2015 |
Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> |
lpc32xx: add LPC32xx SSP support (SPI mode)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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| #
606f7047 |
| 31-Mar-2015 |
Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> |
lpc32xx: add GPIO support
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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| #
5e862b95 |
| 31-Mar-2015 |
Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> |
lpc32xx: i2c: add LPC32xx I2C interface support
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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| #
c8381bf4 |
| 31-Mar-2015 |
Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> |
lpc32xx: mtd: nand: add MLC NAND controller
The controller's Reed-Solomon ECC hardware is used except of course for raw reads and writes. It covers in- and out-of-band data together.
The SPL framew
lpc32xx: mtd: nand: add MLC NAND controller
The controller's Reed-Solomon ECC hardware is used except of course for raw reads and writes. It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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| #
ac2916a2 |
| 31-Mar-2015 |
Albert ARIBAUD \(3ADEV\) <albert.aribaud@3adev.fr> |
lpc32xx: add Ethernet support
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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| #
326ea986 |
| 31-Jul-2013 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <s
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
8b485ba1 |
| 25-Jul-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into u-boot-arm/master
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| #
1a459660 |
| 08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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| #
ee3a55fd |
| 20-May-2012 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (167 commits) OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer ARM: omap3: Add CONFI
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (167 commits) OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT ARM: omap3: Set SPL stack size to 8KB, image to 54KB. arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree omap4: do not enable auxiliary cores omap4: do not enable fs-usb module omap4: panda: disable uart2 pads during boot igep00x0: change mpurate from 500 to auto igep00x0: enable the use of a plain text file tegra2: trivially enable 13 mhz crystal frequency tegra: Enable keyboard for Seaboard tegra: Switch on console mux and use environment for console tegra: Add tegra keyboard driver tegra: fdt: Add keyboard definitions for Seaboard tegra: fdt: Add keyboard controller definition tegra: Add keyboard support to funcmux input: Add support for keyboard matrix decoding from an fdt input: Add generic keyboard input handler input: Add linux/input.h for key code support fdt: Add fdtdec functions to read byte array tegra: Enable LP0 on Seaboard tegra: fdt: Add EMC data for Tegra2 Seaboard tegra: i2c: Add function to find DVC bus fdt: tegra: Add EMC node to device tree tegra: Add EMC settings for Seaboard tegra: Turn off power detect in board init tegra: Set up warmboot code on Nvidia boards tegra: Setup PMC scratch info from ap20 setup tegra: Add warmboot implementation tegra: Set up PMU for Nvidia boards tegra: Add PMU to manage power supplies tegra: Add EMC support for optimal memory timings tegra: Add header file for APB_MISC register tegra: Add tegra_get_chip_type() to detect SKU tegra: Add flow, gp_padctl, fuse, sdram headers tegra: Add crypto library for warmboot code tegra: Add functions to access low-level Osc/PLL details tegra: Move ap20.h header into arch location Add AES crypto library i2c: Add TPS6586X driver Add abs() macro to return absolute value fdt: Add function to return next compatible subnode fdt: Add function to locate an array in the device tree i.MX28: Avoid redefining serial_put[cs]() i.MX28: Check if WP detection is implemented at all i.MX28: Add battery boot components to SPL i.MX28: Reorder battery status functions in SPL i.MX28: Add LRADC init to i.MX28 SPL i.MX28: Add LRADC register definitions i.MX28: Shut down the LCD controller before reset i.MX28: Add LCDIF register definitions i.MX28: Implement boot pads sampling and reporting i.MX28: Improve passing of data from SPL to U-Boot M28EVK: Add SD update command M28EVK: Implement support for new board V2.0 FEC: Abstract out register setup MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged i.MX28: Add delay after CPU bypass is cleared spi: mxs: Allow other chip selects to work spi: mxs: Introduce spi_cs_is_valid() mx53loco: Remove unneeded gpio_set_value() mx53loco: Add CONFIG_REVISION_TAG mx53loco: Turn on VUSB regulator mx53loco: Add mc34708 support and set mx53 frequency at 1GHz pmic: dialog: Avoid name conflicts imx: Add u-boot.imx as target for ARM9 i.MX SOCs i.MX2: Include asm/types.h in arch-mx25/imx-regs.h imx: usb: There is no such register i.MX25: usb: Set PORTSCx register imx: nand: Support flash based BBT i.MX25: This architecture has a GPIO4 too i.MX25: esdhc: Add mxc_get_clock infrastructure i.MX6: mx6q_sabrelite: add SATA bindings i.MX6: add enable_sata_clock() i.MX6: Add ANATOP regulator init mx28evk: add NAND support USB: ehci-mx6: Fix broken IO access M28: Scan only first 512 MB of DRAM to avoid memory wraparound Revert "i.MX28: Enable additional DRAM address bits" M28: Enable FDT support mx53loco: Add support for 1GHz operation for DA9053-based boards mx53loco: Allow to print CPU information at a later stage mx5: Add clock config interface imx-common: Factor out get_ahb_clk() i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow mx31pdk: Allow booting a zImage kernel mx6qarm2: Allow booting a zImage kernel mx6qsabrelite: Allow booting a zImage kernel mx28evk: Allow booting a zImage kernel m28evk: Allow to booting a dt kernel mx28evk: Allow to booting a dt kernel mx6qsabrelite: No need to set the direction for GPIO3_23 again pmic: Add support for the Dialog DA9053 PMIC MX53: mx53loco: Add SATA support MX53: Add support to ESG ima3 board SATA: add driver for MX5 / MX6 SOCs MX53: add function to set SATA clock to internal SATA: check for return value from sata functions MX5: Add definitions for SATA controller NET: fec_mxc.c: Add a way to disable auto negotiation Define UART4 and UART5 base addresses EXYNOS: Change bits per pixel value proper for u-boot. EXYNOS: support TRATS board display function LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI EXYNOS: support EXYNOS MIPI DSI interface driver. EXYNOS: support EXYNOS framebuffer and FIMD display drivers. LCD: add data structure for EXYNOS display driver EXYNOS: add LCD and MIPI DSI clock interface. EXYNOS: definitions of system resgister and power management registers. SMDK5250: fix compiler warning misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998 misc:pmic:max8997 MAX8997 support for PMIC driver TRATS: modify the trats's configuration ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT arm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT cm-t35: add I2C multi-bus support include/configs: Remove CONFIG_SYS_64BIT_STRTOUL include/configs: Remove CONFIG_SYS_64BIT_VSPRINTF omap3: Introduce weak misc_init_r omap730p2: Remove empty misc_init_r omap5912osk: Remove empty misc_init_r omap4+: Remove CONFIG_ARCH_CPU_INIT omap4: Remove CONFIG_SYS_MMC_SET_DEV OMAP3: pandora: drop console kernel argument OMAP3: pandora: revise GPIO configuration ...
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| #
52f69f81 |
| 19-Apr-2012 |
Vladimir Zapolskiy <vz@mleia.com> |
arm926ejs: add NXP LPC32x0 cpu series support
This change adds initial support for NXP LPC32x0 SoC series.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud
arm926ejs: add NXP LPC32x0 cpu series support
This change adds initial support for NXP LPC32x0 SoC series.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Marek Vasut <marek.vasut@gmail.com>
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