Add Makalu ELP CPU lib

Add basic support for Makalu ELP processor core.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7b1ddbb8dd43326ecb8ff188f6f8fcf239826a93

Merge changes I500ddbe9,I9c10dac9,I53bfff85,I06f7594d,I24bff8d4, ... into integration

* changes:
nxp lx2160a-aqds: new plat based on soc lx2160a
NXP lx2160a-rdb: new plat based on SoC lx2160a

Merge changes I500ddbe9,I9c10dac9,I53bfff85,I06f7594d,I24bff8d4, ... into integration

* changes:
nxp lx2160a-aqds: new plat based on soc lx2160a
NXP lx2160a-rdb: new plat based on SoC lx2160a
nxp lx2162aqds: new plat based on soc lx2160a
nxp: errata handling at soc level for lx2160a
nxp: make file for loading additional ddr image
nxp: adding support of soc lx2160a
nxp: deflt hdr files for soc & their platforms
nxp: platform files for bl2 and bl31 setup
nxp: warm reset support to retain ddr content
nxp: nv storage api on platforms
nxp: supports two mode of trusted board boot
nxp: fip-handler for additional fip_fuse.bin
nxp: fip-handler for additional ddr-fip.bin
nxp: image loader for loading fip image
nxp: svp & sip smc handling
nxp: psci platform functions used by lib/psci
nxp: helper function used by plat & common code
nxp: add data handler used by bl31
nxp: adding the driver.mk file
nxp-tool: for creating pbl file from bl2
nxp: adding the smmu driver
nxp: cot using nxp internal and mbedtls
nxp:driver for crypto h/w accelerator caam
nxp:add driver support for sd and emmc
nxp:add qspi driver
nxp: add flexspi driver support
nxp: adding gic apis for nxp soc
nxp: gpio driver support
nxp: added csu driver
nxp: driver pmu for nxp soc
nxp: ddr driver enablement for nxp layerscape soc
nxp: i2c driver support.
NXP: Driver for NXP Security Monitor
NXP: SFP driver support for NXP SoC
NXP: Interconnect API based on ARM CCN-CCI driver
NXP: TZC API to configure ddr region
NXP: Timer API added to enable ARM generic timer
nxp: add dcfg driver
nxp:add console driver for nxp platform
tools: add mechanism to allow platform specific image UUID
tbbr-cot: conditional definition for the macro
tbbr-cot: fix the issue of compiling time define
cert_create: updated tool for platform defined certs, keys & extensions
tbbr-tools: enable override TRUSTED_KEY_CERT

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Merge "rpi4: Switch to gicv2.mk and GICV2_SOURCES" into integration

nxp lx2160a-aqds: new plat based on soc lx2160a

New NXP platform lx2160a-qds:
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed-off-by: Udit Agarwal <

nxp lx2160a-aqds: new plat based on soc lx2160a

New NXP platform lx2160a-qds:
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I500ddbe9e56c4af5f955da6ecbd4ddc5fbe89a12

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NXP lx2160a-rdb: new plat based on SoC lx2160a

New NXP platform lx2160a-rdb(Reference Design Board):
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed

NXP lx2160a-rdb: new plat based on SoC lx2160a

New NXP platform lx2160a-rdb(Reference Design Board):
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I9c10dac9d5e67d44a2d94a7a27812220fdcc6ae3

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nxp lx2162aqds: new plat based on soc lx2160a

New NXP platform lx2162aqds:
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed-off-by: Udit Agarwal <udi

nxp lx2162aqds: new plat based on soc lx2160a

New NXP platform lx2162aqds:
- Based SoC lx2160a
- Board specific tuning for DDR init.
- Board specific Flash details.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I53bfff85398313082db77c77625cb2d40cd9b1b1

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nxp: errata handling at soc level for lx2160a

SoC erratas are handled as part of this commit.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I06f7594d19cc7fc89fe036a8a255300458cb36dd

nxp: make file for loading additional ddr image

- NXP SoC lx2160a needs additional ddr_fip.bin.

- There are three types of ddr image that can be created:
-- ddr_fip.mk for creating fip_ddr.bin im

nxp: make file for loading additional ddr image

- NXP SoC lx2160a needs additional ddr_fip.bin.

- There are three types of ddr image that can be created:
-- ddr_fip.mk for creating fip_ddr.bin image for normal boot.
-- ddr_fip_sb.mk for creating fip_ddr_sec.bin image for NXP CSF based
CoT/secure boot.
-- ddr_fip_tbbr.mk for creating fip_ddr_sec.bin image for MBEDTLS
CoT/secure boot.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I24bff8d489f72da99f64cb79b2114faa9423ce8c

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nxp: adding support of soc lx2160a

* NXP SoC is 16 A-72 core SoC.
* SoC specific defines are defined in:
- soc.def
- soc.h
* Called for BL2 and BL31 setup, SoC specific setup are implemented in:

nxp: adding support of soc lx2160a

* NXP SoC is 16 A-72 core SoC.
* SoC specific defines are defined in:
- soc.def
- soc.h
* Called for BL2 and BL31 setup, SoC specific setup are implemented in:
- soc.c
* platform specific helper functions implemented at:
- aarch64/lx2160a_helpers.S
* platform specific functions used by 'plat/nxp/commpon/psci',
etc. are implemented at:
- aarch64/lx2160a.S
* platform specific implementation for handling PSCI_SYSTEM_RESET2:
- aarch64/lx2160a_warm_rst.S

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ib40086f9d9079ed9b22967baff518c6df9f408b8

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nxp: deflt hdr files for soc & their platforms

- Default header files for:
-- plat/nxp/soc-lxxxx/include/soc.h uses:
--- soc_default_base_addr.h
--- soc_default_base_macros.h

-- plat/n

nxp: deflt hdr files for soc & their platforms

- Default header files for:
-- plat/nxp/soc-lxxxx/include/soc.h uses:
--- soc_default_base_addr.h
--- soc_default_base_macros.h

-- plat/nxp/soc-lxxxx/<$PLAT>/platform_def.h uses:
--- plat_default_def.h: Every macro define can be overidden.

-- include/common/tbbr/tbbr_img_def.h uses:
--- plat_tbbr_img_def.h: platform specific new FIP image macros.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ic50003e27e87891be3cd18bdb4e14a1c7272d492

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nxp: platform files for bl2 and bl31 setup

For NXP platforms:
- Setup files for BL2 and BL31
- Other supporting files.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I36a1183a0652701

nxp: platform files for bl2 and bl31 setup

For NXP platforms:
- Setup files for BL2 and BL31
- Other supporting files.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I36a1183a0652701bdede9e02d41eb976accbb017

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nxp: warm reset support to retain ddr content

NXP: Added warm reset handler to handle SMC PSCI_SYSTEM_RESET2
raised from kernel (> 5.4).

As part of first cold boot, DDR training data is stored in N

nxp: warm reset support to retain ddr content

NXP: Added warm reset handler to handle SMC PSCI_SYSTEM_RESET2
raised from kernel (> 5.4).

As part of first cold boot, DDR training data is stored in NV storage.

As part of this SMC handling, following things are done:
- DDR is put in self-refresh mode to retain the content of DDR.
- Reset cause is saved.
- Reset is triggered.

On next boot to last warm-reset, DDR training is restored from
the NV storage.

Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I8e4fb0824887af49e959c93825e2ab0ba887fc9d

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nxp: nv storage api on platforms

NV storage API(s) for NXP platforms, supported on:
- flexspi-nor
- SecMon - General Purpose Registers at Low-Power section,
retains their content if backe

nxp: nv storage api on platforms

NV storage API(s) for NXP platforms, supported on:
- flexspi-nor
- SecMon - General Purpose Registers at Low-Power section,
retains their content if backed by coined battery.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Id65dee4f28e7d6d2024407030039de33ebe0fa05

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nxp: supports two mode of trusted board boot

NXP SoC supports two TBB mode:
- MBED_TLS based
-- ROTK key hash is placed as part of the BL2 binary at section:
--- .rodata.nxp_rotpk_hash
-- S

nxp: supports two mode of trusted board boot

NXP SoC supports two TBB mode:
- MBED_TLS based
-- ROTK key hash is placed as part of the BL2 binary at section:
--- .rodata.nxp_rotpk_hash
-- Supporting non-volatile counter via SFP.
-- platform function used by TFA common authentication code.

- NXP CSF based
-- ROTK key deployment vary from MBEDTLS

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ib0f0bf024fd93de906c5d4f609383ae9e02b2fbc

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nxp: fip-handler for additional fip_fuse.bin

All of the NXP SoC, needs fip_fuse image to be
loaded additionally as part of preparation for Trusted board boot
- fip_fuse.bin contains an image for aut

nxp: fip-handler for additional fip_fuse.bin

All of the NXP SoC, needs fip_fuse image to be
loaded additionally as part of preparation for Trusted board boot
- fip_fuse.bin contains an image for auto fuse provisioning.
- Auto fuse provisioning is based on the input file with values for:
-- SRK Hash
-- OTPMK
-- misc. refer board manual for more details.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I26d4024fefe352d967ca120191f784f1f47aa9d1

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nxp: fip-handler for additional ddr-fip.bin

Few of the NXP SoC like LX2160A, needs ddr-phy images to be
loaded additionally before DDR initialization
- fip_ddr.bin is created containing upto 6 ddr i

nxp: fip-handler for additional ddr-fip.bin

Few of the NXP SoC like LX2160A, needs ddr-phy images to be
loaded additionally before DDR initialization
- fip_ddr.bin is created containing upto 6 ddr images.
- With TRUSTED_BOARD_BOOT = 1, fip_ddr.bin is authenticated
first before loading and starting DDR initialization.
- To successfully compile this image, platform-defined header files
needs to be defined:
-- include/common/tbbr/tbbr_img_def.h uses:
--- plat_tbbr_img_def.h: platform specific new FIP image macros.

-- include/tools/share/firmware_image_package.h uses:
--- plat_def_fip_uuid.h: platform specific new UUID macros.
---- Added UUID for DDR images to create FIP-DDR.
---- Added UUID for FUSE provisioning images to create FIP-fuse.

-- include/tools/share/tbbr_oid.h uses:
--- platform_oid.h: platform specific new OID macros.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Icbcf1673a8c398aae98680b5016f4276b4864b91

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nxp: image loader for loading fip image

function load_img(), is dependent on:
- Recursively calling load_image() defined in common/bl_common.c
- for each image in the fip.

Signed-off-by: Pankaj Gup

nxp: image loader for loading fip image

function load_img(), is dependent on:
- Recursively calling load_image() defined in common/bl_common.c
- for each image in the fip.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I57ca4b666cd1b0b992b7c0fc2a4260b558c0e2a9

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nxp: svp & sip smc handling

SMC call handling at EL3 due SIP and SVC calls.

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: If86ee43477fc3b6

nxp: svp & sip smc handling

SMC call handling at EL3 due SIP and SVC calls.

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: If86ee43477fc3b6116623928a3299d4e9015df8c

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nxp: psci platform functions used by lib/psci

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I9853263ed38fb2a9f04b9dc7d768942e32074719

nxp: helper function used by plat & common code

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Idafd8b0d94edf3515e8317431274d77289b7a1d0

nxp: add data handler used by bl31

bl31-data file written in assembly helps to manage data at bl31.

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Cha

nxp: add data handler used by bl31

bl31-data file written in assembly helps to manage data at bl31.

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ic3ace03364648cc1174bb05b5b334b9ccdaaa4ed

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nxp: adding the driver.mk file

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ic6c3a173f9f1f7b85244fc4484e247fdbb438b9c

nxp-tool: for creating pbl file from bl2

NXP tool to create pbl from bl2 binary:
- RCW is prepended to BL2.bin
- If TRUSTED_BOARD_BOOT=1, pre-append the CSF header
to be understood by NXP boot-rom.

nxp-tool: for creating pbl file from bl2

NXP tool to create pbl from bl2 binary:
- RCW is prepended to BL2.bin
- If TRUSTED_BOARD_BOOT=1, pre-append the CSF header
to be understood by NXP boot-rom.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Iddc7336a045222e2073ddad86358ebc4440b8bcf

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nxp: adding the smmu driver

NXP SMMU driver API for NXP SoC.
- Currently it supports by-passing SMMU, called only when NXP CAAM
is enabled.
- (TBD) AMQ based SMMU access control: Access Management Q

nxp: adding the smmu driver

NXP SMMU driver API for NXP SoC.
- Currently it supports by-passing SMMU, called only when NXP CAAM
is enabled.
- (TBD) AMQ based SMMU access control: Access Management Qualifiers (AMQ)
advertised by a bus master for a given transaction.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I23a12928ddedb1a2cf4b396606e35c67e016e331

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nxp: cot using nxp internal and mbedtls

Chain of trust(CoT) is enabled on NXP SoC in two ways:
- Using MbedTLS, parsing X509 Certificates.
- Using NXP internal method parsing CSF header

Signed-off-

nxp: cot using nxp internal and mbedtls

Chain of trust(CoT) is enabled on NXP SoC in two ways:
- Using MbedTLS, parsing X509 Certificates.
- Using NXP internal method parsing CSF header

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I78fb28516dfcfa667bebf8a1951ffb24bcab8de4

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