TF-A: Document SMC_PCI_SUPPORT option

Add some basic documentation and pointers for the SMCCC PCI
build options.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Change-Id: Ia35f31d15066ea74135

TF-A: Document SMC_PCI_SUPPORT option

Add some basic documentation and pointers for the SMCCC PCI
build options.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Change-Id: Ia35f31d15066ea74135367cde2dce2f26e6ab31e

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SMCCC/PCI: Handle std svc boilerplate

Add SMC wrappers for handshaking the existence
and basic parameter validation for the SMCCC/PCI
API. The actual read/write/segment validation is
implemented by

SMCCC/PCI: Handle std svc boilerplate

Add SMC wrappers for handshaking the existence
and basic parameter validation for the SMCCC/PCI
API. The actual read/write/segment validation is
implemented by a given platform which will enable
the API by defining SMC_PCI_SUPPORT.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Change-Id: I4485ad0fe6003cec6f5eedef688914d100513c21

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SMCCC/PCI: Add initial PCI conduit definitions

Add constants, structures and build definition for the
new standard SMCCC PCI conduit. These are documented
in DEN0115A.

https://developer.arm.com/doc

SMCCC/PCI: Add initial PCI conduit definitions

Add constants, structures and build definition for the
new standard SMCCC PCI conduit. These are documented
in DEN0115A.

https://developer.arm.com/documentation/den0115/latest

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Change-Id: If667800a26b9ae88626e8d895674c9c2e8c09658

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SMCCC: Hoist SMC_32 sanitization

The SMCCC, part 3 indicates that only the bottom
32-bits of a 32-bit SMC call are valid. The upper
bits must be zero. Lets enforce that so standard
service code can

SMCCC: Hoist SMC_32 sanitization

The SMCCC, part 3 indicates that only the bottom
32-bits of a 32-bit SMC call are valid. The upper
bits must be zero. Lets enforce that so standard
service code can assume its been called that way.

Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Change-Id: I1bac50fbdc3b6ddca5fe2d1d1f96166a65ac4eb4

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feat(plat/mediatek/apu): add mt8192 APU iommap regions

Add APU iommap settings for reviser, apu_ao and
devapc control wrapper.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: Ie8e6a197c0

feat(plat/mediatek/apu): add mt8192 APU iommap regions

Add APU iommap settings for reviser, apu_ao and
devapc control wrapper.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: Ie8e6a197c0f440f9e4ee8101202283a2dbf501a6

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feat(plat/mediatek/apu): setup mt8192 APU_S_S_4 and APU_S_S_5 permission

Setup APU_S_S_4/APU_S_S_5 permission as SEC_RW_ONLY.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: I6c50b2913bf

feat(plat/mediatek/apu): setup mt8192 APU_S_S_4 and APU_S_S_5 permission

Setup APU_S_S_4/APU_S_S_5 permission as SEC_RW_ONLY.

Signed-off-by: Flora Fu <flora.fu@mediatek.com>
Change-Id: I6c50b2913bf34270a1b0ffaf0e0c435fee192a4c

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docs: change owner for MediaTek platforms

Change owner for MediaTek platforms.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I60848a2c1b236cef61c2c22d8278197ad257b1c2

Merge "feat(hw_crc): add support for HW computed CRC" into integration

feat(plat/imx8m): add SiP call for secondary boot

In iMX8MM it is possible to have two copies of bootloader in
SD/eMMC and switch between them. The switch is triggered either
by the BootROM in case

feat(plat/imx8m): add SiP call for secondary boot

In iMX8MM it is possible to have two copies of bootloader in
SD/eMMC and switch between them. The switch is triggered either
by the BootROM in case the bootloader image is faulty OR can be
enforced by the user. To trigger that switch the
PERSIST_SECONDARY_BOOT bit should be set in GPR10 SRC register.
As the bit is retained after WARM reset, that permits to control
BootROM behavior regarding what boot image it will boot after
reset: primary or secondary.

This is useful for reliable bootloader A/B updates, as it permits
switching between two copies of bootloader at different offsets of
the same storage.

If the PERSIST_SECONDARY_BOOT is 0, the boot ROM uses address
0x8400 for the primary image. If the PERSIST_SECONDARY_BOOT is 1,
the boot ROM reads that secondary image table from address 0x8200
on the boot media and uses the address specified in the table for
the secondary image.

Secondary Image Table contains the sector of secondary bootloader
image, exluding the offset to that image (explained below in the
note). To generate the Secondary Image Table, use e.g.:
$ printf '\x0\x0\x0\x0\x0\x0\x0\x0\x33\x22\x11'
'\x00\x00\x10\x0\x0\x00\x0\x0\x0'
> /tmp/sit.bin
$ hexdump -vC /tmp/sit.bin
00000000 00 00 00 00
00000004 00 00 00 00
00000008 33 22 11 00 <--- This is the "tag"
0000000c 00 10 00 00 <--- This is the "firstSectorNumber"
00000010 00 00 00 00

You can also use NXP script from [1][2] imx-mkimage tool for
SIT generation. Note that the firstSectorNumber is NOT the offset
of the IVT, but an offset of the IVT decremented by Image Vector
Table offset (Table 6-25. Image Vector Table Offset and Initial
Load Region Size for iMX8MM/MQ), so for secondary SPL copy at
offset 0x1042 sectors, firstSectorNumber must be 0x1000
(0x42 sectors * 512 = 0x8400 bytes offset).

In order to test redundant boot board should be closed and
SD/MMC manufacture mode disabled, as secondary boot is not
supported in the SD/MMC manufacture mode, which can be disabled
by blowing DISABLE_SDMMC_MFG (example for iMX8MM):
> fuse prog -y 2 1 0x00800000

For additional details check i.MX 8M Mini Apllication Processor
Reference Manual, 6.1.5.4.5 Redundant boot support for
expansion device chapter.

[1] https://source.codeaurora.org/external/imx/imx-mkimage/
[2] scripts/gen_sit.sh
Change-Id: I0a5cea7295a4197f6c89183d74b4011cada52d4c
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>

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Merge "refactor(juno): disable non-invasive debug of secure state" into integration

feat(hw_crc): add support for HW computed CRC

Added support for HW computed CRC using Arm ACLE intrinsics.
These are built-in intrinsics available for ARMv8.1-A, and
onwards.
These intrinsics are en

feat(hw_crc): add support for HW computed CRC

Added support for HW computed CRC using Arm ACLE intrinsics.
These are built-in intrinsics available for ARMv8.1-A, and
onwards.
These intrinsics are enabled via '-march=armv8-a+crc' compile
switch for ARMv8-A (supports CRC instructions optionally).

HW CRC support is enabled unconditionally in BL2 for all Arm
platforms.

HW CRC calculation is verified offline to ensure a similar
result as its respective ZLib utility function.

HW CRC calculation support will be used in the upcoming
firmware update patches.

Change-Id: Ia2ae801f62d2003e89a9c3e6d77469b5312614b3
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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refactor(juno): disable non-invasive debug of secure state

Disable non-invasive debug of secure state for Juno
in release builds. This makes sure that PMU counts
only Non-secure events.

Signed-off-

refactor(juno): disable non-invasive debug of secure state

Disable non-invasive debug of secure state for Juno
in release builds. This makes sure that PMU counts
only Non-secure events.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I0d1c3f96f3b4e48360a7211ae55851d65d291025

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Merge changes I10b5cc17,I382d599f into integration

* changes:
docs(prerequisites): add `--no-save` to `npm install`
fix(hooks): downgrade `package-lock.json` version

docs(prerequisites): add `--no-save` to `npm install`

To avoid the mistake fixed by the previous commit, ensure users install
the Node.js dependencies without polluting the lock file by passing
`--n

docs(prerequisites): add `--no-save` to `npm install`

To avoid the mistake fixed by the previous commit, ensure users install
the Node.js dependencies without polluting the lock file by passing
`--no-save` to the `npm install` line.

Change-Id: I10b5cc17b9001fc2e26deee02bf99ce033a949c1
Signed-off-by: Chris Kay <chris.kay@arm.com>

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fix(hooks): downgrade `package-lock.json` version

The NPM lock file was accidentally updated using a later version of
Node.js than required by the prerequisites. This upgraded the lock file
to the v

fix(hooks): downgrade `package-lock.json` version

The NPM lock file was accidentally updated using a later version of
Node.js than required by the prerequisites. This upgraded the lock file
to the v2 format, which causes a warning on Node.js 14 (the
prerequisites version). This moves the lock file back to v1 by
installing the dependencies with Node.js 14.

Change-Id: I382d599fd2b67b07eb9234d14e7b631db6b11453
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge "feat(makefile): incrementing minor version to reflect v2.5 release" into integration

Merge "docs(juno): update TF-A build instructions" into integration

Merge "docs: spm design document refresh" into integration

fix(security): Set MDCR_EL3.MCCD bit

This patch adds setting MDCR_EL3.MCCD in 'el3_arch_init_common'
macro to disable cycle counting by PMCCNTR_EL0 in EL3 when
FEAT_PMUv3p7 is implemented. This fixe

fix(security): Set MDCR_EL3.MCCD bit

This patch adds setting MDCR_EL3.MCCD in 'el3_arch_init_common'
macro to disable cycle counting by PMCCNTR_EL0 in EL3 when
FEAT_PMUv3p7 is implemented. This fixes failing test
'Leak PMU CYCLE counter values from EL3 on PSCI suspend SMC'
on FVP models with 'has_v8_7_pmu_extension' parameter set to
1 or 2.

Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Change-Id: I2ad3ef501b31ee11306f76cb5a61032ecfd0fbda

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Merge "build(hooks): update Commitizen to ^4.2.4" into integration

Merge "docs(release): add change log for v2.5 release" into integration

feat(spmd): add support for FFA_SPM_ID_GET

Handle calls to the FFA_SPM_ID_GET interface. If FFA_SPM_ID_GET is
invoked from the non-secure physical FF-A instance, return the SPMC id
(defined in the S

feat(spmd): add support for FFA_SPM_ID_GET

Handle calls to the FFA_SPM_ID_GET interface. If FFA_SPM_ID_GET is
invoked from the non-secure physical FF-A instance, return the SPMC id
(defined in the SPMC manifest). If FFA_SPM_ID_GET is invoked from
the secure physical FF-A instance (e.g. the SPMC), return the SPMD id.

Change-Id: Id6d4e96b1da2510386d344e09c4553dba01227ec
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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docs(juno): update TF-A build instructions

Clean up instructions for building/running TF-A on the
Juno platform and add correct link to SCP binaries.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm

docs(juno): update TF-A build instructions

Clean up instructions for building/running TF-A on the
Juno platform and add correct link to SCP binaries.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I536f98082e167edbf45f29ca23cc0db44687bb3b

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feat(makefile): incrementing minor version to reflect v2.5 release

Updated the minor version in the makefile

Change-Id: Ie2b3ce5b36a105a0e2fff52c3740cc9702ca3108
Signed-off-by: Madhukar Pappireddy

feat(makefile): incrementing minor version to reflect v2.5 release

Updated the minor version in the makefile

Change-Id: Ie2b3ce5b36a105a0e2fff52c3740cc9702ca3108
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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build(hooks): update Commitizen to ^4.2.4

An indirect dependency of Commitizen (`merge`) is currently failing the
NPM.js auditor due to vulnerability CVE-2020-28499. This commit moves
the minimum ve

build(hooks): update Commitizen to ^4.2.4

An indirect dependency of Commitizen (`merge`) is currently failing the
NPM.js auditor due to vulnerability CVE-2020-28499. This commit moves
the minimum version of Commitizen to 4.2.4, which has resolved this
vulnerability.

Change-Id: Ia9455bdbe02f7406c1a106f173c4095943a201ed
Signed-off-by: Chris Kay <chris.kay@arm.com>

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