| fa581715 | 24-Jun-2021 |
Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> |
fix(plat/xilinx/versal): use sync method for blocking calls
All API calls except non-blocking should wait for IPI response and read buffer to check return status from firmware. Some of API calls are
fix(plat/xilinx/versal): use sync method for blocking calls
All API calls except non-blocking should wait for IPI response and read buffer to check return status from firmware. Some of API calls are not reading status from IPI payload data. Use sync method which reads actual return status from IPI payload.
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Change-Id: I6f568b85d0da639c264f507122e3015807d8423d
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| c063c5a4 | 24-Jun-2021 |
Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> |
fix(plat/xilinx/zynqmp): use sync method for blocking calls
All API calls except non-blocking should wait for IPI response and read buffer to check return status from firmware. Some of API calls are
fix(plat/xilinx/zynqmp): use sync method for blocking calls
All API calls except non-blocking should wait for IPI response and read buffer to check return status from firmware. Some of API calls are not reading status from IPI payload data. Use sync method which reads actual return status from IPI payload.
Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com> Change-Id: I78f9c061a80cee6d524ade4ef124ca88ce1848cf
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| a43179a6 | 07-Jul-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(plat/zynqmp): extend DT description by TF-A" into integration |
| 2cd96329 | 07-Jul-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "sb/measured-boot" into integration
* changes: refactor(measured boot): revisit error handling (3/3) refactor(measured boot): revisit error handling (2/3) refactor(mea
Merge changes from topic "sb/measured-boot" into integration
* changes: refactor(measured boot): revisit error handling (3/3) refactor(measured boot): revisit error handling (2/3) refactor(measured boot): revisit error handling (1/3)
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| 23b7ad5c | 07-Jul-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "stm32_io_update" into integration
* changes: refactor(plat/st): add stm32image_io_setup fix(plat/st): panic if boot interface is wrong |
| aa79421c | 16-Jun-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(plat/arm): use mmio* functions to read/write NVFLAGS registers
Used mmio* functions to read/write NVFLAGS registers to avoid possibile reordering of instructions by compiler.
Change-Id: Ia
refactor(plat/arm): use mmio* functions to read/write NVFLAGS registers
Used mmio* functions to read/write NVFLAGS registers to avoid possibile reordering of instructions by compiler.
Change-Id: Iae50ac30e5413259cf8554f0fff47512ad83b0fd Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 79d8be3c | 16-Jun-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(plat/arm): mark the flash region as read-only
In the FVP platform, BL1 uses flash only for read purpose hence marked this flash region as read-only.
Change-Id: I3b57130fd4f3b4df522ac075f66
refactor(plat/arm): mark the flash region as read-only
In the FVP platform, BL1 uses flash only for read purpose hence marked this flash region as read-only.
Change-Id: I3b57130fd4f3b4df522ac075f66e9799f237ebb7 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 59ea3648 | 23-May-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(plat/arm): update NV flags on image load/authentication failure
Erasing the FIP TOC header present in a flash is replaced by updating NV flags with an error code on image load/authenticatio
refactor(plat/arm): update NV flags on image load/authentication failure
Erasing the FIP TOC header present in a flash is replaced by updating NV flags with an error code on image load/authentication failure. BL1 component uses these NV flags to detect whether a firmware update is needed or not. These NV flags get cleared once the firmware update gets completed.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I6232a0db07c89b2373b7b9d28acd37df6203d914
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| 49d3bd8c | 02-Jul-2021 |
Garmin Chang <garmin.chang@mediatek.com> |
feat(plat/mediatek/mt8195): add DCM driver
DCM means dynamic clock management, and it can dynamically slow down or gate clocks during CPU or bus idle.
1. Add MCUSYS related DCM drivers. 2. Enable M
feat(plat/mediatek/mt8195): add DCM driver
DCM means dynamic clock management, and it can dynamically slow down or gate clocks during CPU or bus idle.
1. Add MCUSYS related DCM drivers. 2. Enable MCUSYS related DCM by default.
Change-Id: I3237199bc217bd3682f51d31284db5fd0324b396 Signed-off-by: Garmin Chang <garmin.chang@mediatek.com>
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| bc97629b | 05-Jul-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_fixes" into integration
* changes: fix(tools/stm32image): improve the tool fix(plat/st): add STM32IMAGE_SRC |
| 51018a05 | 23-Jun-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
refactor(measured boot): revisit error handling (3/3)
- In tpm_record_measurement():
The platform layer is responsible for providing an exhaustive list of images to measure. If it doesn't th
refactor(measured boot): revisit error handling (3/3)
- In tpm_record_measurement():
The platform layer is responsible for providing an exhaustive list of images to measure. If it doesn't then this should be treated as a programming error, as documented in [1].
Thus, turn the error test into an assertion.
[1] https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-guidelines.html#using-assert-to-check-for-programming-errors
Change-Id: I002309c2ebdf2d348a7d12a8f7f9e82465046b8e Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 0c83207a | 23-Jun-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
refactor(measured boot): revisit error handling (2/3)
- In add_event2():
Turn the first error condition checking whether there is room for an extra event2 data structure into an assertion. The
refactor(measured boot): revisit error handling (2/3)
- In add_event2():
Turn the first error condition checking whether there is room for an extra event2 data structure into an assertion. The platform layer is responsible for choosing an appropriate event log buffer size based on the number of measurements it expects. If this assertion fires, the platform macro EVENT_LOG_SIZE should be adjusted and the firmware recompiled.
Call this assumption out in the function documentation.
Also remove the second error condition check, which is a subset of the first one and thus is redundant.
As a result of these changes, add_event2() can no longer fail. Thus, change its return type from int to void.
Also, the 'size_of_event' local variable is now unused in release builds so remove it and move its value into the assertion.
Change-Id: I113fc141de59708b20435a0c7126255561ab7786 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| ddb07a56 | 23-Jun-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
refactor(measured boot): revisit error handling (1/3)
- In event_log_init():
Throughout the function, we are incrementing a pointer by some fixed amounts of bytes (corresponding to the size
refactor(measured boot): revisit error handling (1/3)
- In event_log_init():
Throughout the function, we are incrementing a pointer by some fixed amounts of bytes (corresponding to the size of some data structure or to some constant number of bytes), there is no variable-size increments in the picture. Thus it seems pointless to verify that the pointer has indeed been incremented by this fixed amount of bytes afterwards.
For this reason, remove these checks altogether. As a result, the start_ptr local variable is now unused so remove it as well.
Change-Id: I612e2278cd3a63d1417427e45d81e285503f5efe Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 82f9930d | 21-Jun-2021 |
Ruchika Gupta <ruchika.gupta@linaro.org> |
refactor(plat/qemu): increase the non-secure DRAM size
In the qemu memory map 1GB and up is RAM. Change the size of NS DRAM to 3GB to support VM's with more memory requirements.
Signed-off-by: Ruch
refactor(plat/qemu): increase the non-secure DRAM size
In the qemu memory map 1GB and up is RAM. Change the size of NS DRAM to 3GB to support VM's with more memory requirements.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> Change-Id: If15cf3b9d3e2e7876c40ce888f22e887893fe696
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| 976aedc9 | 05-Jul-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "style(measured boot): fix incorrect indentation" into integration |
| ef65c9c6 | 23-Jun-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
style(measured boot): fix incorrect indentation
Change-Id: I5b84a28ed254a7c7bb95c18fa999592a4e3f6d90 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> |
| 9fa5db4d | 05-Jul-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "sb/measured-boot" into integration
* changes: refactor(plat/fvp): tidy up list of images to measure docs: explain Measured Boot dependency on Trusted Boot |
| 7fa35d06 | 02-Jul-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ib8502f9b,I388fd231,I7bd37912,I3a186ed7 into integration
* changes: feat(plat/mediatek/mt8195): add SPM suspend driver feat(plat/mediatek/mt8195): support MCUSYS off when system su
Merge changes Ib8502f9b,I388fd231,I7bd37912,I3a186ed7 into integration
* changes: feat(plat/mediatek/mt8195): add SPM suspend driver feat(plat/mediatek/mt8195): support MCUSYS off when system suspend feat(plat/mediatek/mt8195): add support for PTP3 fix(plat/mediatek/mt8195): extend MMU region size
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| 05f47b77 | 02-Jul-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(spm): add Ivy partition to tb fw config" into integration |
| 859e346b | 28-Jun-2021 |
Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8195): add SPM suspend driver
Support DRAM/MAINPLL/26M off when system suspend.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com> Change-Id: Ib850
feat(plat/mediatek/mt8195): add SPM suspend driver
Support DRAM/MAINPLL/26M off when system suspend.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com> Change-Id: Ib8502f9b0b4e47aa405e5449f0b6d483bd3f5d77
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| d336e093 | 28-Jun-2021 |
Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
Add drivers to support MCUSYS off when system suspend.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.
feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
Add drivers to support MCUSYS off when system suspend.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com> Change-Id: I388fd2318f471083158992464ecdf2181fc7d87a
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| 04818963 | 20-Jun-2021 |
Elly Chiang <elly.chiang@mediatek.com> |
feat(plat/mediatek/mt8195): add support for PTP3
Add PTP3 drivers to protect CPU excessive voltage drop in CPU heavy loading.
Change-Id: I7bd37912c32d5328ba0287fccc8409794bd19c1d Signed-off-by: Ell
feat(plat/mediatek/mt8195): add support for PTP3
Add PTP3 drivers to protect CPU excessive voltage drop in CPU heavy loading.
Change-Id: I7bd37912c32d5328ba0287fccc8409794bd19c1d Signed-off-by: Elly Chiang <elly.chiang@mediatek.com>
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| 9ff8b8ca | 18-Jun-2021 |
Tinghan Shen <tinghan.shen@mediatek.com> |
fix(plat/mediatek/mt8195): extend MMU region size
In mt8195 suspend/resume flow, ATF has to communicate with a subsys by read/write the subsys registers. However, the register region of subsys doesn
fix(plat/mediatek/mt8195): extend MMU region size
In mt8195 suspend/resume flow, ATF has to communicate with a subsys by read/write the subsys registers. However, the register region of subsys doesn't include in the MMU mapping region. It triggers MMU faults.
This patch extends the MMU region 0 size to cover all mt8195 HW modules. This patch also remove MMU region 1 because region 0 covers region 1.
Change-Id: I3a186ed71d0d963b59ae55e27a6d27a01fe4f638 Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
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| 1bc02c2e | 22-Mar-2021 |
Daniel Boulby <daniel.boulby@arm.com> |
feat(spm): add Ivy partition to tb fw config
The partition layout description JSON file generated by TF-A tests declares a fourth test partition called Ivy demonstrating the implementation of a S-EL
feat(spm): add Ivy partition to tb fw config
The partition layout description JSON file generated by TF-A tests declares a fourth test partition called Ivy demonstrating the implementation of a S-EL0 partition supported by a S-EL1 shim.
Change-Id: If8562acfc045d6496dfdb3df0524b3a069357f8e Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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| 365e0f77 | 01-Jul-2021 |
Mark Dykes <mark.dykes@arm.com> |
Merge changes from topic "st_fixes" into integration
* changes: fix(plat/st): correct IO compensation disabling fix(plat/st): correct BSEC error code management fix(drivers/st/pmic): missing e
Merge changes from topic "st_fixes" into integration
* changes: fix(plat/st): correct IO compensation disabling fix(plat/st): correct BSEC error code management fix(drivers/st/pmic): missing error check fix(drivers/st/pmic): initialize i2c_state fix(drivers/st/clk): use correct return value
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