fix(docs): fix `FF-A` substitution

In this change the `FFA` substitution has been renamed to `FF-A`, as
well as the term it substitutes to - the `FFA` term does not exist.

Change-Id: I0c33d00d82a54

fix(docs): fix `FF-A` substitution

In this change the `FFA` substitution has been renamed to `FF-A`, as
well as the term it substitutes to - the `FFA` term does not exist.

Change-Id: I0c33d00d82a5498f7088e6a2b088a0006dfe7f65
Signed-off-by: Chris Kay <chris.kay@arm.com>

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build(docs): pin Python dependencies

Recently some of our dependencies' dependencies have come into conflict
and are now causing errors when trying to install the Python
requirements. This change in

build(docs): pin Python dependencies

Recently some of our dependencies' dependencies have come into conflict
and are now causing errors when trying to install the Python
requirements. This change introduces `requirements.in` - a list of our
own direct dependencies, and pins them to specific versions.

The existing `requirements.txt` file is now automatically generated by
the `pip-compile` tool - part of the pip-tools package - and ensures
that our dependency tree is also pinned. This is a manual process at
present, but our dependencies are updated infrequently enough that it's
not introducing any major overhead.

Change-Id: I3cd0c11a1a4eccaf0d77b538cfdb94474833b811
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge "fix(rme): fixes a shift by 64 bits bug in the RME GPT library" into integration

Merge "docs(spm): document s-el0 partition support" into integration

fix(plat/arm): fix a VERBOSE trace

When the console verbosity is at maximum, fconf_populate_arm_sp()
prints the UUID and load address of each secure partition. However,
the load address has not been

fix(plat/arm): fix a VERBOSE trace

When the console verbosity is at maximum, fconf_populate_arm_sp()
prints the UUID and load address of each secure partition. However,
the load address has not been retrieved yet at this point, which means
all partitions show a zero load address.

Move the trace after we have retrieved the SP's load address from the
device tree to make it more meaningful.

Change-Id: I58ef7df6c9107a433f61113cafd8f0855c468d40
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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Merge "fix(spm_mm): do not compile if SVE/SME is enabled" into integration

fix(rme): fixes a shift by 64 bits bug in the RME GPT library

Under certain configurations of PPS and L0GPTSZ a macro could result in
a right shift by 64 bits. This patch removes that possibility by

fix(rme): fixes a shift by 64 bits bug in the RME GPT library

Under certain configurations of PPS and L0GPTSZ a macro could result in
a right shift by 64 bits. This patch removes that possibility by
limiting the total size of each shift to the maximum width of the L0 or
L1 index field in a physical address. In addition, it adds more detail
about how these values are calculated.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ie71c8e6f922a5bb522a6169701bfc36fc99f765a

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fix(spm_mm): do not compile if SVE/SME is enabled

As spm_mm cannot handle SVE/SME usage in NS world so its better to give
compilation error when ENABLE_SVE_FOR_NS=1 or ENABLE_SME_FOR_NS=1.

Signed-o

fix(spm_mm): do not compile if SVE/SME is enabled

As spm_mm cannot handle SVE/SME usage in NS world so its better to give
compilation error when ENABLE_SVE_FOR_NS=1 or ENABLE_SME_FOR_NS=1.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I69dbb272ca681bb020501342008eda20d4c0b096

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Merge changes I9e6feeee,If1cd7962 into integration

* changes:
docs(rme): add description of TF-A changes for RME
docs(gpt): add documentation page for GPT library

docs(rme): add description of TF-A changes for RME

This patch expands the RME documentation with description of TF-A
changes for RME. It also modifies some other parts of TF-A documentation
to accou

docs(rme): add description of TF-A changes for RME

This patch expands the RME documentation with description of TF-A
changes for RME. It also modifies some other parts of TF-A documentation
to account for RME changes.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I9e6feeee235f0ba4b767d239f15840f1e0c540bb

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docs(gpt): add documentation page for GPT library

This patch adds some documentation for the GPT library as well as adds
code owners for it.

Signed-off-by: John Powell <john.powell@arm.com>
Change-

docs(gpt): add documentation page for GPT library

This patch adds some documentation for the GPT library as well as adds
code owners for it.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: If1cd79626eadb27e1024d731b26ee2e20af74a66

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Merge "feat(sme): enable SME functionality" into integration

feat(sme): enable SME functionality

This patch adds two new compile time options to enable SME in TF-A:
ENABLE_SME_FOR_NS and ENABLE_SME_FOR_SWD for use in non-secure and
secure worlds respectively.

feat(sme): enable SME functionality

This patch adds two new compile time options to enable SME in TF-A:
ENABLE_SME_FOR_NS and ENABLE_SME_FOR_SWD for use in non-secure and
secure worlds respectively. Setting ENABLE_SME_FOR_NS=1 will enable
SME for non-secure worlds and trap SME, SVE, and FPU/SIMD instructions
in secure context. Setting ENABLE_SME_FOR_SWD=1 will disable these
traps, but support for SME context management does not yet exist in
SPM so building with SPD=spmd will fail.

The existing ENABLE_SVE_FOR_NS and ENABLE_SVE_FOR_SWD options cannot
be used with SME as it is a superset of SVE and will enable SVE and
FPU/SIMD along with SME.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Iaaac9d22fe37b4a92315207891da848a8fd0ed73

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Merge "fix: use correct printf format for uint64_t" into integration

fix: use correct printf format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Manish Pande

fix: use correct printf format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ic6811cc1788c698adde0807e5f8ab5290a900a26

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Merge "fix(mt8195): use correct print format for uint64_t" into integration

fix(mt8195): use correct print format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit variables.

Change-Id: I09a8d

fix(mt8195): use correct print format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit variables.

Change-Id: I09a8d174694d4b170a6ef2e4a03df13adc829c00
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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Merge "docs(spm): secure interrupt management in SPMC" into integration

docs(spm): secure interrupt management in SPMC

Change-Id: I9bed67e4146ae92123ab925334e37fb0d3677ef1
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(sdei): fix assert while kdump issue" into integration

Merge "fix(gpt_rme): use correct print format for uint64_t" into integration

fix(gpt_rme): use correct print format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Mani

fix(gpt_rme): use correct print format for uint64_t

sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I30472411467061d58cc6ee22407ed3bad2552751

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Merge "Changing SMC code for transitioning Granule" into integration

Merge "fix(spmd): error macro to use correct print format" into integration

Merge "feat(measured boot): add documentation to build and run PoC" into integration