Merge "docs(maintainers): add the new maintainer for MediaTek SoCs" into integration

docs(maintainers): add the new maintainer for MediaTek SoCs

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ia9409127e91e55726db0856e3f13f009d3c7c866

fix(fwu): rename is_fwu_initialized

The variable is_fwu_initialized was initialized after
plat_fwu_set_images_source() is called.
But some functions called by plat_fwu_set_images_source() for STM32M

fix(fwu): rename is_fwu_initialized

The variable is_fwu_initialized was initialized after
plat_fwu_set_images_source() is called.
But some functions called by plat_fwu_set_images_source() for STM32MP1
implementation expect is_fwu_initialized is set to true with asserts.
Rename is_fwu_initialized to is_metadata_initialized, and set it before
plat_fwu_set_images_source() is called.

Change-Id: I17c6ee6293dfa55385b0c859db442647f0bebaed
Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-ext@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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docs(layerscape): add ls1088a soc and board support

Update document for nxp-layerscape to add ls1088a SoC and ls1088ardb,
update maintainer of ls1088a platforms.

Signed-off-by: Jiafei Pan <Jiafei.P

docs(layerscape): add ls1088a soc and board support

Update document for nxp-layerscape to add ls1088a SoC and ls1088ardb,
update maintainer of ls1088a platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ic7fdc7b1bbf22e50646991093366a88ee523ffe3

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feat(ls1088aqds): add ls1088aqds board support

Add QDS support for ls1088a.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gup

feat(ls1088aqds): add ls1088aqds board support

Add QDS support for ls1088a.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6c7a7a23fa6b9ba01c011a7e6237f8063d45e261

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feat(ls1088ardb): add ls1088ardb board support

The LS1088A reference design board provides a comprehensive platform
that enables design and evaluation of the product (LS1088A processor).

Signed-off

feat(ls1088ardb): add ls1088ardb board support

The LS1088A reference design board provides a comprehensive platform
that enables design and evaluation of the product (LS1088A processor).

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If4ca24fcee7a4c2c514303853955f1b00298c0e5

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feat(ls1088a): add new SoC platform ls1088a

LS1088A is a cost-effective, powerefficient, and highly integrated
SoC device featuring eight extremely power-efficient 64-bit ARM
Cortex-A53 cores with E

feat(ls1088a): add new SoC platform ls1088a

LS1088A is a cost-effective, powerefficient, and highly integrated
SoC device featuring eight extremely power-efficient 64-bit ARM
Cortex-A53 cores with ECC-protected L1 and L2 cache memories for
high reliability, running up to 1.6 GHz.

This patch is to add ls1088a SoC support in TF-A.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Id9ebcdad1beab07ea81a41955edd4f471d6cf090

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build(changelog): add new scopes for ls1088a

Add new scopes for ls1088a SoC, RDB and QDS boards.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I7c0018ecee3c590253cf258851a28c4dd7f9c1a1

feat(bl2): add support to separate no-loadable sections

Add new options SEPARATE_BL2_NOLOAD_REGION to separate no-loadable
sections (.bss, stack, page tables) to a ram region specified
by BL2_NOLOAD

feat(bl2): add support to separate no-loadable sections

Add new options SEPARATE_BL2_NOLOAD_REGION to separate no-loadable
sections (.bss, stack, page tables) to a ram region specified
by BL2_NOLOAD_START and BL2_NOLOAD_LIMIT.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I844ee0fc405474af0aff978d292c826fbe0a82fd

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refactor(layerscape): refine comparison of inerconnection

Refine the code to be compatible with new CCN504 which is used
by ls2088a.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei

refactor(layerscape): refine comparison of inerconnection

Refine the code to be compatible with new CCN504 which is used
by ls2088a.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2e2b3bbb9392862b04bf8a89dfb9575bf4be974a

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feat(layerscape): add soc helper macro definition for chassis 3

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I27b3a1f597de84dc2a007798e54eb919c877281a

feat(nxp-gic): add some macros definition for gicv3

Add macros as follows,
- GICD_ISENABLER_1
- GICD_ISENABLER_3
- GICD_ICENABLER_1
- GICD_ICENABLER_3

Signed-off-by: Biwen Li <biwen

feat(nxp-gic): add some macros definition for gicv3

Add macros as follows,
- GICD_ISENABLER_1
- GICD_ISENABLER_3
- GICD_ICENABLER_1
- GICD_ICENABLER_3

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia522ab4bc496d9a47613a49829b65db96e2b1279

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feat(layerscape): add CHASSIS 3 support for tbbr

Support CHASSIS 3.0(such as SoC LS1088A).

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6084

feat(layerscape): add CHASSIS 3 support for tbbr

Support CHASSIS 3.0(such as SoC LS1088A).

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I60843bc4d604f0de1d91c6d3ad5eb4921cdcc91a

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feat(layerscape): define more chassis 3 hardware address

Add base address definiton for Chassis 3 platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6041b93c9e9bb49af60743bd277ac

feat(layerscape): define more chassis 3 hardware address

Add base address definiton for Chassis 3 platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6041b93c9e9bb49af60743bd277ac7cc6f1b9da8

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feat(nxp-crypto): add chassis 3 support

Add Chassis 3 support for CAAM driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ied26dd3881489a03017a45966888a61a0813492c

feat(nxp-dcfg): add Chassis 3 support

Add support for Chassis 3.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I85cf68d4f1db81bf344e34dce13799

feat(nxp-dcfg): add Chassis 3 support

Add support for Chassis 3.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I85cf68d4f1db81bf344e34dce13799ae173aa23a

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feat(lx2): enable DDR erratas for lx2 platforms

Enable DDR erratas for lx2 platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia2cf6ed077acf81882247153ec38bda708a6f007

feat(layerscape): print DDR errata information

Print Errata information in debug mode.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I70d6baa4dc3ffd79fedbc827555268d8f06605c7

feat(nxp-ddr): add workaround for errata A050958

Set the receiver gain to max value to recover
cold temp marginality issue for phy-gen2

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-b

feat(nxp-ddr): add workaround for errata A050958

Set the receiver gain to max value to recover
cold temp marginality issue for phy-gen2

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If639fa3ed404cf6e1b8abcc2b7137db1fdd0b2c2

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feat(layerscape): add new soc errata a010539 support

Add new soc errata a010539 support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Idbd8caaac12da8ab4f39dc0019cb656bcf4f3401

feat(layerscape): add new soc errata a009660 support

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ice37155d971dec5c610026043e34b64f761fc1b7

feat(nxp-ddr): add rawcard 1F support

New UDIMM 18ADF2G72AZ-2G6E1 has raw card ID = 0x1F

Also, changing mask for raw card ID from - 0x8f -> 0x9f

Changing the mask need the raw card to changed from

feat(nxp-ddr): add rawcard 1F support

New UDIMM 18ADF2G72AZ-2G6E1 has raw card ID = 0x1F

Also, changing mask for raw card ID from - 0x8f -> 0x9f

Changing the mask need the raw card to changed from 0x0f -> 0x1f

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iee8e732ebc5e09cdca6917be608f1597c7edd9f9

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fix(layerscape): fix build issue of mmap_add_ddr_region_dynamically

Fix build issue of mmap_add_ddr_region_dynamically():
ls_bl2_el3_setup.c:(.text.bl2_plat_preload_setup+0x28): undefined
reference

fix(layerscape): fix build issue of mmap_add_ddr_region_dynamically

Fix build issue of mmap_add_ddr_region_dynamically():
ls_bl2_el3_setup.c:(.text.bl2_plat_preload_setup+0x28): undefined
reference to mmap_add_ddr_region_dynamically

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I74a8b4c2337fc0646d6acb16ce61755c5efbdf38

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fix(nxp-tools): fix create_pbl print log

Replace bl2_offset with bl2_loc, and fix byte-swapping for
Chassis2 SoC(s) only.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafe

fix(nxp-tools): fix create_pbl print log

Replace bl2_offset with bl2_loc, and fix byte-swapping for
Chassis2 SoC(s) only.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ieb5fd6468178325bfb6fb89b6c31c75cd9030363

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build(changelog): add new scopes for NXP driver

Add new scope for NXP DDR drivers and GIC drivers.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I8ff4d203c474593fe2cff846e0040fc8651b20b6