fix(layerscape): fix coverity issue

Check return value of mmap_add_dynamic_region().

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I84e257b3052371e18af158c3254f42a1bae0da10

Merge "fix(scmi): use same type for message_id" into integration

fix(nxp-ddr): fix coverity issue

Check return value of mmap_add_dynamic_region().

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1317e4822f3da329185d54005f08047872b5cdce

Merge changes Ic1796898,I93bd392a into integration

* changes:
fix(errata): workaround for Cortex A78 AE erratum 2395408
fix(errata): workaround for Cortex A78 AE erratum 2376748

Merge changes from topic "rme-attest" into integration

* changes:
feat(rme): add dummy realm attestation key to RMMD
feat(rme): add dummy platform token to RMMD

refactor(stm32mp1-fdts): remove nvmem_layout node

Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout"
no more used in TF-A code to simplify the device tree.

Signed-off-by: Patrick

refactor(stm32mp1-fdts): remove nvmem_layout node

Remove the nvmem_layout node with compatible "st,stm32-nvmem-layout"
no more used in TF-A code to simplify the device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I3748b20b7d3c60ee64ead15541fac1fd12656600

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refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node

Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.

The expected OTP NAME can

refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node

Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.

The expected OTP NAME can directly be found in a sub-node named
NAME@ADDRESS of the BSEC node, the NVMEM provider node.

This patch also removes this specific binding introduced for TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic703385fad1bec5bef1cee583fbe9fbbf6aea216

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refactor(st): remove useless includes

The stm32mp_dt.c file does not need anything from DDR header files.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ibfe23204d68ee2e863cd2eda3d725

refactor(st): remove useless includes

The stm32mp_dt.c file does not need anything from DDR header files.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ibfe23204d68ee2e863cd2eda3d725baa830b729a

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Merge changes from topics "ls1088a", "ls1088a-prepare" into integration

* changes:
docs(layerscape): add ls1088a soc and board support
feat(ls1088aqds): add ls1088aqds board support
feat(ls108

Merge changes from topics "ls1088a", "ls1088a-prepare" into integration

* changes:
docs(layerscape): add ls1088a soc and board support
feat(ls1088aqds): add ls1088aqds board support
feat(ls1088ardb): add ls1088ardb board support
feat(ls1088a): add new SoC platform ls1088a
build(changelog): add new scopes for ls1088a
feat(bl2): add support to separate no-loadable sections
refactor(layerscape): refine comparison of inerconnection
feat(layerscape): add soc helper macro definition for chassis 3
feat(nxp-gic): add some macros definition for gicv3
feat(layerscape): add CHASSIS 3 support for tbbr
feat(layerscape): define more chassis 3 hardware address
feat(nxp-crypto): add chassis 3 support
feat(nxp-dcfg): add Chassis 3 support
feat(lx2): enable DDR erratas for lx2 platforms
feat(layerscape): print DDR errata information
feat(nxp-ddr): add workaround for errata A050958
feat(layerscape): add new soc errata a010539 support
feat(layerscape): add new soc errata a009660 support
feat(nxp-ddr): add rawcard 1F support
fix(layerscape): fix build issue of mmap_add_ddr_region_dynamically
fix(nxp-tools): fix create_pbl print log
build(changelog): add new scopes for NXP driver

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feat(rme): add dummy realm attestation key to RMMD

Add a dummy realm attestation key to RMMD, and return it on request.
The realm attestation key is requested with an SMC with the following
paramete

feat(rme): add dummy realm attestation key to RMMD

Add a dummy realm attestation key to RMMD, and return it on request.
The realm attestation key is requested with an SMC with the following
parameters:
* Fid (0xC400001B2).
* Attestation key buffer PA (the realm attestation key is copied
at this address by the monitor).
* Attestation key buffer length as input and size of realm
attesation key as output.
* Type of elliptic curve.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Signed-off-by: Subhasish Ghosh <subhasish.ghosh@arm.com>
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: I12d8d98fd221f4638ef225c9383374ddf6e65eac

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Merge "fix(fwu): rename is_fwu_initialized" into integration

Merge "docs(maintainers): add the new maintainer for MediaTek SoCs" into integration

docs(maintainers): add the new maintainer for MediaTek SoCs

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ia9409127e91e55726db0856e3f13f009d3c7c866

fix(fwu): rename is_fwu_initialized

The variable is_fwu_initialized was initialized after
plat_fwu_set_images_source() is called.
But some functions called by plat_fwu_set_images_source() for STM32M

fix(fwu): rename is_fwu_initialized

The variable is_fwu_initialized was initialized after
plat_fwu_set_images_source() is called.
But some functions called by plat_fwu_set_images_source() for STM32MP1
implementation expect is_fwu_initialized is set to true with asserts.
Rename is_fwu_initialized to is_metadata_initialized, and set it before
plat_fwu_set_images_source() is called.

Change-Id: I17c6ee6293dfa55385b0c859db442647f0bebaed
Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-ext@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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docs(layerscape): add ls1088a soc and board support

Update document for nxp-layerscape to add ls1088a SoC and ls1088ardb,
update maintainer of ls1088a platforms.

Signed-off-by: Jiafei Pan <Jiafei.P

docs(layerscape): add ls1088a soc and board support

Update document for nxp-layerscape to add ls1088a SoC and ls1088ardb,
update maintainer of ls1088a platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ic7fdc7b1bbf22e50646991093366a88ee523ffe3

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feat(ls1088aqds): add ls1088aqds board support

Add QDS support for ls1088a.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gup

feat(ls1088aqds): add ls1088aqds board support

Add QDS support for ls1088a.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6c7a7a23fa6b9ba01c011a7e6237f8063d45e261

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feat(ls1088ardb): add ls1088ardb board support

The LS1088A reference design board provides a comprehensive platform
that enables design and evaluation of the product (LS1088A processor).

Signed-off

feat(ls1088ardb): add ls1088ardb board support

The LS1088A reference design board provides a comprehensive platform
that enables design and evaluation of the product (LS1088A processor).

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If4ca24fcee7a4c2c514303853955f1b00298c0e5

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feat(ls1088a): add new SoC platform ls1088a

LS1088A is a cost-effective, powerefficient, and highly integrated
SoC device featuring eight extremely power-efficient 64-bit ARM
Cortex-A53 cores with E

feat(ls1088a): add new SoC platform ls1088a

LS1088A is a cost-effective, powerefficient, and highly integrated
SoC device featuring eight extremely power-efficient 64-bit ARM
Cortex-A53 cores with ECC-protected L1 and L2 cache memories for
high reliability, running up to 1.6 GHz.

This patch is to add ls1088a SoC support in TF-A.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Id9ebcdad1beab07ea81a41955edd4f471d6cf090

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build(changelog): add new scopes for ls1088a

Add new scopes for ls1088a SoC, RDB and QDS boards.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I7c0018ecee3c590253cf258851a28c4dd7f9c1a1

feat(bl2): add support to separate no-loadable sections

Add new options SEPARATE_BL2_NOLOAD_REGION to separate no-loadable
sections (.bss, stack, page tables) to a ram region specified
by BL2_NOLOAD

feat(bl2): add support to separate no-loadable sections

Add new options SEPARATE_BL2_NOLOAD_REGION to separate no-loadable
sections (.bss, stack, page tables) to a ram region specified
by BL2_NOLOAD_START and BL2_NOLOAD_LIMIT.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I844ee0fc405474af0aff978d292c826fbe0a82fd

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refactor(layerscape): refine comparison of inerconnection

Refine the code to be compatible with new CCN504 which is used
by ls2088a.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei

refactor(layerscape): refine comparison of inerconnection

Refine the code to be compatible with new CCN504 which is used
by ls2088a.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2e2b3bbb9392862b04bf8a89dfb9575bf4be974a

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feat(layerscape): add soc helper macro definition for chassis 3

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I27b3a1f597de84dc2a007798e54eb919c877281a

feat(nxp-gic): add some macros definition for gicv3

Add macros as follows,
- GICD_ISENABLER_1
- GICD_ISENABLER_3
- GICD_ICENABLER_1
- GICD_ICENABLER_3

Signed-off-by: Biwen Li <biwen

feat(nxp-gic): add some macros definition for gicv3

Add macros as follows,
- GICD_ISENABLER_1
- GICD_ISENABLER_3
- GICD_ICENABLER_1
- GICD_ICENABLER_3

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia522ab4bc496d9a47613a49829b65db96e2b1279

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feat(layerscape): add CHASSIS 3 support for tbbr

Support CHASSIS 3.0(such as SoC LS1088A).

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6084

feat(layerscape): add CHASSIS 3 support for tbbr

Support CHASSIS 3.0(such as SoC LS1088A).

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I60843bc4d604f0de1d91c6d3ad5eb4921cdcc91a

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feat(layerscape): define more chassis 3 hardware address

Add base address definiton for Chassis 3 platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6041b93c9e9bb49af60743bd277ac

feat(layerscape): define more chassis 3 hardware address

Add base address definiton for Chassis 3 platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6041b93c9e9bb49af60743bd277ac7cc6f1b9da8

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