| 1ac6af11 | 11-May-2022 |
Ronak Jain <ronak.jain@xilinx.com> |
fix(plat/zynqmp): fix coverity scan warnings
- Fix uninitialized variable use - Fix array overrun issue
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com> Signed-off-by: Ronak Jain <ronak.jain@xil
fix(plat/zynqmp): fix coverity scan warnings
- Fix uninitialized variable use - Fix array overrun issue
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com> Signed-off-by: Ronak Jain <ronak.jain@xilinx.com> Change-Id: I604416531122c9208793d66c26b1fa69c95f3165
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| 0de3edac | 24-Mar-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
build(changelog): add new scope for Arm SMMU driver
Added new scope for Arm SMMU driver.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Change-Id: I62f5ed36657a071d125cdddacbff9fb23d2bc
build(changelog): add new scope for Arm SMMU driver
Added new scope for Arm SMMU driver.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Change-Id: I62f5ed36657a071d125cdddacbff9fb23d2bc8e0
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| 6c5c5320 | 25-Mar-2022 |
Lucian Paul-Trifu <lucian.paultrifu@gmail.com> |
feat(smmu): add SMMU abort transaction function
Created a function to abort all pending NS DMA transactions to engage complete DMA protection. This call will be used by the subsequent DRTM implement
feat(smmu): add SMMU abort transaction function
Created a function to abort all pending NS DMA transactions to engage complete DMA protection. This call will be used by the subsequent DRTM implementation changes.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com> Change-Id: I94992b54c570327d6746295073822a9c0ebdc85d
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| 859eabd4 | 14-Feb-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
docs(build): add build option for DRTM support
Documented the build option for DRTM support.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Signed-off-by: Lucian Paul-Trifu <lucian.paul
docs(build): add build option for DRTM support
Documented the build option for DRTM support.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com> Change-Id: Ic1543ee5f1d0046d5062d9744bd1a136d940b687
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| 00e28874 | 02-Mar-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
build(drtm): add DRTM support build option
Added DRTM support build option in the makefiles. This build option will be used by the DRTM implementation in the subsequent patches.
Signed-off-by: Mani
build(drtm): add DRTM support build option
Added DRTM support build option in the makefiles. This build option will be used by the DRTM implementation in the subsequent patches.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Signed-off-by: Lucian Paul-Trifu <lucian.paultrifu@gmail.com> Change-Id: I15366f86b3ebd6ab2ebcb192753015d547cdddee
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| fd36b00f | 18-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "xlnx_zynqmp_misra_fix" into integration
* changes: fix(zynqmp): resolve misra 8.3 warnings fix(zynqmp): resolve misra R8.4 warnings |
| b515f541 | 08-Apr-2022 |
Zelalem Aweke <zelalem.aweke@arm.com> |
refactor(context mgmt): refactor initialization of EL1 context registers
When SPMC is present at S-EL2, EL1 context registers don't need to be initialized for Secure state. This patch makes sure tha
refactor(context mgmt): refactor initialization of EL1 context registers
When SPMC is present at S-EL2, EL1 context registers don't need to be initialized for Secure state. This patch makes sure that EL1 context registers are initialized only for Non-secure state, and when SPMC is not present at S-EL2
Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com> Change-Id: I4a60b258c31ce5f6472a243e2687159cc495259b
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| 0482fdf8 | 18-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "build(deps): bump ansi-regex from 3.0.0 to 3.0.1" into integration |
| a283d19f | 06-May-2022 |
Rohit Ner <rohitner@google.com> |
feat(partition): verify crc while loading gpt header
This change makes use of 32-bit crc for calculating gpt header crc and compares it with the given value.
Signed-off-by: Rohit Ner <rohitner@goog
feat(partition): verify crc while loading gpt header
This change makes use of 32-bit crc for calculating gpt header crc and compares it with the given value.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: I49bca7aab2c3884881c4b7d90d31786a895290e6
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| e682c723 | 11-May-2022 |
Rohit Ner <rohitner@google.com> |
build(hikey): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com>
build(hikey): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: I0d524760bf52e1d9b4a103f556231f20146bd78e
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| 7a756a57 | 11-May-2022 |
Rohit Ner <rohitner@google.com> |
build(agilex): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com
build(agilex): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: I1290972c7d2626262d4b6d68b99bb8f2c4b6744c
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| 4f53bd29 | 11-May-2022 |
Rohit Ner <rohitner@google.com> |
build(stratix10): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.
build(stratix10): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: Ie26d9e5943453ce54ee8c72c6e44170577e3afc0
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| 7da7f1f0 | 18-May-2022 |
Rohit Ner <rohitner@google.com> |
build(stm32mp1): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.c
build(stm32mp1): platform changes for verifying gpt header crc
This change makes the necessary additions to makefile of platforms using partition driver.
Signed-off-by: Rohit Ner <rohitner@google.com> Change-Id: I66f6daaa0deac984b0aa5f2a182385410189ba8a
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| a48bd78b | 16-May-2022 |
dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> |
build(deps): bump ansi-regex from 3.0.0 to 3.0.1
Bumps [ansi-regex](https://github.com/chalk/ansi-regex) from 3.0.0 to 3.0.1. - [Release notes](https://github.com/chalk/ansi-regex/releases) - [Commi
build(deps): bump ansi-regex from 3.0.0 to 3.0.1
Bumps [ansi-regex](https://github.com/chalk/ansi-regex) from 3.0.0 to 3.0.1. - [Release notes](https://github.com/chalk/ansi-regex/releases) - [Commits](https://github.com/chalk/ansi-regex/compare/v3.0.0...v3.0.1)
--- updated-dependencies: - dependency-name: ansi-regex dependency-type: indirect ...
Change-Id: Ie00f6fa342338bcd5c7cd32eec6f9d225738ad9b Signed-off-by: dependabot[bot] <support@github.com> Signed-off-by: Chris Kay <chris.kay@arm.com>
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| f1cbbd63 | 11-May-2022 |
Harrison Mutai <harrison.mutai@arm.com> |
fix(bl1): invalidate SP in data cache during secure SMC
Invalidate the SP holding `smc_ctx_t` prior to enabling the data cache when handling SMCs from the secure world. Enabling the data cache witho
fix(bl1): invalidate SP in data cache during secure SMC
Invalidate the SP holding `smc_ctx_t` prior to enabling the data cache when handling SMCs from the secure world. Enabling the data cache without doing so results in dirty data either being evicted into main memory, or being used directly from bl1. This corrupted data causes system failure as the SMC handler attempts to use it.
Change-Id: I5b7225a6fdd1fcfe34ee054ca46dffea06b84b7d Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 48e73457 | 18-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "sb/update-maintainers" into integration
* changes: docs(maintainers): remove John Powell from code owners docs(maintainers): remove Jimmy Brisson from code owners |
| d8701fa5 | 17-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(stm32mp1): include assert.h to fix build failure" into integration |
| ee211d08 | 17-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "docs: update supported FVP models documentation" into integration |
| 570c71b2 | 17-May-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
fix(stm32mp1): include assert.h to fix build failure
stm32mp1 platform build failed with the error [1] in the coverity, to fix it included assert.h file.
Including bl32/sp_min/sp_min.mk plat/st/stm
fix(stm32mp1): include assert.h to fix build failure
stm32mp1 platform build failed with the error [1] in the coverity, to fix it included assert.h file.
Including bl32/sp_min/sp_min.mk plat/st/stm32mp1/plat_image_load.c: In function 'plat_get_bl_image_load_info': plat/st/stm32mp1/plat_image_load.c:30:2: error: implicit declaration of function 'assert' [-Werror=implicit-function-declaration] 30 | assert(bl33 != NULL); | ^~~~~~ plat/st/stm32mp1/plat_image_load.c:9:1: note: 'assert' is defined in header '<assert.h>'; did you forget to '#include <assert.h>'? 8 | #include <plat/common/platform.h> +++ |+#include <assert.h> 9 | cc1: all warnings being treated as errors
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com> Change-Id: I486bd695298798c05008158545668020babb3eca
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| a12a2c46 | 17-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(stm32mp1-fdts): correct memory mapping for STM32MP13" into integration |
| d8ba3278 | 17-May-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(security): upgrade tools to OpenSSL 3.0" into integration |
| 173c3afc | 28-Apr-2022 |
Maksims Svecovs <maksims.svecovs@arm.com> |
docs: update supported FVP models documentation
Update supported models list according to changes for v2.7 release in ci/tf-a-ci-scripts repository: * general FVP model update: 5c54251 * CSS model u
docs: update supported FVP models documentation
Update supported models list according to changes for v2.7 release in ci/tf-a-ci-scripts repository: * general FVP model update: 5c54251 * CSS model update: 3bd12fb
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com> Change-Id: I38c2ef2991b23873821c7e34ad2900b9ad023c4b
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| 99605fb1 | 17-May-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1-fdts): correct memory mapping for STM32MP13
On STM32MP13, OP-TEE will be loaded at the beginning of the secure memory, and will be responsible for its shared memory. The memory allocate
fix(stm32mp1-fdts): correct memory mapping for STM32MP13
On STM32MP13, OP-TEE will be loaded at the beginning of the secure memory, and will be responsible for its shared memory. The memory allocated to OP-TEE is then 32MB, and the shared memory does no more appear in the STM32MP13 fw-config DT file.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I4e9238ddb4d82079b9ddf8fc8f6916b5b989d263
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| 4c4315e8 | 17-May-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(arm): remove reclamation of functions starting with "init"" into integration |
| 652df566 | 17-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs(maintainers): remove John Powell from code owners
John Powell is no longer part of the TF-A core team at Arm.
Change-Id: Iaa91474cb2c5c334b9ae6f2376724fad2677e285 Signed-off-by: Sandrine Baill
docs(maintainers): remove John Powell from code owners
John Powell is no longer part of the TF-A core team at Arm.
Change-Id: Iaa91474cb2c5c334b9ae6f2376724fad2677e285 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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