feat(zynqmp): resolve the misra 10.1 warnings

MISRA Violation: MISRA-C:2012 R.10.1
1) The expression of non-boolean essential type is being interpreted as a
boolean value for the operator.
2) The op

feat(zynqmp): resolve the misra 10.1 warnings

MISRA Violation: MISRA-C:2012 R.10.1
1) The expression of non-boolean essential type is being interpreted as a
boolean value for the operator.
2) The operand to the operator does not have an essentially unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I97bbc056f4fee167742429e144144ba793bf77b3

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feat(cpus): add a64fx cpu to tf-a

while sbsa maintainers upstream decide whether new cpus types
should be in, add fujitsu a64fx cpu type in advance

Signed-off-by: Itaru Kitayama <itaru.kitayama@fuj

feat(cpus): add a64fx cpu to tf-a

while sbsa maintainers upstream decide whether new cpus types
should be in, add fujitsu a64fx cpu type in advance

Signed-off-by: Itaru Kitayama <itaru.kitayama@fujitsu.com>
Change-Id: I521a62f1233f3fe6e92f040edaff2cc60a1bd874

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Merge changes from topic "st_fix_stm32mp13" into integration

* changes:
fix(stm32mp13): correct USART addresses
feat(stm32mp13): change BL33 memory mapping

Merge "docs(rmmd): add myself as RMMD and RME owner" into integration

docs(rmmd): add myself as RMMD and RME owner

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I93f5e622e37f3156bd5326b7d3a3d0d7f73b2c2e

fix(stm32mp13): correct USART addresses

On STM32MP13, USART1 and USART2 addresses are 0x4C000000 and 0x4C001000.
Whereas on STM32MP15, the addresses were 0x5C000000 and 0x4000E000.
Use dedicated fla

fix(stm32mp13): correct USART addresses

On STM32MP13, USART1 and USART2 addresses are 0x4C000000 and 0x4C001000.
Whereas on STM32MP15, the addresses were 0x5C000000 and 0x4000E000.
Use dedicated flags to choose the correct address, that could be use
for early or crash console.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I98bd97a0ac8b0408a50376801e2a1961b241a3d6

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feat(stm32mp13): change BL33 memory mapping

U-Boot is loaded at the beginning of the DDR:
STM32MP_DDR_BASE = 0xC0000000.

This patch remove the need to use the 0x100000 offset, reserved
on STM32MP15

feat(stm32mp13): change BL33 memory mapping

U-Boot is loaded at the beginning of the DDR:
STM32MP_DDR_BASE = 0xC0000000.

This patch remove the need to use the 0x100000 offset, reserved
on STM32MP15 for flashlayout.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8d0a93f4db411cf59838e635a315c729cccee269

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feat(stm32mp1): retrieve FIP partition by type UUID

Modify the function to retrieve the FIP partition looking
the UUID type define for FIP. If not defined, compatibility
used to find the FIP partiti

feat(stm32mp1): retrieve FIP partition by type UUID

Modify the function to retrieve the FIP partition looking
the UUID type define for FIP. If not defined, compatibility
used to find the FIP partition by name.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I76634dea891f51d913a549fb9a077cf7284d5cb2

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feat(guid-partition): allow to find partition by type UUID

Add function to return the partition by type.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I87729dc5e68fbc45a523c

feat(guid-partition): allow to find partition by type UUID

Add function to return the partition by type.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: I87729dc5e68fbc45a523c894b67595b0079dd8fb

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refactor(stm32mp1): update PLAT_PARTITION_MAX_ENTRIES

Fix the maximum partition number to a default value. It must
also take care of the extra partition when FWU feature is enabled.

Change-Id: Ib64

refactor(stm32mp1): update PLAT_PARTITION_MAX_ENTRIES

Fix the maximum partition number to a default value. It must
also take care of the extra partition when FWU feature is enabled.

Change-Id: Ib64b1f19f1f0514f7e89d35fc367facd6df54bed
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge "feat(sme): fall back to SVE if SME is not there" into integration

Merge changes from topic "jas/rmm-el3-ifc" into integration

* changes:
docs(rmmd): document EL3-RMM Interfaces
feat(rmmd): add support to create a boot manifest
fix(rme): use RMM shared buffer

Merge changes from topic "jas/rmm-el3-ifc" into integration

* changes:
docs(rmmd): document EL3-RMM Interfaces
feat(rmmd): add support to create a boot manifest
fix(rme): use RMM shared buffer for attest SMCs
feat(rmmd): add support for RMM Boot interface

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feat(sme): fall back to SVE if SME is not there

Due to their interrelationship in the architecture the SVE and SME
features in TF-A are mutually exclusive. This means that a single binary
can't be s

feat(sme): fall back to SVE if SME is not there

Due to their interrelationship in the architecture the SVE and SME
features in TF-A are mutually exclusive. This means that a single binary
can't be shared between systems with and without SME if the system
without SME does support SVE, SVE will not be initialised so lower ELs
will run into trouble trying to use it. This unusual behaviour for TF-A
which normally gracefully handles situations where features are enabled
but not supported on the current hardware.

Address this by calling the SVE enable and disable functions if SME is
not supported rather than immediately exiting, these perform their own
feature checks so if neither SVE nor SME is supported behaviour is
unchanged.

Signed-off-by: Mark Brown <broonie@kernel.org>
Change-Id: I2c606202fa6c040069f44e29d36b5abb48391874

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docs(rmmd): document EL3-RMM Interfaces

This patch documents the RMM-EL3 Boot and runtime interfaces.

Note that for the runtime interfaces, some services are not
documented in this patch and will b

docs(rmmd): document EL3-RMM Interfaces

This patch documents the RMM-EL3 Boot and runtime interfaces.

Note that for the runtime interfaces, some services are not
documented in this patch and will be added on a later doc patch.

These services are:

* RMMD_GTSI_DELEGATE
* RMMD_GTSI_UNDELEGATE
* RMMD_RMI_REQ_COMPLETE

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I8fcc89d91fe5a334c2f68c6bfd1fd672a8738b5c

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Merge "feat(spmd): avoid spoofing in FF-A direct request" into integration

Merge "feat(arm): forbid running RME-enlightened BL31 from DRAM" into integration

feat(rmmd): add support to create a boot manifest

This patch also adds an initial RMM Boot Manifest (v0.1) for fvp
platform.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Ch

feat(rmmd): add support to create a boot manifest

This patch also adds an initial RMM Boot Manifest (v0.1) for fvp
platform.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I1374f8f9cb207028f1820953cd2a5cf6d6c3b948

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fix(rme): use RMM shared buffer for attest SMCs

Use the RMM shared buffer to attestation token and signing key SMCs.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id:

fix(rme): use RMM shared buffer for attest SMCs

Use the RMM shared buffer to attestation token and signing key SMCs.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I313838b26d3d9334fb0fe8cd4b229a326440d2f4

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feat(rmmd): add support for RMM Boot interface

This patch adds the infrastructure needed to pass boot arguments from
EL3 to RMM and allocates a shared buffer between both worlds that can
be used, am

feat(rmmd): add support for RMM Boot interface

This patch adds the infrastructure needed to pass boot arguments from
EL3 to RMM and allocates a shared buffer between both worlds that can
be used, among others, to pass a boot manifest to RMM. The buffer is
composed a single memory page be used by a later EL3 <-> RMM interface
by all CPUs.

The RMM boot manifest is not implemented by this patch.

In addition to that, this patch also enables support for RMM when
RESET_TO_BL31 is enabled.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I855cd4758ee3843eadd9fb482d70a6d18954d82a

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feat(arm): forbid running RME-enlightened BL31 from DRAM

According to Arm CCA security model [1],

"Root world firmware, including Monitor, is the most trusted CCA
component on application PE. It en

feat(arm): forbid running RME-enlightened BL31 from DRAM

According to Arm CCA security model [1],

"Root world firmware, including Monitor, is the most trusted CCA
component on application PE. It enforces CCA security guarantees for
not just Realm world, but also for Secure world and for itself.

It is expected to be small enough to feasibly fit in on-chip memory,
and typically needs to be available early in the boot process when
only on-chip memory is available."

For these reasons, it is expected that "monitor code executes entirely
from on-chip memory."

This precludes usage of ARM_BL31_IN_DRAM for RME-enlightened firmware.

[1] Arm DEN0096 A.a, section 7.3 "Use of external memory by CCA".

Change-Id: I752eb45f1e6ffddc7a6f53aadcc92a3e71c1759f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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feat(spmd): avoid spoofing in FF-A direct request

Validate that non-secure caller does not spoof
SPMD, SPMC or any secure endpoint ID
in FFA_MSG_SEND_DIRECT_REQ.

Change-Id: I7eadb8886142d94bef107cf

feat(spmd): avoid spoofing in FF-A direct request

Validate that non-secure caller does not spoof
SPMD, SPMC or any secure endpoint ID
in FFA_MSG_SEND_DIRECT_REQ.

Change-Id: I7eadb8886142d94bef107cf485462dfcda828895
Signed-off-by: Shruti <shruti.gupta@arm.com>

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Merge changes from topics "binary-format-sp", "od/meas-boot-spmc" into integration

* changes:
feat(spm): add tpm event log node to spmc manifest
fix(measured-boot): add SP entries to event_log_m

Merge changes from topics "binary-format-sp", "od/meas-boot-spmc" into integration

* changes:
feat(spm): add tpm event log node to spmc manifest
fix(measured-boot): add SP entries to event_log_metadata

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Merge "feat(stm32mp15): manage OP-TEE shared memory" into integration

feat(stm32mp15): manage OP-TEE shared memory

On STM32MP15, there is currently an OP-TEE shared memory area at the end
of the DDR. But this area will in term be removed. To allow a smooth
transition,

feat(stm32mp15): manage OP-TEE shared memory

On STM32MP15, there is currently an OP-TEE shared memory area at the end
of the DDR. But this area will in term be removed. To allow a smooth
transition, a new flag is added (STM32MP15_OPTEE_RSV_SHM). It reflects
the OP-TEE flag: CFG_CORE_RESERVED_SHM. The flag is enabled by default
(no behavior change). It will be set to 0 when OP-TEE is aligned, and
then later be removed.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I91146cd8a26a24be22143c212362294c1e880264

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Merge changes from topic "xlnx_zynqmp_misra_fix1" into integration

* changes:
fix(zynqmp): resolve the misra 8.6 warnings
fix(zynqmp): resolve the misra 4.6 warnings