feat(ti): add mmu regions for am62l soc

Update the k3low bl31 platform setup to map required device regions
(USART, GIC, GTC, MMR, and mailbox) in the MMU. This ensures that all
necessary hardware b

feat(ti): add mmu regions for am62l soc

Update the k3low bl31 platform setup to map required device regions
(USART, GIC, GTC, MMR, and mailbox) in the MMU. This ensures that all
necessary hardware blocks are accessible to the A53 cores on the
AM62L SoC.
Use 4K aligned address sizes wherever applicable, and update the
file header comment from "K3 SOC specific bl31_setup" to "k3low SoC
specific bl31_setup" to accurately represent the platform specific
nature of this file.
As part of the effort, rename WKUP_CTRL_MMR0_DEVICE_MANAGEMENT_BASE
to WKUP_CTRL_MMR0_BASE to make name shorter.

Change-Id: I58209bc9c780db3e452b09c2c939bb0c47a63ed1
Signed-off-by: Dhruva Gole <d-gole@ti.com>

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feat(ti): build generic timer

Also, make sure we init the generic timer as part of the soc init
on am62lx as we use it later for delays

Change-Id: I921f4e4120ddaba588eb5b876231435fff3f7f3c
Signed-o

feat(ti): build generic timer

Also, make sure we init the generic timer as part of the soc init
on am62lx as we use it later for delays

Change-Id: I921f4e4120ddaba588eb5b876231435fff3f7f3c
Signed-off-by: Dhruva Gole <d-gole@ti.com>

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Merge "fix(rme): fix incorrect shift operation in rmmd" into integration

fix(rme): fix incorrect shift operation in rmmd

This patch fixes the shift operation in rmmd_mecid_key_update().
Also, a function name fix is made to the platform porting guide.

Change-Id: I80f0e26

fix(rme): fix incorrect shift operation in rmmd

This patch fixes the shift operation in rmmd_mecid_key_update().
Also, a function name fix is made to the platform porting guide.

Change-Id: I80f0e2653dcb5cdd7b5937506ca040b2105ca3ce
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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Merge changes I32c5be5d,I15a652a0 into integration

* changes:
fix(qemu): add reason parameter to MEC update
refactor(rmmd): modify MEC update call to meet FIRME

fix(cpufeat): configure CPTR_EL2.ZEN and CPTR_EL2.TZ to match Linux

Linux Documentation/arch/arm64/booting.rst states that:
"
For CPUs with the Scalable Vector Extension (FEAT_SVE) present:
...
-

fix(cpufeat): configure CPTR_EL2.ZEN and CPTR_EL2.TZ to match Linux

Linux Documentation/arch/arm64/booting.rst states that:
"
For CPUs with the Scalable Vector Extension (FEAT_SVE) present:
...
- If the kernel is entered at EL1 and EL2 is present:
- CPTR_EL2.TZ (bit 8) must be initialised to 0b0.
- CPTR_EL2.ZEN (bits 17:16) must be initialised to 0b11.
"
Without these settings, Linux kernel hangs on boot when trying
to use SVE. Adjust the register settings to match Linux kernel
expectations.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I9a72810dd902b08f9c61f157cc31e603aad2f73a

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build(dev-deps): bump brace-expansion

Bumps the npm_and_yarn group with 1 update in the / directory: [brace-expansion](https://github.com/juliangruber/brace-expansion).

Updates `brace-expansion` fr

build(dev-deps): bump brace-expansion

Bumps the npm_and_yarn group with 1 update in the / directory: [brace-expansion](https://github.com/juliangruber/brace-expansion).

Updates `brace-expansion` from 1.1.11 to 1.1.12
- [Release notes](https://github.com/juliangruber/brace-expansion/releases)
- [Commits](https://github.com/juliangruber/brace-expansion/compare/1.1.11...v1.1.12)

---
updated-dependencies:
- dependency-name: brace-expansion
dependency-version: 1.1.12
dependency-type: indirect
dependency-group: npm_and_yarn
...

Change-Id: I1613e2e8fe36abe22390b41d520ac5916cf24e97
Signed-off-by: dependabot[bot] <support@github.com>

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chore(dev-deps): bump the pip group across 2 directories with 1 update

Bumps the pip group with 1 update in the /tools/tlc directory: [requests](https://github.com/psf/requests).
Bumps the pip group

chore(dev-deps): bump the pip group across 2 directories with 1 update

Bumps the pip group with 1 update in the /tools/tlc directory: [requests](https://github.com/psf/requests).
Bumps the pip group with 1 update in the / directory: [requests](https://github.com/psf/requests).

Updates `requests` from 2.32.3 to 2.32.4
- [Release notes](https://github.com/psf/requests/releases)
- [Changelog](https://github.com/psf/requests/blob/main/HISTORY.md)
- [Commits](https://github.com/psf/requests/compare/v2.32.3...v2.32.4)

Updates `requests` from 2.32.3 to 2.32.4
- [Release notes](https://github.com/psf/requests/releases)
- [Changelog](https://github.com/psf/requests/blob/main/HISTORY.md)
- [Commits](https://github.com/psf/requests/compare/v2.32.3...v2.32.4)

---
updated-dependencies:
- dependency-name: requests
dependency-version: 2.32.4
dependency-type: indirect
dependency-group: pip
- dependency-name: requests
dependency-version: 2.32.4
dependency-type: indirect
dependency-group: pip
...

Change-Id: Ia260450e46a6c4bd3f9fcaf3f99bbbfb04877093
Signed-off-by: dependabot[bot] <support@github.com>

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build(deps): bump the dev-deps group across 2 directories with 1 update

Bumps the dev-deps group with 1 update in the / directory: [tox](https://github.com/tox-dev/tox).
Bumps the dev-deps group wit

build(deps): bump the dev-deps group across 2 directories with 1 update

Bumps the dev-deps group with 1 update in the / directory: [tox](https://github.com/tox-dev/tox).
Bumps the dev-deps group with 1 update in the /tools/tlc directory: [tox](https://github.com/tox-dev/tox).


Updates `tox` from 4.24.2 to 4.25.0
- [Release notes](https://github.com/tox-dev/tox/releases)
- [Changelog](https://github.com/tox-dev/tox/blob/main/docs/changelog.rst)
- [Commits](https://github.com/tox-dev/tox/compare/4.24.2...4.25.0)

Updates `tox` from 4.24.2 to 4.25.0
- [Release notes](https://github.com/tox-dev/tox/releases)
- [Changelog](https://github.com/tox-dev/tox/blob/main/docs/changelog.rst)
- [Commits](https://github.com/tox-dev/tox/compare/4.24.2...4.25.0)

...
updated-dependencies:
- dependency-name: tox
dependency-type: indirect
update-type: version-update:semver-minor
dependency-group: dev-deps
- dependency-name: tox
dependency-type: direct:production
update-type: version-update:semver-minor
dependency-group: dev-deps
...

Signed-off-by: dependabot[bot] <support@github.com>
Change-Id: I62d6247d6cad0274e8c938cae2d285c6c10a9b88

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fix(spm): change the SMMUv3TestEngine being used

Use a test engine that's not connected via PCIe as those can't make
Secure accesses.

Change-Id: I6f7f235d022090189782381bc88e67de64c11927
Signed-off

fix(spm): change the SMMUv3TestEngine being used

Use a test engine that's not connected via PCIe as those can't make
Secure accesses.

Change-Id: I6f7f235d022090189782381bc88e67de64c11927
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(qemu): add reason parameter to MEC update

The FIRME MFI_MEC_REFRESH call takes a reason parameter. Add it to the
QEMU callback for compatibility.

Change-Id: I32c5be5dbce44102650f9312c44e1d00a31

fix(qemu): add reason parameter to MEC update

The FIRME MFI_MEC_REFRESH call takes a reason parameter. Add it to the
QEMU callback for compatibility.

Change-Id: I32c5be5dbce44102650f9312c44e1d00a3146eb9
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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refactor(rmmd): modify MEC update call to meet FIRME

Previous version of MEC refresh call was not compliant with FIRME [1].
This patch modifies the call so it is compliant with the specification.

[

refactor(rmmd): modify MEC update call to meet FIRME

Previous version of MEC refresh call was not compliant with FIRME [1].
This patch modifies the call so it is compliant with the specification.

[1] https://developer.arm.com/documentation/den0149/1-0alp0/

Change-Id: I15a652a021561edca16e79d127e6f08975cf1361
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>

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Merge "fix(rcar4): drop unused plat_pm_scmi" into integration

build(allwinner): disable unneeded CVE workarounds and MPAM

There are a number of workarounds for CVEs related to sidechannel
attacks on some CPU cores, most of them listed here:
https://developer.a

build(allwinner): disable unneeded CVE workarounds and MPAM

There are a number of workarounds for CVEs related to sidechannel
attacks on some CPU cores, most of them listed here:
https://developer.arm.com/documentation/110280/latest/
Also there are two other CVEs:
https://developer.arm.com/documentation/110324/latest/
https://developer.arm.com/documentation/110326/latest/

As these page reveals, those workaround do not apply to the Cortex-A53
(or A55) cores, so we can safely disable them in the Allwinner build
recipes, since they only use those two cores so far.

Also disable FEAT_MPAM, which is one of the only three later features
that are enabled default, but are not enabled in Cortex-A53 or A55
cores. Use the opportunity to group those options together and improve
the comment.

This decreases the code size by a few hundred bytes.

Change-Id: Ibc52a4fc9b8f5d9b2b28a2ce13d3ab99b63e9640
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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fix(cpus): use correct Makefile indentation for CVE-2018-3639 check

Makefiles need to use spaces for indentation when using make syntax,
tabs are reserved for (shell) recipes.

Replace tabs with spa

fix(cpus): use correct Makefile indentation for CVE-2018-3639 check

Makefiles need to use spaces for indentation when using make syntax,
tabs are reserved for (shell) recipes.

Replace tabs with spaces on the WORKAROUND_CVE_2018_3639 check, to fix
the error report when WORKAROUND_CVE_2018_3639 is disabled:
lib/cpus/cpu-ops.mk:1147: *** recipe commences before first target. Stop.

Also this revealed that DYNAMIC_WORKAROUND_CVE_2018_3639 was not
initialised, so it always triggered that condition. Set it to 0, to
allow disabling WORKAROUND_CVE_2018_3639 on the command line.

Use the opportunity to also convert some unrelated tab to spaces, in a
line continuation.

Change-Id: Ieb56af33a11c40b6753738669eee929c264261cf
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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Merge "feat(versal2): remove handoff entry from tl" into integration

fix(rcar4): drop unused plat_pm_scmi

Drop unused plat_pm_scmi.c and related platform.mk entries.
If this is ever going to be used, this can be reinstated.

Signed-off-by: Marek Vasut <marek.vasut+re

fix(rcar4): drop unused plat_pm_scmi

Drop unused plat_pm_scmi.c and related platform.mk entries.
If this is ever going to be used, this can be reinstated.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: Icdb5188cba97be5dfccb240f773288a54662e977

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Merge changes from topic "mp/sp_lifecycle" into integration

* changes:
docs: ff-a manifest bindings for SP lifecycle support
feat(spmd): support for FFA_ABORT invocation from SWd

fix: replace stray BL2_AT_EL3 with RESET_TO_BL2

For FVP, patch 259b67c08 should have used the latter but introduced the
former. That was a mistake, correct it.

The nuvoton platform seems to have co

fix: replace stray BL2_AT_EL3 with RESET_TO_BL2

For FVP, patch 259b67c08 should have used the latter but introduced the
former. That was a mistake, correct it.

The nuvoton platform seems to have copied arm_def.h and would have been
missed at some point. Update that too.

Change-Id: I28123186bb4b69c5d5154dcdd24e5dee9d9e33b8
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(aarch64): move BL31 specific setup out of the PSCI entrypoint

We've charged the PSCI entrypoint with doing BL31 specific things like
setting up the EL3 context and doing feature detection.

refactor(aarch64): move BL31 specific setup out of the PSCI entrypoint

We've charged the PSCI entrypoint with doing BL31 specific things like
setting up the EL3 context and doing feature detection. Well, this is
irrelevant for sp_min and not really appropriate for PSCI. So move it to
the bl31_warmboot() function to reflect this correctly and bring the
feature detection a bit earlier, hopefully spotting more errors.

This allows for a pair of minor cleanups - we can pass the core_pos to
psci_warmboot_entrypoint() without having to refetch it, and we can put
the pauth enablement in cm_manage_extensions_el3() along with all
others. The call of that function is kept after the MMU is turned on so
that we have nicer (coherent) access to cpu_data.

Change-Id: Id031cfa0e1d8fe98919a14f9db73eb5bc9e00f67
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor: unify blx_setup() and blx_main()

All BLs have a bl_setup() for things that need to happen early, a fall
back into assembly and then bl_main() for the main functionality. This
was necessary

refactor: unify blx_setup() and blx_main()

All BLs have a bl_setup() for things that need to happen early, a fall
back into assembly and then bl_main() for the main functionality. This
was necessary in order to fiddle with PAuth related things that tend to
break C calls. Since then PAuth's enablement has seen a lot of
refactoring and this is now worked around cleanly so the distinction can
be removed. The only tradeoff is that this requires pauth to not be used
for the top-level main function.

There are two main benefits to doing this: First, code is easier to
understand as it's all together and the entrypoint is smaller. Second,
the compiler gets to see more of the code and apply optimisations
(importantly LTO).

Change-Id: Iddb93551115a2048988017547eb7b8db441dbd37
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(debugfs): set debugfs smc start to vendor EL3

The smc calls for debugfs were moved from the sip service to the vendor
specific EL3 service [1], so the debugfs smc call handler needs to be
update

fix(debugfs): set debugfs smc start to vendor EL3

The smc calls for debugfs were moved from the sip service to the vendor
specific EL3 service [1], so the debugfs smc call handler needs to be
updated to reflect this change so that it does not view debugfs smc
calls to be invalid.

[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/26917

Change-Id: Ic24e3b7ab4c8a37b888aaf11060da0bc8abe072d
Signed-off-by: Slava Andrianov <slava.andrianov@arm.com>

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Merge "fix(xlat): typecast expressions to match data type" into integration

Merge "fix(xlat): add missing curly braces" into integration

fix(xlat): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.Enclosed statement body wi

fix(xlat): add missing curly braces

This corrects the MISRA violation C2012-15.6:
The body of an iteration-statement or a selection-statement shall
be a compound-statement.Enclosed statement body within the curly
braces.

Change-Id: I4e429a51fec577728f7552d4aad9a546c6cbaefb
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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