| 885e2683 | 12-Sep-2022 |
Claus Pedersen <claustbp@google.com> |
refactor(libc): clean up dependencies in libc
- Removing platform dependencies from libc modules.
- Replacing panicking with actual error handling.
- Debug macros are included indirectly from assert
refactor(libc): clean up dependencies in libc
- Removing platform dependencies from libc modules.
- Replacing panicking with actual error handling.
- Debug macros are included indirectly from assert.h. Removing
"platform_def.h" from assert.h and adding "common/debug.h"
where the macros are used.
- Removing hack for fixing PLAT_LOG_LEVEL_ASSERT to 40.
Instead removing assert with expression, as this
does not provide additional information.
Signed-off-by: Claus Pedersen <claustbp@google.com>
Change-Id: Icc201ea7b63c1277e423c1cfd13fd6816c2bc568
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| 93910a74 | 22-Sep-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(pauth): add/modify helpers to support QARMA3" into integration |
| 2c20c242 | 22-Sep-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(synquacer): increase size of BL33" into integration |
| f530821a | 22-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(versal_net): add support for QEMU COSIM platform" into integration |
| ae69686b | 22-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "docs(maintainers): update xilinx record to cover docs" into integration |
| def661b6 | 22-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
docs(maintainers): update xilinx record to cover docs
Recently new Xilinx Versal NET platform has been merged but documentation
cover only zynqmp. Fix the fragment to cover all Xilinx documentation.
docs(maintainers): update xilinx record to cover docs
Recently new Xilinx Versal NET platform has been merged but documentation
cover only zynqmp. Fix the fragment to cover all Xilinx documentation.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I10f8f865ca8d46518135adb80ba0ba4470534529
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| 6a079efd | 08-Sep-2022 |
Sai Pavan Boddu <sai.pavan.boddu@amd.com> |
feat(versal_net): add support for QEMU COSIM platform
QEMU COSIM platform is equivalent to qemu with additional cosim
extensions, so just switching platform_id to QEMU if QEMU_COSIM is
detected.
Si
feat(versal_net): add support for QEMU COSIM platform
QEMU COSIM platform is equivalent to qemu with additional cosim
extensions, so just switching platform_id to QEMU if QEMU_COSIM is
detected.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I922d10b1605c7f900158fa7fbe82571d3b9d4792
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| a12a66d0 | 14-Sep-2022 |
Jassi Brar <jaswinder.singh@linaro.org> |
fix(synquacer): increase size of BL33
Increase the max possible size of BL33 from 1MB to 2MB.
For example, edk2 is usually bigger than 1MB
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Cha
fix(synquacer): increase size of BL33
Increase the max possible size of BL33 from 1MB to 2MB.
For example, edk2 is usually bigger than 1MB
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Change-Id: Idd4762e25e623de145c65f31cf2dfe1fee466a74
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| cdbea240 | 21-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "docs(build): update GCC to 11.3.Rel1 version" into integration |
| f47d38ba | 21-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xilinx-versal-net" into integration
* changes:
feat(versal-net): add support for platform management
feat(versal-net): add support for IPI
feat(versal-net): add SMP s
Merge changes from topic "xilinx-versal-net" into integration
* changes:
feat(versal-net): add support for platform management
feat(versal-net): add support for IPI
feat(versal-net): add SMP support for Versal NET
feat(versal-net): add support for Xilinx Versal NET platform
feat(versal-net): add documentation for Versal NET SoC
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| 6e08cffc | 21-Sep-2022 |
Marco Felsch <m.felsch@pengutronix.de> |
fix(bl31): fix validate_el3_interrupt_rm preprocessor usage
Fix the "#if defined(FOO)" usage introduced by commit 7c2fe62f1
("fix(bl31): allow use of EHF with S-EL2 SPMC") since the defines are
alwa
fix(bl31): fix validate_el3_interrupt_rm preprocessor usage
Fix the "#if defined(FOO)" usage introduced by commit 7c2fe62f1
("fix(bl31): allow use of EHF with S-EL2 SPMC") since the defines are
always passed as -DFOO=0 or as -DFOO=1. The "#if defined(FOO)" will now
always be true which is wrong.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Change-Id: I84fb144debc9899727a1fc021acdd59b4a6f0171
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| 0654ab7f | 05-Sep-2022 |
Jay Buddhabhatti <jay.buddhabhatti@xilinx.com> |
feat(versal-net): add support for platform management
Add support for PM EEMI interface for Versal_net. Also use PM
APIs in psci ops. Added TFA_NO_PM flag to disable PM functionality.
Signed-off-by
feat(versal-net): add support for platform management
Add support for PM EEMI interface for Versal_net. Also use PM
APIs in psci ops. Added TFA_NO_PM flag to disable PM functionality.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: If2b2941c868bc9b0850d7f3adb81eac0e660c149
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| 0bf622de | 19-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
feat(versal-net): add support for IPI
Add support to send IPI to firmware.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I8cd5
feat(versal-net): add support for IPI
Add support to send IPI to firmware.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I8cd54c05b6a726e0d398dfc1cdcc7f4cf09ba725
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| a9e567cb | 20-Sep-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(imx8m): move caam init after serial init" into integration |
| 901d74b2 | 19-Sep-2022 |
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> |
fix(imx8m): move caam init after serial init
CAAM provides serial output during initialization, but the serial init
occurs after CAAM. This leads to serial output produced by CAAM init
function to b
fix(imx8m): move caam init after serial init
CAAM provides serial output during initialization, but the serial init
occurs after CAAM. This leads to serial output produced by CAAM init
function to be omitted and not displayed.
Change the order of initialization and call CAAM init after Serial. This
has no impact as Serial does not require CAAM to be initialized upfront.
Fixes: 2502709f60de ("plat: imx8m: Add caam module init on imx8m")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Jacky Bai <ping.bai@nxp.com>
Change-Id: I09c0a5474a1babfb0b53c4455891689ec08b5bdb
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|
| 7d3287f3 | 20-Sep-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(imx8m): correct serial output for HAB JR0" into integration |
| 8529c769 | 19-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
feat(versal-net): add SMP support for Versal NET
Add SMP support for Versal NET via register access.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare
feat(versal-net): add SMP support for Versal NET
Add SMP support for Versal NET via register access.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I46d73e2cd678ae720b5255722b6b0611c22659e8
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| 1d333e69 | 31-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
feat(versal-net): add support for Xilinx Versal NET platform
New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal platform. System starts with Xilinx P
feat(versal-net): add support for Xilinx Versal NET platform
New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal platform. System starts with Xilinx PLM
firmware which loads TF-A(bl31) to DDR, which is already configured, and
jumps to it. PLM also prepare handoff structure for TF-A with information
what components were load and flags which indicate which EL level SW should
be started.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I2a16c242a77be6c91be3d198727dc3b9bbb97410
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| 6e24d795 | 19-Sep-2022 |
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> |
fix(imx8m): correct serial output for HAB JR0
Serial output is missing the EOL marker, which makes the output garbled.
Add EOL to the output, which adds a newline and makes log output
consistent.
fix(imx8m): correct serial output for HAB JR0
Serial output is missing the EOL marker, which makes the output garbled.
Add EOL to the output, which adds a newline and makes log output
consistent.
Fixes: 77850c96f23b ("feat(plat/imx8m): do not release JR0 to NS if HAB is using it")
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Franck LENORMAND <franck.lenormand@nxp.com>
Cc: Jacky Bai <ping.bai@nxp.com>
Change-Id: I58b67f441016122bc9361d7224d310522917eff0
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| 9f8de54b | 19-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(zynqmp): resolve the misra 4.6 warnings" into integration |
| 4efdc488 | 31-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
feat(versal-net): add documentation for Versal NET SoC
Add description for Versal NET SoC.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
feat(versal-net): add documentation for Versal NET SoC
Add description for Versal NET SoC.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: Idcbb893c6b9e46512308c53ba2a0bee48a022b0a
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| 15dc3e4f | 16-Sep-2022 |
HariBabu Gattem <haribabu.gattem@amd.com> |
fix(zynqmp): resolve the misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.
Change-Id: Id85
fix(zynqmp): resolve the misra 4.6 warnings
MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.
Change-Id: Id85e69b29b124052b4a87462ce27fcdfc00c13c9
Signed-off-by: HariBabu Gattem <haribabu.gattem@amd.com>
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| 8edd190e | 16-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(versal): update macro name to generic and move to common place" into integration |
| b86cbe10 | 16-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "provencore-spd" into integration
* changes:
feat(zynqmp): add support for ProvenCore
feat(services): add a SPD for ProvenCore
feat(gic): add APIs to raise NS and S-EL
Merge changes from topic "provencore-spd" into integration
* changes:
feat(zynqmp): add support for ProvenCore
feat(services): add a SPD for ProvenCore
feat(gic): add APIs to raise NS and S-EL1 SGIs
show more ...
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| 75eb87f0 | 16-Sep-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "RDN2_WARM_REBOOT_WITH_SGI" into integration
* changes:
feat(sgi): enable css implementation of warm reset
feat(scmi): send powerdown request to online secondary cpus
Merge changes from topic "RDN2_WARM_REBOOT_WITH_SGI" into integration
* changes:
feat(sgi): enable css implementation of warm reset
feat(scmi): send powerdown request to online secondary cpus
feat(plat/arm/css): add interrupt handler for reboot request
refactor(psci): move psci_do_pwrdown_sequence() out of private header
feat(plat/arm/css): add per-cpu power down support for warm reset
feat(scmi): set warm reboot entry point
fix(gicv3): update the affinity mask to 8 bit
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