fix(fvp_ve): fdts: Fix vexpress,config-bus subnode names

The arm,vexpress,config-bus DT binding restricts the possible (sub)node
names.
Adjust the current node names, to drop the unneeded address sp

fix(fvp_ve): fdts: Fix vexpress,config-bus subnode names

The arm,vexpress,config-bus DT binding restricts the possible (sub)node
names.
Adjust the current node names, to drop the unneeded address specifier,
and make the node names binding compliant.

Change-Id: Ic48c6969268c960ce92c8ec3a756ed1d89e61b08
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

fix(fvp): fdts: Fix idle-states entry method

When firmware implements idle states via PSCI, the value of the DT
entry-method property must be "psci", not "arm,psci".

Fix this to make the CPU descri

fix(fvp): fdts: Fix idle-states entry method

When firmware implements idle states via PSCI, the value of the DT
entry-method property must be "psci", not "arm,psci".

Fix this to make the CPU description binding compliant.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Icd1bf704d177368af9b7aab545f47e580791b8cc

show more ...

fix(fvp): fdts: fix memtimer subframe addressing

The arm,armv7-timer-mem DT binding documentation demands that the
#size-cells property should be <1> only.

Adjust the value to be <1> and drop the

fix(fvp): fdts: fix memtimer subframe addressing

The arm,armv7-timer-mem DT binding documentation demands that the
#size-cells property should be <1> only.

Adjust the value to be <1> and drop the now needless leading 0 in the
frame's reg property. Convert to #address-cell = <1> on the way.
Also adjust the interrupts property to use the proper GIC macros.

Change-Id: Ia2224663b1e6aaa7cf94af777473641de6a840d2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

feat(fvp): fdts: update rtsm_ve DT files from the Linux kernel

The existing DT files for the base FVP model are having some issues,
that lead to warnings reported by the device tree compiler.

Those

feat(fvp): fdts: update rtsm_ve DT files from the Linux kernel

The existing DT files for the base FVP model are having some issues,
that lead to warnings reported by the device tree compiler.

Those (and many other issues around (updated) DT binding compliance)
were fixed in the Linux kernel tree, so let's sync those files back into
TF-A.
We cannot copy the files "as is" for now, since we rely on certain custom
properties to be added (max-pwr-lvl in the PSCI node, SDEI nodes, etc).

Merge in the changed parts of the Linux kernel DT (from Linux v6.0-rc1),
and rework the base file to allow including the motherboard.dtsi
unchanged. This should make any future update less painful.

As this also affects the FVP VE boards (Cortex-A7 and Cortex-A5), since
they share the motherboard include file, fix them up as well.

Change-Id: I4f74d05e5583747f8849e32f246f74aeec7a9c60
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

refactor(fvp): fdts: consolidate GICv2 base FVP DT files

The GICv2 and GICv3 version of the FVP DT files are unnecessarily split,
as the common part of the peripherals is the same: it's literally ju

refactor(fvp): fdts: consolidate GICv2 base FVP DT files

The GICv2 and GICv3 version of the FVP DT files are unnecessarily split,
as the common part of the peripherals is the same: it's literally just
the interrupt controller node that is different.
Since the GICv3 versions now use a generic DT include file (without any
GIC node), let's reuse that for the GICv2 versions of the FVP as well.
We just add a separate fvp-base-gicv2.dtsi file which describes the
GICv2 interrupt controller. Also shorten the compatible string, since
the GICv2 binding documentation does not allow the current combination.

This allows to remove the mostly redundant nodes from the GICv2 .dts
file.

Change-Id: I9018031bb611fb00ca7dbefc1bff7d40c3f05819
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

refactor(fvp): fdts: consolidate GICv3 base FVP DT files

The GICv2 and GICv3 version of the FVP DT files are unnecessarily split,
as the common part of the peripherals is the same: it's literally ju

refactor(fvp): fdts: consolidate GICv3 base FVP DT files

The GICv2 and GICv3 version of the FVP DT files are unnecessarily split,
as the common part of the peripherals is the same: it's literally just
the interrupt controller node that is different.
To facilitate a unification, refactor the DT include files to explicitly
include a snippet with just the GICv3 description, and a generic base DT
file for the rest. This generic file can then be reused by the GICv2
versions later.

Since we can only have a /memreserve/ entry *before* any DT nodes, move
that line to each file, to allow including the GIC DT file separately.

Change-Id: I9ff357d3fe0ce46e280c30131aeae97a99631512
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

feat(fvp): dts: drop 32-bit .dts files

Conceptually the DT is a hardware description, as such it's independent
from the instruction set that a DT client uses. So having separate DTs
for aarch32 and

feat(fvp): dts: drop 32-bit .dts files

Conceptually the DT is a hardware description, as such it's independent
from the instruction set that a DT client uses. So having separate DTs
for aarch32 and aarch64 does not make sense and is not needed.

Probably due to historic reasons (a Linux bug fixed in 2016 with Linux
commit ba6dea4f7ced, in Linux v4.8) the CPU reg property was using a
different size between aarch64 and aarch32, even though the size of it
is solely governed by the parent's #address-cells property.

Consolidate this to be always 2, and always use two cells to describe
the CPU's MPIDR register.

This removes the last difference of the -aarch32 versions of the FVP
DT files, so just remove all of them. The respective versions without
that suffix can now be used with AArch32 DT clients as well.

Also remove the respective part in the documentation.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I45d3a2cbba8e04595a741e1cf41900377952673e

show more ...

refactor(fvp): fdts: merge motherboard .dtsi files

For no real reason we were shipping two separate DT include files for the
base FVP motherboard peripherals, one for aarch32, one for aarch64.
There

refactor(fvp): fdts: merge motherboard .dtsi files

For no real reason we were shipping two separate DT include files for the
base FVP motherboard peripherals, one for aarch32, one for aarch64.
There is no difference in the hardware description when using a
different instruction set, and the diff between the two files was about
a missing interrupt map for the 64-bit DT files.

Consolidate the situation by just using a single motherboard .dtsi file,
which relies on an interrupt map by the including files.
Provide that map in the two files where it was missing before, and
change the filenames to let all users include the same file now.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I19b77ecc8da9b4bfbd61d02f910b9ab05dbf92e9

show more ...

Merge "revert(cpus): "Revert workaround for A77 erratum 1800714"" into integration

Merge "fix(psa): add missing semicolon" into integration

refactor(fvp_ve): fdts: prepare Cortex-A5 and A7 model DTs

The DT files for the Cortex-A5 and Cortex-A7 FVP models include the
shared rtsm_ve-motherboard.dtsi file, which we need to sync with the
up

refactor(fvp_ve): fdts: prepare Cortex-A5 and A7 model DTs

The DT files for the Cortex-A5 and Cortex-A7 FVP models include the
shared rtsm_ve-motherboard.dtsi file, which we need to sync with the
upstream Linux version soon.

To prepare for its changed structure there, adjust the top-level
#address-cells and #size-cells properties to be compatible with the
expectations of the Linux version.
Also extend the interrupt map to cover all peripherals listed in the
motherboard file, and use the proper GIC macros to make them more
readable on the way.

Change-Id: I7d1493f1a200e8350530f912833f9ffcc5f94b21
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

fix(fvp): fdts: unify and fix PSCI nodes

The PSCI DT nodes used for the various fvp-base model variants provide
explicit function IDs, as required for the pre-v0.2 PSCI specification.
This prevents

fix(fvp): fdts: unify and fix PSCI nodes

The PSCI DT nodes used for the various fvp-base model variants provide
explicit function IDs, as required for the pre-v0.2 PSCI specification.
This prevents them from being used from both AArch32 and AArch64 DT
clients, and using this version of the PSCI spec is long deprecated
anyway.

Remove the old compatible string and the function properties, to
force clients to use the standard function IDs as described in the PSCI
spec. sys_poweroff and sys_reset were never standardised or used anyway.

There should be no client software around that cannot deal with PSCI
v0.2.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ie87deb9898eae79b7307c15bcefcd4b311d4dc22

show more ...

fix(psa): add missing semicolon

Fix a syntax error in the delegated attestation service code.

Unfortunately, this build failure was not caught by the CI system
because right now lib/psa/delegated_a

fix(psa): add missing semicolon

Fix a syntax error in the delegated attestation service code.

Unfortunately, this build failure was not caught by the CI system
because right now lib/psa/delegated_attestation.c file is not getting
pulled in by any upstream platform. This will be addressed in a
separate patch.

Change-Id: Idb84f62aabc5008396213023fc40547097925860
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

show more ...

Merge changes from topic "npm-dependencies" into integration

* changes:
build(npm): update locked Node.js dependencies
build(npm): add NVM version file

fix(rme): relax RME compiler requirements

Currently building TF-A for the FVP with RME enabled requires a
toolchain that understands the -march=armv8.6-a command line option,
even though we actually

fix(rme): relax RME compiler requirements

Currently building TF-A for the FVP with RME enabled requires a
toolchain that understands the -march=armv8.6-a command line option,
even though we actually don't need any ARMv8.6 features from the
compiler.

Relax the requirement to use ARMv8.5, since this is what's the GCC
shipped with Ubuntu 20.04 understands. This is in line what the current
RMM implementation uses as well.

Change-Id: I3806dcff90319a87f003fe2c86b7cdcdebd625e4
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

revert(cpus): "Revert workaround for A77 erratum 1800714"

Reinstate the workaround introduced in commit
9bbc03a6e0608a949d66d9da6db12a455b452bfb. The cited change to the SDEN
could not be found and

revert(cpus): "Revert workaround for A77 erratum 1800714"

Reinstate the workaround introduced in commit
9bbc03a6e0608a949d66d9da6db12a455b452bfb. The cited change to the SDEN
could not be found and there are no known problems with the workaround.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Iec9938f173e7565024aca798f224df339de90806

show more ...

fix(mt8186): fix EMI_MPU domain setting for DSP

Correct the domain setting for DSP. It should be 6.

BUG=b:249954378
TEST=audio is functional.

Change-Id: Ie79aa0dad3d2b1ef5de0f2acc51ded13b6f085ac
S

fix(mt8186): fix EMI_MPU domain setting for DSP

Correct the domain setting for DSP. It should be 6.

BUG=b:249954378
TEST=audio is functional.

Change-Id: Ie79aa0dad3d2b1ef5de0f2acc51ded13b6f085ac
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>

show more ...

build(npm): update locked Node.js dependencies

This change updates our Node.js dependencies to their latest minor/patch
versions, but not necessarily to their latest major versions.

Change-Id: I59b

build(npm): update locked Node.js dependencies

This change updates our Node.js dependencies to their latest minor/patch
versions, but not necessarily to their latest major versions.

Change-Id: I59b093675134c679b7a834f3da6acf830f596c67
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

build(npm): add NVM version file

The `.nvmrc` file specifies the version of Node.js that the repository's
Node.js-based tooling has been designed to be compatible with.

Users of NVM may want to run

build(npm): add NVM version file

The `.nvmrc` file specifies the version of Node.js that the repository's
Node.js-based tooling has been designed to be compatible with.

Users of NVM may want to run `nvm use` to install this version
automatically.

Change-Id: Ied90c51d8d1e5b43f2ca4de08a58bc782d9ae4e6
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

Merge changes I072fe5fe,I4066d476,Ie4af38b8,I730e7b04,Iac3356f8, ... into integration

* changes:
fix(psa): extend measured boot logging
fix(rss): determine the size of sw_type in RSS mboot metad

Merge changes I072fe5fe,I4066d476,Ie4af38b8,I730e7b04,Iac3356f8, ... into integration

* changes:
fix(psa): extend measured boot logging
fix(rss): determine the size of sw_type in RSS mboot metadata
fix(psa): align with original API in tf-m-extras
fix(rss): clear the message buffer
feat(tc): enable RSS backend based measured boot
feat(tc): increase maximum BL1/BL2/BL31 sizes

show more ...

Merge "build(changelog): add new scope for Performance Monitor Extensions" into integration

Merge changes from topic "delegated_attest" into integration

* changes:
feat(psa): remove initial attestation partition API
docs: add PLAT_RSS_COMMS_PAYLOAD_MAX_SIZE to porting-guide.rst

Merge changes from topic "delegated_attest" into integration

* changes:
fix(rss): remove dependency on attestation header
fix(rss): rename AP-RSS message size macro
feat(tc): add RSS-AP messag

Merge changes from topic "delegated_attest" into integration

* changes:
fix(rss): remove dependency on attestation header
fix(rss): rename AP-RSS message size macro
feat(tc): add RSS-AP message size macro
feat(tc): add MHU addresses for AP-RSS comms on TC2
feat(psa): add delegated attestation partition API
fix(rss): reduce input validation for measured boot

show more ...

feat(cpu): add library support for Hunter ELP

Add basic CPU library code to support the Hunter ELP CPU in TF-A.
Hunter-ELP adds v9.2 architecture support and is derived from
Makalu-ELP. As such, the

feat(cpu): add library support for Hunter ELP

Add basic CPU library code to support the Hunter ELP CPU in TF-A.
Hunter-ELP adds v9.2 architecture support and is derived from
Makalu-ELP. As such, the library code is adapted from the
Makalu-ELP support library.

Change-Id: I7e93b9af6b1f0bc4d08c3cf5caf071d2cbdbc89f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

show more ...

fix(psa): extend measured boot logging

Print all the params of
rss_measured_boot_extend_measurement() to
the console to check parameter healthiness.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Cha

fix(psa): extend measured boot logging

Print all the params of
rss_measured_boot_extend_measurement() to
the console to check parameter healthiness.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I072fe5fef72c67e615ab64e06a9e1f6add5e9cfc

show more ...