History log of /rk3399_ARM-atf/ (Results 6901 – 6925 of 18586)
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e65584a001-Dec-2022 Naman Patel <naman.patel@amd.com>

fix(zynqmp): initialize uint32 with value 0U in pm code

MISRA Violation: MISRA C-2012 Rule 7.2
- Initialize the unsigned int with value 0u in pm_service component.

Current misra warning detection t

fix(zynqmp): initialize uint32 with value 0U in pm code

MISRA Violation: MISRA C-2012 Rule 7.2
- Initialize the unsigned int with value 0u in pm_service component.

Current misra warning detection tool is not reporting this as
warning. It reports only when the initialized value exceeds the
range of data type based on compiler used.

But, this change is added as a part of precaution as some other
misra checker tool may report it as violation of rule 7.2.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I50a5cee2a077fe157e79757d959ce33064225af3

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2b9c8b8701-Dec-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "build: restrict usage of CTX_INCLUDE_EL2_REGS" into integration

f1910cc121-Nov-2022 Govindraj Raja <govindraj.raja@arm.com>

build: restrict usage of CTX_INCLUDE_EL2_REGS

CTX_INCLUDE_EL2_REGS is used to save/restore EL2 registers and
it should be only used when there is SPMD or RME enabled.

Make CTX_INCLUDE_EL2_REGS an i

build: restrict usage of CTX_INCLUDE_EL2_REGS

CTX_INCLUDE_EL2_REGS is used to save/restore EL2 registers and
it should be only used when there is SPMD or RME enabled.

Make CTX_INCLUDE_EL2_REGS an internal macro and remove
from documentation.

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I6a70edfd88163423ff0482de094601cf794246d6

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ff1d2ef317-Nov-2022 Manish Pandey <manish.pandey2@arm.com>

fix(el3_runtime): restore SPSR/ELR/SCR after esb

SCR_EL3 register is restored before esb issued and it is assumed
that EAs are unmasked at that point, which is wrong, as the SCR_EL3
value at that ti

fix(el3_runtime): restore SPSR/ELR/SCR after esb

SCR_EL3 register is restored before esb issued and it is assumed
that EAs are unmasked at that point, which is wrong, as the SCR_EL3
value at that time is restored from the context of the world where
it is returning to.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Id1c7150a70b5f589b0dc7c50c359b4d23ee9f256

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caaca4a130-Nov-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "mb/refactor-evlog" into integration

* changes:
refactor(qemu): pass platform metadata as a function's argument
refactor(imx8m): pass platform metadata as a function's a

Merge changes from topic "mb/refactor-evlog" into integration

* changes:
refactor(qemu): pass platform metadata as a function's argument
refactor(imx8m): pass platform metadata as a function's argument
refactor(fvp): pass platform metadata as a function's argument
refactor(measured-boot): accept metadata as a function's argument

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c643239429-Nov-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(console): fix crash on spin_unlock with cache disabled" into integration

5fb6946a24-Nov-2022 Baruch Siach <baruch@tkos.co.il>

fix(console): fix crash on spin_unlock with cache disabled

Current code skips load of spinlock address when cache is disabled. The
following call to spin_unlock stores into the random location that

fix(console): fix crash on spin_unlock with cache disabled

Current code skips load of spinlock address when cache is disabled. The
following call to spin_unlock stores into the random location that x0
points to.

Move spinlock address load earlier so that x0 is always valid on
spin_unlock call.

Change-Id: Iac640289725dce2518f2fed483d7d36ca748ffe8
Signed-off-by: Baruch Siach <baruch@tkos.co.il>

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d3d2a5a428-Nov-2022 Lauren Wehrmeister <lauren.wehrmeister@arm.com>

Merge "fix(cpus): workaround for Cortex-X3 erratum 2615812" into integration

bf09c41628-Nov-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration

086d981628-Nov-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge changes I8667f362,Ia0bd832c into integration

* changes:
feat(intel): setup FPGA interface for Agilex
fix(intel): fix pinmux handoff bug on Agilex

c00b06a428-Nov-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration

f6620acd28-Nov-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "fix(intel): remove checking on TEMP and VOLT checking for HWMON" into integration

cffc956e16-Nov-2022 Leo Yan <leo.yan@linaro.org>

feat(qemu): support pointer authentication

This patch includes source code to support pointer authentication on
QEMU platform.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: I582923080fe1d5

feat(qemu): support pointer authentication

This patch includes source code to support pointer authentication on
QEMU platform.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Change-Id: I582923080fe1d5baffd7d0ccfe83e3b28f910ae1

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27c07d0a28-Nov-2022 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "fix(rss): remove null-terminator from RSS metadata" into integration

85a14bc004-Nov-2022 David Vincze <david.vincze@arm.com>

fix(rss): remove null-terminator from RSS metadata

Remove the null-terminator of the string-like data items
from the RSS measurement's metadata. The 'version' and
'sw_type' items have an associated

fix(rss): remove null-terminator from RSS metadata

Remove the null-terminator of the string-like data items
from the RSS measurement's metadata. The 'version' and
'sw_type' items have an associated length value which
should not include a null-terminator when storing the
measurement.

Change-Id: Ia91ace2fff8b6f75686dd2e1862475268300bbdb
Signed-off-by: David Vincze <david.vincze@arm.com>

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4ccbdd8625-Nov-2022 Joanna Farley <joanna.farley@arm.com>

Merge "fix(zynqmp): check return status of pm_get_api_version" into integration

896c0daf25-Nov-2022 Joanna Farley <joanna.farley@arm.com>

Merge "fix(versal): initialize the variable with value 0 in pm code" into integration

3be9c27605-Nov-2022 Mate Toth-Pal <mate.toth-pal@arm.com>

build: enable adding MbedTLS files for platform

The platform.mk can add extra MbedTLS source files to LIBMBEDTLS_SRC.

Change-Id: Ida9abfd59d8b02eae23ec0a7f326db060b42bf49
Signed-off-by: Mate Toth-P

build: enable adding MbedTLS files for platform

The platform.mk can add extra MbedTLS source files to LIBMBEDTLS_SRC.

Change-Id: Ida9abfd59d8b02eae23ec0a7f326db060b42bf49
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>

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6d0525aa24-Oct-2022 Mate Toth-Pal <mate.toth-pal@arm.com>

feat(lib/psa): add read_measurement API

This API is added for testing purposes. It makes possible to write test
cases that read measurements back after extending them, and compare
them to expected r

feat(lib/psa): add read_measurement API

This API is added for testing purposes. It makes possible to write test
cases that read measurements back after extending them, and compare
them to expected results.

Change-Id: Iec447d972fdd54a56ab933a065476e0f4d35a6fc
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>

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c92ad36922-Nov-2022 Naman Patel <naman.patel@amd.com>

fix(zynqmp): check return status of pm_get_api_version

MISRA Violation: MISRA C-2012 Rule 17.7
- Check the return status of function pm_get_api_version
and return error in case of failure.

Signed-o

fix(zynqmp): check return status of pm_get_api_version

MISRA Violation: MISRA C-2012 Rule 17.7
- Check the return status of function pm_get_api_version
and return error in case of failure.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I69fb000c04f22996da7965a09a1797c7bfaad252

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cd73d62b16-Nov-2022 Naman Patel <naman.patel@amd.com>

fix(versal): initialize the variable with value 0 in pm code

Remove zeromem function as the array is already initialized
with value 0.

MISRA Violation: MISRA C-2012 Rule 9.1
- Initialize the array/

fix(versal): initialize the variable with value 0 in pm code

Remove zeromem function as the array is already initialized
with value 0.

MISRA Violation: MISRA C-2012 Rule 9.1
- Initialize the array/variable with a value 0 to resolve
the misra warnings in pm_service component.

Signed-off-by: Naman Patel <naman.patel@amd.com>
Change-Id: I1a3d44a7ae4088a3034eb0119d82b99cd4617ccd

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53f63eb024-Nov-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "feat(qemu): increase size of bl2" into integration

4daeaf3431-Oct-2022 Jens Wiklander <jens.wiklander@linaro.org>

fix(sptool): add dependency to SP image

In the generated sp_gen.mk, add a dependency to the image described in
the sp_layout.json file to make sure that the pkg file is re-generated
if the SP image

fix(sptool): add dependency to SP image

In the generated sp_gen.mk, add a dependency to the image described in
the sp_layout.json file to make sure that the pkg file is re-generated
if the SP image is updated.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: Id936f907d6baa6b0627c4bb9608323e5157c7a9b

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2d541cbc02-Sep-2022 Jiafei Pan <Jiafei.Pan@nxp.com>

fix(nxp-ddr): fix coverity issue

Fixed coverity issue for "shifting by a negtive value", returned
before go to the next shifting code.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I001

fix(nxp-ddr): fix coverity issue

Fixed coverity issue for "shifting by a negtive value", returned
before go to the next shifting code.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I00171b057b8948cb9e9ec5d9405b2e32aba568fb

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87612eae16-Aug-2022 Pankaj Gupta <pankaj.gupta@nxp.com>

fix(nxp-ddr): fix underrun coverity issue

Coverity Issue detail:

underrun-local: Underrunning array bin[i].cl[k].caslat
at element index -1 (byte offset -1)
using in

fix(nxp-ddr): fix underrun coverity issue

Coverity Issue detail:

underrun-local: Underrunning array bin[i].cl[k].caslat
at element index -1 (byte offset -1)
using index j (which evaluates to -1).

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1ec4833bbd5db1ac51436eac606484eefc4338ee

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