docs(arm): add ARM_ROTPK_LOCATION variant full key

Updating documentation to reflect the new ARM_ROTPK_LOCATION variant of
the full ROTPK, as opposed to the hash of it.

Change-Id: I0f83c519bd607ef1

docs(arm): add ARM_ROTPK_LOCATION variant full key

Updating documentation to reflect the new ARM_ROTPK_LOCATION variant of
the full ROTPK, as opposed to the hash of it.

Change-Id: I0f83c519bd607ef1270c7d30ee9bc55451ce4ae2
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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feat(arm): add ARM_ROTPK_LOCATION variant full key

Add support for ARM_ROTPK_LOCATION=devel_full_dev_rsa_key, which
implements the scenario where the platform provides the full ROTPK, as
opposed to

feat(arm): add ARM_ROTPK_LOCATION variant full key

Add support for ARM_ROTPK_LOCATION=devel_full_dev_rsa_key, which
implements the scenario where the platform provides the full ROTPK, as
opposed to the hash of it. This returns a 2kB development RSA key
embedded into the firmware.

The motivation for this patch is to extend our test coverage in the CI.
Right now, the authentication framework allows platforms to return
either the full ROTPK or a hash of it (*). However, the FVP platform
only supports returning a hash currently so we cannot easily exercise
the full key scenario. This patch adds that capability.

(*) Or even no key at all if it's not deployed on the platform yet, as
is typically the case on pre-production/developement platforms.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ie869cca1082410e63894e2b7dea2d31155684105

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Merge changes from topic "fix_misra_st_drivers" into integration

* changes:
fix(st-clock): avoid arithmetics on pointers
fix(st-clock): give the size for parent_mp13 and dividers_mp13 tables
f

Merge changes from topic "fix_misra_st_drivers" into integration

* changes:
fix(st-clock): avoid arithmetics on pointers
fix(st-clock): give the size for parent_mp13 and dividers_mp13 tables
fix(st-clock): remove useless switch
fix(st-clock): use Boolean type for tests
fix(st-regulator): use Boolean type for tests
fix(st-regulator): enclose macro parameters in parentheses
fix(st-regulator): rework for_each_*rdev macros
fix(st-regulator): explicitly check operators precedence
fix(st-pmic): define pmic_regs table size
fix(st-pmic): enclose macro parameter in parentheses

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Merge changes from topic "fix_misra_st_platform" into integration

* changes:
fix(stm32mp1): rework DWL buffer cache invalidation
fix(stm32mp1): add const for strings in stm32mp_get_soc_name()

Merge changes from topic "fix_misra_st_platform" into integration

* changes:
fix(stm32mp1): rework DWL buffer cache invalidation
fix(stm32mp1): add const for strings in stm32mp_get_soc_name()
fix(st): use Boolean type for tests
fix(st): rework secure-status check in fdt_get_status()
fix(st): use indices when counting GPIOs in DT
fix(st): add U suffix for unsigned numbers
fix(st): explicitly check operators precedence

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fix(gpt_rme): fix compilation error for gpt_rme.c

This patch fixes compilation error for gpt_init_l0_tables()
function in lib/gpt_rme/gpt_rme.c reported by GCC 13.0.0:

"gpt_rme/gpt_rme.c:765:5: err

fix(gpt_rme): fix compilation error for gpt_rme.c

This patch fixes compilation error for gpt_init_l0_tables()
function in lib/gpt_rme/gpt_rme.c reported by GCC 13.0.0:

"gpt_rme/gpt_rme.c:765:5: error: conflicting types for
'gpt_init_l0_tables' due to enum/integer mismatch;
have 'int(unsigned int, uintptr_t, size_t)'
{aka 'int(unsigned int, long unsigned int, long unsigned int)'}"

Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I38f28be290337e7d37d59b52cad7bde5b96b8d51

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Merge changes from topic "tonnad01/gcc_warn_fix" into integration

* changes:
fix(scmi): change function prototype to fix gcc error
fix(rdn1edge): change variable type to fix gcc sign conversion

Merge changes from topic "tonnad01/gcc_warn_fix" into integration

* changes:
fix(scmi): change function prototype to fix gcc error
fix(rdn1edge): change variable type to fix gcc sign conversion error

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Merge "docs: add threat model for AP-RSS interface" into integration

docs: add threat model for AP-RSS interface

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ic818da12584503e1a96396c4b55a8db14ae7584a

feat(qemu): support el3 spmc

Introduce additional defines needed when compiling the QEMU platform
with SPMC at EL3.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: If6dbe41fa87

feat(qemu): support el3 spmc

Introduce additional defines needed when compiling the QEMU platform
with SPMC at EL3.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: If6dbe41fa8761637e39579a1f6818dabc769c139

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feat(el3-spmc): make platform logical partition optional

Prior to this commit a logical platform specific partition is added when
compiling with SPMC at EL3. Not all platform need to add a logical
p

feat(el3-spmc): make platform logical partition optional

Prior to this commit a logical platform specific partition is added when
compiling with SPMC at EL3. Not all platform need to add a logical
platform so make this optional.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: I3bdd2a91350330c1637e8d84765974bfb6b225d7

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feat(qemu): support s-el2 spmc

Supports S-EL2 SPMC + S-EL1 SP on qemu. S-EL1 SPs packaged in .pkg files
are added to the FIP as blob with an UUID. BL2 parses TB_FW_CONFIG to
know which SP blobs to l

feat(qemu): support s-el2 spmc

Supports S-EL2 SPMC + S-EL1 SP on qemu. S-EL1 SPs packaged in .pkg files
are added to the FIP as blob with an UUID. BL2 parses TB_FW_CONFIG to
know which SP blobs to load into memory.

Co-developed-by: Olivier Deprez <olivier.deprez@arm.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: I4b61c4c048f31540d4f1ef9e05f0b12deb341e06

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feat(qemu): update abi between spmd and spmc

Updates the ABI between SPMD and the SPMC at S-EL1 so that the hard
coded SPMC manifest can be replaced by a proper manifest via TOS FW
Config. TOS FW Co

feat(qemu): update abi between spmd and spmc

Updates the ABI between SPMD and the SPMC at S-EL1 so that the hard
coded SPMC manifest can be replaced by a proper manifest via TOS FW
Config. TOS FW Config is provided via QEMU_TOS_FW_CONFIG_DTS as a DTS
file when building. The DTS is turned into a DTB which is added to the
FIP.

Note that this is an incompatible change and requires corresponding
change in OP-TEE ("core: sel1 spmc: boot abi update").

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: Ibabe78ef50a24f775492854ce5ac54e4d471e369

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Merge "fix(rmmd): add missing padding to RMM Boot Manifest and initialize it" into integration

fix(scmi): change function prototype to fix gcc error

Change function prototype of plat_css_get_scmi_info() to fix the GCC
sign conversion error "comparison between signed and unsigned integer
expre

fix(scmi): change function prototype to fix gcc error

Change function prototype of plat_css_get_scmi_info() to fix the GCC
sign conversion error "comparison between signed and unsigned integer
expressions". Changing channel_id type to unsigned int since it can
never be a negative value.

Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com>
Change-Id: I579b21497329db40897c10d86c8fc68e4877f3db

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fix(rdn1edge): change variable type to fix gcc sign conversion error

Change variable type in function bl31_platform_setup() to fix the GCC
sign conversion error "comparison between signed and unsign

fix(rdn1edge): change variable type to fix gcc sign conversion error

Change variable type in function bl31_platform_setup() to fix the GCC
sign conversion error "comparison between signed and unsigned integer
expressions".

Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com>
Change-Id: Iff914bd7ad521883723c8fb34dd893412cce7fc5

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fix(tsp): use verbose for power logs

TSP use verbose for cpu suspend resume logs

Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
Change-Id: Ic1d3706feec6361946dd5c0d2bea90a2dd7a2d02

fix(el3-spmc): fix coverity scan warnings

Validate emad descriptor integrity before accessing.
Check for NULL pointer access.

Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
Change-Id: Id4ff3e5d

fix(el3-spmc): fix coverity scan warnings

Validate emad descriptor integrity before accessing.
Check for NULL pointer access.

Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>
Change-Id: Id4ff3e5d88be95ca8d067378e344947880ec984b

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fix(el3-spmc): improve bound check for descriptor

Ensure that there is sufficient space in the memory
descriptor to accommodate the size of the composite memory
struct as part of the descriptor.

Si

fix(el3-spmc): improve bound check for descriptor

Ensure that there is sufficient space in the memory
descriptor to accommodate the size of the composite memory
struct as part of the descriptor.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Iea646b144c59a2a1a171298cabb5f31040a8af31

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Merge "docs: extend generic tf-a threat model" into integration

fix(cpus): workaround for Cortex-X2 erratum 2768515

Cortex-X2 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the

fix(cpus): workaround for Cortex-X2 erratum 2768515

Cortex-X2 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775100/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ib02688f7b6dc7f6ec305e68e8895174f6fd577a0

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fix(cpus): workaround for Cortex-A710 erratum 2768515

Cortex-A710 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before

fix(cpus): workaround for Cortex-A710 erratum 2768515

Cortex-A710 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: If17fe04d3fda0dba6b8aabdd837a1c53e1830ed5

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fix(rmmd): add missing padding to RMM Boot Manifest and initialize it

This patch also:
* Enforces the check of RES0 fields on EL3-RMM boot interface
and manifest
* Fixes a couple of

fix(rmmd): add missing padding to RMM Boot Manifest and initialize it

This patch also:
* Enforces the check of RES0 fields on EL3-RMM boot interface
and manifest
* Fixes a couple of nits on the EL3-RMM Boot Interface
documentation.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: Idb9e38f9fcda2ba0655646a1e2c4fdbabd5cdc40

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fix(st-gpio): define shift as uint32_t

This corrects MISRA C2012-10.6:
The value of a composite expression shall not be assigned to an object
with wider essential type.
While at it change all the sh

fix(st-gpio): define shift as uint32_t

This corrects MISRA C2012-10.6:
The value of a composite expression shall not be assigned to an object
with wider essential type.
While at it change all the shift values to unsigned.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Idf9915313af965db2106095df7cb48a84f50c519

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fix(st-sdmmc): check transfer size before filling register

Fix MISRA C2012-10.3:
The value of an expression shall not be assigned to an object with
a narrower essential type or of a different essent

fix(st-sdmmc): check transfer size before filling register

Fix MISRA C2012-10.3:
The value of an expression shall not be assigned to an object with
a narrower essential type or of a different essential type category.

Check buffer size is less than 4GB before casting the command argument.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iac1afcfe905c99b22cb39dc4104d351b0e647e5d

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fix(stm32mp1): rework DWL buffer cache invalidation

As the default part do nothing, all the code managing DWL buffer cache
invalidation can be under programmer flags.
This avoids running unneeded co

fix(stm32mp1): rework DWL buffer cache invalidation

As the default part do nothing, all the code managing DWL buffer cache
invalidation can be under programmer flags.
This avoids running unneeded code if the flags are not enabled, and
corrects MISRA C2012-16.6:
Every switch statement shall have at least two switch-clauses.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I90d2951f9518509b3380295fb1a6ad6b9c5e551e

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