| 8214ecda | 10-Jan-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(stm32mp1): add void entry in plat_def_toc_entries
The fill_image_descs() function in fiptool adds images until .cmdline_name is NULL. Add a void entry to STM32MP1 plat_def_toc_entries[] to prope
fix(stm32mp1): add void entry in plat_def_toc_entries
The fill_image_descs() function in fiptool adds images until .cmdline_name is NULL. Add a void entry to STM32MP1 plat_def_toc_entries[] to properly escape the loop. Also reported by Valentyn Korniienko (@ValentiWorkLearning) on github with pull requests [1] and [2].
[1] https://github.com/ARM-software/arm-trusted-firmware/pull/1997 [2] https://github.com/STMicroelectronics/arm-trusted-firmware/pull/8
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I94fd36ca677d46ce6df95c7674c6b6bd365b28c7
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| dcf43065 | 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs(psci): expound runtime instrumentation docs" into integration |
| 3011e1af | 11-May-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "ms/external_deps" into integration
* changes: feat(libc): add %c to printf/snprintf feat(compiler-rt): update source files chore(libfdt): update to v1.7.0 source files |
| b1af2676 | 08-Mar-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
docs(psci): expound runtime instrumentation docs
Change-Id: I3c30b44d4196c30fd07373282150e543959fce1a Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> |
| 44d9706e | 09-May-2023 |
Maksims Svecovs <maksims.svecovs@arm.com> |
feat(libc): add %c to printf/snprintf
Adds %c support for printf and snprintf to print one character. Required by most recent MbedTLS 3.4.0.
Change-Id: I4d9b2725127a929d58946353324f99ff22b3b28b Sig
feat(libc): add %c to printf/snprintf
Adds %c support for printf and snprintf to print one character. Required by most recent MbedTLS 3.4.0.
Change-Id: I4d9b2725127a929d58946353324f99ff22b3b28b Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
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| 658ce7ad | 04-May-2023 |
Maksims Svecovs <maksims.svecovs@arm.com> |
feat(compiler-rt): update source files
Update the compiler-rt source files to the tip of the llvm-project [1] [1]: https://github.com/llvm/llvm-project/commit/d9683a7
Change-Id: Icec9ec73094a2b39b0
feat(compiler-rt): update source files
Update the compiler-rt source files to the tip of the llvm-project [1] [1]: https://github.com/llvm/llvm-project/commit/d9683a7
Change-Id: Icec9ec73094a2b39b0240fc8253c36e7485d3a98 Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
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| 058e017e | 21-Apr-2023 |
Maksims Svecovs <maksims.svecovs@arm.com> |
chore(libfdt): update to v1.7.0 source files
Update libfdt to source files from v1.7.0 release. Upstream commit: https://github.com/dgibson/dtc/commit/039a99414e778332d8f9c04cbd3072e1dcc62798
Chang
chore(libfdt): update to v1.7.0 source files
Update libfdt to source files from v1.7.0 release. Upstream commit: https://github.com/dgibson/dtc/commit/039a99414e778332d8f9c04cbd3072e1dcc62798
Change-Id: I7e0475d2ddb819691f476e1753d1c899f8d7c278 Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>
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| 3331c33d | 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(optee): add device tree for coreboot table" into integration |
| 9d44b2b9 | 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(n1sdp): add platform-specific power domain functions" into integration |
| 5bfdb732 | 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(morello): add platform-specific power domain functions" into integration |
| f4bbf435 | 09-Feb-2023 |
Jeffrey Kardatzke <jkardatzke@google.com> |
feat(optee): add device tree for coreboot table
This adds creation of a device tree that will be passed to OP-TEE. Currently that device tree only contains the coreboot table per the Linux coreboot
feat(optee): add device tree for coreboot table
This adds creation of a device tree that will be passed to OP-TEE. Currently that device tree only contains the coreboot table per the Linux coreboot device tree specification. This device tree is then passed to OP-TEE so it can extract the CBMEM console information from the coreboot table for logging purposes.
Signed-off-by: Jeffrey Kardatzke <jkardatzke@google.com> Change-Id: I6a26d335e16f7226018c56ad571cca77b81b0f6a
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| a63de436 | 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix: increase BL32 limit" into integration |
| c2a76122 | 30-Apr-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix: increase BL32 limit
BL32_LIMIT has been increased from 2MB to 4MB to accommodate the latest tee.bin (it is around ~2.1MB).
Change-Id: I47b770bf23c23d38931a2b3316d076b829338d70 Signed-off-by: M
fix: increase BL32 limit
BL32_LIMIT has been increased from 2MB to 4MB to accommodate the latest tee.bin (it is around ~2.1MB).
Change-Id: I47b770bf23c23d38931a2b3316d076b829338d70 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Co-developed-by: Juan Pablo Conde <juanpablo.conde@arm.com>
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| e1eef335 | 10-May-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(spmd): fix build error with spmd" into integration |
| fd51b215 | 10-May-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
fix(spmd): fix build error with spmd
Currently when we build with 'SPD=spmd SPMD_SPM_AT_SEL2=0' options, this causes a build failure as 'plat_spmd_handle_group0_interrupt' is called irrespective of
fix(spmd): fix build error with spmd
Currently when we build with 'SPD=spmd SPMD_SPM_AT_SEL2=0' options, this causes a build failure as 'plat_spmd_handle_group0_interrupt' is called irrespective of 'SPMD_SPM_AT_SEL2' usage in 'spmd_group0_interrupt_handler_nwd'
So make 'plat_spmd_handle_group0_interrupt' dummy implementation available just when spmd is enabled and SPMC_AT_EL3 is disabled.
Change-Id: Iaccd38faab81671c98f9165f318145187dca9bc2 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 8700c6f7 | 10-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(psci): do not panic on illegal MPIDR" into integration |
| b967ca06 | 10-May-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "build(fpga): reduce cpu_libs to tc and neoverse" into integration |
| 3c3ea90c | 10-May-2023 |
Daniel Boulby <daniel.boulby@arm.com> |
build(fpga): reduce cpu_libs to tc and neoverse
Change-Id: I20e88d5e712dafa7364b7932b8b4aaa9051bea55 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> |
| a18e975f | 10-May-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge "docs: update release and code freeze dates" into integration |
| c84200ec | 10-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(pmu): unconditionally save PMCR_EL0" into integration |
| 41914de3 | 09-May-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes I5bb43cb0,I6aebe2ca,Ib59df16a,I9d037ab2,I9df5a465, ... into integration
* changes: fix(msm8916): add timeout for crash console TX flush style(msm8916): use size macros feat(msm89
Merge changes I5bb43cb0,I6aebe2ca,Ib59df16a,I9d037ab2,I9df5a465, ... into integration
* changes: fix(msm8916): add timeout for crash console TX flush style(msm8916): use size macros feat(msm8916): expose more timer frames fix(msm8916): drop unneeded initialization of CNTACR build(msm8916): disable unneeded workarounds fix(msm8916): flush dcache after writing msm8916_entry_point fix(msm8916): print \r before \n on UART console
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| 4bd8c929 | 09-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I1bfa797e,I0ec7a70e into integration
* changes: fix(tree): correct some typos fix(rockchip): use semicolon instead of comma |
| 269f3dae | 09-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mp/feat_ras" into integration
* changes: refactor(cpufeat): enable FEAT_RAS for FEAT_STATE_CHECKED refactor(ras): replace RAS_EXTENSION with FEAT_RAS |
| 7e002c8a | 06-Apr-2023 |
Stephan Gerhold <stephan@gerhold.net> |
fix(msm8916): add timeout for crash console TX flush
Resetting the UART DM controller while there are still remaining characters in the FIFO often results in corruption on the UART receiver side. To
fix(msm8916): add timeout for crash console TX flush
Resetting the UART DM controller while there are still remaining characters in the FIFO often results in corruption on the UART receiver side. To avoid this the msm8916 crash console implementation tries to wait until the TX FIFO is empty.
Unfortunately this might spin forever if the transmitter was disabled before it has fully finished transmitting. In this case the TXEMT bit console_uartdm_core_flush is waiting for will never get set.
There seems to be no good way to detect if the transmitter is actually enabled via the status registers. However, the TX FIFO is fairly small and should not take too long to get flushed, so fix this by simply limiting the amount of iterations with a short timeout.
Move the code to console_uartdm_core_init to ensure that this always happens before resetting the transmitter (also during initialization).
Change-Id: I5bb43cb0b6c029bcd15e253d60d36c0b310e108b Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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| a27e3f76 | 26-Mar-2023 |
Stephan Gerhold <stephan@gerhold.net> |
style(msm8916): use size macros
Use the pre-defined size macros (SZ_*) for more clarity and to avoid having to add comments to each size represented by hexadecimal numbers.
Change-Id: I6aebe2caf136
style(msm8916): use size macros
Use the pre-defined size macros (SZ_*) for more clarity and to avoid having to add comments to each size represented by hexadecimal numbers.
Change-Id: I6aebe2caf1365279670955b9b507dec7d7b04457 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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