| 60d330dc | 16-Feb-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpufeat): separate the EL2 and EL3 enablement code
Combining the EL2 and EL3 enablement code necessitates that it must be
called at el3_exit, which is the only place with enough context to
refactor(cpufeat): separate the EL2 and EL3 enablement code
Combining the EL2 and EL3 enablement code necessitates that it must be
called at el3_exit, which is the only place with enough context to make
the decision of what needs to be set.
Decouple them to allow them to be called from elsewhere.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I147764c42771e7d4100699ec8fae98dac0a505c0
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| c20ac568 | 04-Jul-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fix(intel): fix ncore ccu snoop dvm enable bug" into integration |
| 106aa54d | 09-Jun-2023 |
Jit Loon Lim <jit.loon.lim@intel.com> |
fix(intel): fix ncore ccu snoop dvm enable bug
Incorrect value stored in Coherent Subsystem ACE DVM Snoop Enable
register (CSADSER0). Set individual bit othervise previous value
is overwritten.
Sig
fix(intel): fix ncore ccu snoop dvm enable bug
Incorrect value stored in Coherent Subsystem ACE DVM Snoop Enable
register (CSADSER0). Set individual bit othervise previous value
is overwritten.
Signed-off-by: Anders Hedlund <anders.hedlund@windriver.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ib72fed261cbc3076ce385e19c4a5fa8e9e8b9924
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| 7b0c95ab | 25-May-2023 |
Werner Lewis <werner.lewis@arm.com> |
fix(n1sdp): configure platform specific secure SPIs
Previous implementation used common CSS interrupts, which do not match
the N1SDP platform interrupt map. Updated to configure Secure
interrupts ac
fix(n1sdp): configure platform specific secure SPIs
Previous implementation used common CSS interrupts, which do not match
the N1SDP platform interrupt map. Updated to configure Secure
interrupts according to the N1SDP TRM and InfraSYSDESIGN4.0
specification. Additionally, unused definitions from legacy interrupt
configuration are removed.
Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I3dd4bcd4875e138057c62d937572d446b8f88471
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| 3e6cfa7b | 25-Apr-2023 |
Werner Lewis <werner.lewis@arm.com> |
feat(morello): fdts: add CoreSight DeviceTree bindings
Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I6bc524aa9a4810e2c2df92df7fd13a27b0328766 |
| 214de62c | 04-Jul-2023 |
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> |
feat(qemu): add "neoverse-v1" cpu support
Add support to qemu "neoverse-v1" cpu for "qemu_sbsa" ('sbsa-ref')
platform.
Change-Id: Id710e2b960e7938d2dbe7a88d9e158a7009fc3d1
Signed-off-by: Marcin Jus
feat(qemu): add "neoverse-v1" cpu support
Add support to qemu "neoverse-v1" cpu for "qemu_sbsa" ('sbsa-ref')
platform.
Change-Id: Id710e2b960e7938d2dbe7a88d9e158a7009fc3d1
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
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| cd89a704 | 16-Jun-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(tc): update RSS driver inteface calls
In order to comply with the previous RSS driver change,
interface calls have been updated.
Change-Id: I645f6e8638cedfa6ff92d07b93cbaf38bdb2e09f
Signed
refactor(tc): update RSS driver inteface calls
In order to comply with the previous RSS driver change,
interface calls have been updated.
Change-Id: I645f6e8638cedfa6ff92d07b93cbaf38bdb2e09f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| a99a378d | 16-Jun-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(fvp): update RSS driver inteface calls
In order to comply with the previous RSS driver change,
interface calls have been updated.
Change-Id: I0a1f3c6a6f8017468d86903cc0158805c6461c28
Signe
refactor(fvp): update RSS driver inteface calls
In order to comply with the previous RSS driver change,
interface calls have been updated.
Change-Id: I0a1f3c6a6f8017468d86903cc0158805c6461c28
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 36bcf10c | 16-Jun-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(rss): make RSS driver standalone for Measured Boot
Currently, Measured Boot RSS driver gathers data from platform calls,
specifically RSS metadata. Generally, the driver should use the leas
refactor(rss): make RSS driver standalone for Measured Boot
Currently, Measured Boot RSS driver gathers data from platform calls,
specifically RSS metadata. Generally, the driver should use the least
amount of platform calls possible, and the platform should provide the
data directly to the driver via the driver interface.
For this purpose, RSS Measured Boot driver interface APIs were updated
and platform calls were removed from RSS Measured Boot driver.
Change-Id: I6c797d9ac2d70215f32a084a7643884b399ee28c
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 7794d6c8 | 01-Jun-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
feat(build): march option selection
Current build infra uses ARM_ARCH_MAJOR/MINOR to come up with march
version and uses that march version with the compiler.
However in certain situations this is
feat(build): march option selection
Current build infra uses ARM_ARCH_MAJOR/MINOR to come up with march
version and uses that march version with the compiler.
However in certain situations this is not ideal, like for example when
we build with gcc-11 which supports only till march=armv8.5 but
we need to build for 8.8 build, this means we need to bump down
MAJOR/MINOR and we can't rely on major and minor values from the
platform to select march value and build infra doesn't even try
to compile and fails with not supported MAJOR/MINOR.
By adding a march build helper we try to check if compiler supports
given march value from MAJOR/MINOR values from platform, if compiler
doesn't support then we try to check what's the max or best supported
march version by compiler and choose that march value and try to
compile with that.
This is a supportive mechanism which will decouple march reliance on
MAJOR/MINOR values from platform and will pave way for setting up
enabling of features based on MAJOR/MINOR without worrying about the
compiler not supporting given MAJOR/MINOR.
Also in TF-A we use generic instructions without much reliance or need
for exact march necessity. So enabling and building features from
armv-8.8 using an armv-8.5 march value is still going to be fine.
Please note: Platforms are free to freeze their march values using
`MARCH_DIRECTIVE`. In absence of this define we are going to poke
the compiler and come up with a potential march value.
Change-Id: I673061a269ec9018ff12e75dc375979f5e33b7d1
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 8e31faa0 | 30-Jun-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_handoff_changes" into integration
* changes:
chore(xilinx): update warning message
feat(versal-net): add cluster check in handoff parameters
feat(versal-net): ge
Merge changes from topic "xlnx_handoff_changes" into integration
* changes:
chore(xilinx): update warning message
feat(versal-net): add cluster check in handoff parameters
feat(versal-net): get the handoff params using IPI
chore(xilinx): replace fsbl with xbl
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| 66b5620c | 28-Jun-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(versal-net): correct device node indexes
Currently, the peripheral node indexes are incorrect
for Versal NET due to which incorrect node error is
generated and permission to set the device as wa
fix(versal-net): correct device node indexes
Currently, the peripheral node indexes are incorrect
for Versal NET due to which incorrect node error is
generated and permission to set the device as wakeup
source is failed. Correct Versal NET peripheral node
indexes to fix above issue.
Fixes: 662aafd6475e ("feat(xilinx): add device node indexes")
Change-Id: I4a2d76f375645e13512599a0272d9322ff6fafd3
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
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| 1c62cc7f | 30-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(mediatek): support saving/restoring GICR registers" into integration |
| a0a4d86c | 22-Jun-2023 |
Akshay Belsare <akshay.belsare@amd.com> |
chore(xilinx): update warning message
Update the Warning message to be more informative
about the warning being printed.
Change-Id: I923dc5dd760908844d5e1ac8542fd1b04c9f0af5
Signed-off-by: Akshay B
chore(xilinx): update warning message
Update the Warning message to be more informative
about the warning being printed.
Change-Id: I923dc5dd760908844d5e1ac8542fd1b04c9f0af5
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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| 01c8c6a5 | 15-Jun-2023 |
Akshay Belsare <akshay.belsare@amd.com> |
feat(versal-net): add cluster check in handoff parameters
Versal NET platform supports multiple cpu clusters and the cluster
information for every partition contaning firmware component
is being pas
feat(versal-net): add cluster check in handoff parameters
Versal NET platform supports multiple cpu clusters and the cluster
information for every partition contaning firmware component
is being passed by PLM through handoff parameters to TF-A.
Function implementation for getting cluster value for the firmware
component partition in TF-A and check for the firmware component
being targeted to be executed on Cluster 0.
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Change-Id: I8622699e12b0a9cda83ae46e2ad0a038ca377fda
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| a36ac40c | 07-Mar-2023 |
Akshay Belsare <akshay.belsare@amd.com> |
feat(versal-net): get the handoff params using IPI
Use the IPI command GET_HANDOFF_PARAM to get the PLM to TF-A handoff
parameters. The BL32/BL33 information from the handoff parameters will
be used
feat(versal-net): get the handoff params using IPI
Use the IPI command GET_HANDOFF_PARAM to get the PLM to TF-A handoff
parameters. The BL32/BL33 information from the handoff parameters will
be used by TF-A.
If no valid PLM to TF-A handoff parameters are available then,
the TF-A will fall back to the build time information or defaults
set in the TF-A for BL32/BL33.
Once the bootmode identification is supported the default configuration
will be done only for JTAG and for all other bootmodes PLM to TF-A
handoff parameters will be used.
Change-Id: Ia2204fe30fea6f32b4e5d2610820217e6ed23e4d
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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| b9d26cd3 | 08-Jun-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
chore(xilinx): replace fsbl with xbl
The handoff functionality is common between platforms and all
platforms do not use fsbl terminology. Renaming handoff related code
to generic naming.
Signed-off
chore(xilinx): replace fsbl with xbl
The handoff functionality is common between platforms and all
platforms do not use fsbl terminology. Renaming handoff related code
to generic naming.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Ic250af927f33c4fecbc2e6bab01b83a6dd2aab52
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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| c190f3ed | 12-Jun-2023 |
Jacky Bai <ping.bai@nxp.com> |
docs(maintainers): add maintainers for i.MX9 SoCs
Add maintainers for NXP i.MX9 SoC family.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6dd694af56da9f4d241fda28b781254586b5f462 |
| c472b750 | 09-Jun-2023 |
Jacky Bai <ping.bai@nxp.com> |
docs(imx9): add imx93 platform
Add i.MX9 platform introduction.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ic07ca394cff6a9e3e21b7a03f9c9080d3c1ef91a |
| 27a0be77 | 31-May-2022 |
Clement Faure <clement.faure@nxp.com> |
feat(imx93): add OPTEE support
Add OPTEE support for imx93 platform.
Add support for the device tree overlay.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Jacky Bai <ping.bai
feat(imx93): add OPTEE support
Add OPTEE support for imx93 platform.
Add support for the device tree overlay.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I99c7819665f8f746b0dd7941fb83dbec9d8651de
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| f560f843 | 27-Sep-2022 |
Ye Li <ye.li@nxp.com> |
feat(imx93): protect OPTEE memory to secure access only
Configure TRDC_NIC MRC0 to protect OPTEE DDR memory to secure
access only from A55 cores and other peripherals' masters.
Signed-off-by: Ye Li
feat(imx93): protect OPTEE memory to secure access only
Configure TRDC_NIC MRC0 to protect OPTEE DDR memory to secure
access only from A55 cores and other peripherals' masters.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ie5363ecff67e3183fbde998a0bba93df4c099e1f
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| 422d30c6 | 07-Jun-2023 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx93): add cpuidle and basic suspend support
Add cpuidle and basic suspend support. For now only
core & cluster will be put into low power mode when
system suspend.
Signed-off-by: Jacky Bai <
feat(imx93): add cpuidle and basic suspend support
Add cpuidle and basic suspend support. For now only
core & cluster will be put into low power mode when
system suspend.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ife0b6dc48738ae7a2322d6a7f6342ffe15d35342
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| cf7ef4c7 | 25-May-2023 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx93): add reset & poweroff support
Add system reset & system power off support on i.MX93.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Id180461541a1b3f73b2dc00c9cad33f484c145e6 |
| 3d3b769a | 24-Apr-2022 |
Yangbo Lu <yangbo.lu@nxp.com> |
feat(imx93): allow SoC masters access to system TCM
SoC masters should be allowed to access to system TCM. For example,
This makes it possible for M core to run ENET/ENET_QOS examples whose
DMA acce
feat(imx93): allow SoC masters access to system TCM
SoC masters should be allowed to access to system TCM. For example,
This makes it possible for M core to run ENET/ENET_QOS examples whose
DMA accesses system TCM in single boot mode.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I4149e047e49a66699015f92c25a7f5334a972835
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| eb76a241 | 26-Jul-2022 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx93): update the ocram trdc config for did10
Update the ocram trdc config for DID10 to make sure NPU
can access the OCRAM. Need to fine tune the OCRAM config
in the future.
Signed-off-by: Ja
feat(imx93): update the ocram trdc config for did10
Update the ocram trdc config for DID10 to make sure NPU
can access the OCRAM. Need to fine tune the OCRAM config
in the future.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: Iaa8518e0bea2c3939292202c116bd08444e07698
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