| 1d7ed58f | 16-Sep-2022 |
Stephan Gerhold <stephan@gerhold.net> |
refactor(msm8916): handle multiple CPU clusters
Some Qualcomm platforms similar to MSM8916 have multiple CPU clusters. In this case, some of the hardware blocks are duplicated and must be configured
refactor(msm8916): handle multiple CPU clusters
Some Qualcomm platforms similar to MSM8916 have multiple CPU clusters. In this case, some of the hardware blocks are duplicated and must be configured separately.
Refactor the code to handle additional clusters by introducing loops and some conditionals.
No functional change for existing single cluster platforms.
Change-Id: I5b4b1ad2a1adde559d5b79b7698afe73733b2e90 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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| cf0a75f0 | 02-Sep-2022 |
Stephan Gerhold <stephan@gerhold.net> |
feat(msm8916): add port for MSM8909
The Qualcomm Snapdragon 210 (MSM8909) SoC is very similar to the existing MSM8916, except for:
- ARM Cortex-A7 instead of Cortex-A53 (AArch32-only) - MMU-500
feat(msm8916): add port for MSM8909
The Qualcomm Snapdragon 210 (MSM8909) SoC is very similar to the existing MSM8916, except for:
- ARM Cortex-A7 instead of Cortex-A53 (AArch32-only) - MMU-500 r2p0 instead of r0p0 (need to clear CACHE_LOCK bit) - Different default BL31 address and UART number
Make the existing MSM8916 platform port usable for MSM8909 as well by adding some minimal if statements where necessary plus the platform make files for msm8909.
Change-Id: I8eca5bd8f2486cc2174562fb5de28f8dffa0d874 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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| d9b04423 | 15-Mar-2023 |
Stephan Gerhold <stephan@gerhold.net> |
feat(msm8916): clear CACHE_LOCK for MMU-500 r2p0+
Newer Qualcomm platforms similar to MSM8916 use MMU-500 r2p0+ instead of MMU-500 r0p0. On these versions it is necessary to clear the SMMU_sACR.CACH
feat(msm8916): clear CACHE_LOCK for MMU-500 r2p0+
Newer Qualcomm platforms similar to MSM8916 use MMU-500 r2p0+ instead of MMU-500 r0p0. On these versions it is necessary to clear the SMMU_sACR.CACHE_LOCK bit to allow the normal world to write to SMMU_CBn_ACTLR. Without this Linux shows a warning and is unable to workaround the errata in MMU-500:
arm-smmu 1e00000.iommu: Failed to disable prefetcher [errata #841119 and #826419], check ACR.CACHE_LOCK
Handle this dynamically at runtime by enabling all the necessary SMMU clocks and check the IDR7 register for MMU-500 r2p0+. This must be applied to both SMMUs on the platform: APPS and GPU.
While at it clean up the clock handling: Leave the SMMU clocks on because the normal world will need it again while booting. But make sure the vote register of the RPM co-processor does not keep these clocks always-on. For some reasons some platforms seem to have a non-zero reset value for GCC_RPM_SMMU_CLOCK_BRANCH_ENA_VOTE.
Change-Id: I34cf7d3f2db977b0930eb6e64a870ecaf02a7573 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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| b9072a34 | 17-Jul-2023 |
Stephan Gerhold <stephan@gerhold.net> |
style(msm8916): add missing braces to while statements
According to the coding style all conditional statements (such as if, for, while, do) must use braces regardless of the number of the statement
style(msm8916): add missing braces to while statements
According to the coding style all conditional statements (such as if, for, while, do) must use braces regardless of the number of the statements in the body [1].
Fix this for the code inside plat/qti/msm8916.
[1]: https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-style.html#conditional-statement-bodies
Change-Id: I74f2e65aa2b3a65899e37dfd3f481d90fb15531c Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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| 80c2c374 | 19-Jul-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(spmd): perform G0 interrupt acknowledge and deactivation" into integration |
| 799f42b5 | 19-Jul-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "refactor(tc): move all plat tests in test makefile" into integration |
| 80569faa | 18-Jul-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topics "rotpk_rss_interface", "rss_interfaces" into integration
* changes: refactor(tc): print RSS interface test PSA status test(tc): test for AP/RSS interface for ROTPK fe
Merge changes from topics "rotpk_rss_interface", "rss_interfaces" into integration
* changes: refactor(tc): print RSS interface test PSA status test(tc): test for AP/RSS interface for ROTPK feat(psa): interface with RSS for retrieving ROTPK
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| 1ca5c887 | 27-Jun-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
refactor(cpus): reorder Neoverse-N1 .S file
Moving neoverse_n1_disable_speculative_loads function before reset function to maintain git blame with refactor to new framework.
Change-Id: I79a4de9955a
refactor(cpus): reorder Neoverse-N1 .S file
Moving neoverse_n1_disable_speculative_loads function before reset function to maintain git blame with refactor to new framework.
Change-Id: I79a4de9955a6f37e289456a743b946c0c4c8c27f Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| 291bb2f4 | 06-Jun-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
refactor(cpus): convert Neoverse-E1 to framework
For E1, this involves replacing: - The reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically - The <cpu>_erra
refactor(cpus): convert Neoverse-E1 to framework
For E1, this involves replacing: - The reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically - The <cpu>_errata_report with the errata_report_shim to report errata automatically And for the E1 DSU erratum, creating symbolic names to the already existing errata workaround functions to get them registered under the Errata Framework.
Testing was conducted by: - Manual comparison of disassembly of converted functions with non- converted functions:
aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf vs aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf
- Build for debug with all errata enabled and step through ArmDS to ensure all functions are entered and the path remains the same as before conversion to the new framework.
Change-Id: I0a059574948badbd108333344286c76aeb142e71 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| c5ce48f5 | 17-Jul-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
refactor(tc): move all plat tests in test makefile
Moving all PLATFORM_TESTS into platform test makefile
Change-Id: I31821e9e69d916d12ae4c804df26f07fb523c835 Signed-off-by: Lauren Wehrmeister <laur
refactor(tc): move all plat tests in test makefile
Moving all PLATFORM_TESTS into platform test makefile
Change-Id: I31821e9e69d916d12ae4c804df26f07fb523c835 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| 6c91fc44 | 12-Jul-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
fix(spmd): perform G0 interrupt acknowledge and deactivation
Prior to delegating handling of Group0 secure interrupt to platform handler, SPMD framework must acknowledge the highest pending interrup
fix(spmd): perform G0 interrupt acknowledge and deactivation
Prior to delegating handling of Group0 secure interrupt to platform handler, SPMD framework must acknowledge the highest pending interrupt. Moreover, once the platform has handled the interrupt successfully, SPMD must deactivate the interrupt.
The rationale behind this decision is SPMD framework is well suited to perform interrupt management at GIC boundary while the platform handler is well equipped to deal with the device interface related to the interrupt.
This patch also fixes a bug in the error code returned upon invocation of FFA_EL3_INTR_HANDLE from normal world.
Change-Id: If8fef51899e25f966038cc01ec58c84ee25e88eb Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| a2d43637 | 17-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bk/context_refactor" into integration
* changes: refactor(amu): separate the EL2 and EL3 enablement code refactor(cpufeat): separate the EL2 and EL3 enablement code |
| cb6b7505 | 14-Jul-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
refactor(tc): print RSS interface test PSA status
Adding PSA status to print statement upon failing communication initialization, non-volatile counter, and rotpk read interface calls in platform_tes
refactor(tc): print RSS interface test PSA status
Adding PSA status to print statement upon failing communication initialization, non-volatile counter, and rotpk read interface calls in platform_tests.
Change-Id: Ia949cc2d18e93efb68f663d0c4e5500ca9021a94 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| 00b7e0bf | 13-Jun-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
test(tc): test for AP/RSS interface for ROTPK
Adding new test for AP/RSS interface for reading ROTPK for each 3 types of ROTPKs for: CCA, secure, and non-secure firmware.
Enabled by PLATFORM_TEST=r
test(tc): test for AP/RSS interface for ROTPK
Adding new test for AP/RSS interface for reading ROTPK for each 3 types of ROTPKs for: CCA, secure, and non-secure firmware.
Enabled by PLATFORM_TEST=rss-rotpk.
Update to print output when AP/RSS interface platform tests pass to be able to reuse expect script functionality in CI.
Change-Id: Icc50b090e18a272378751fda104d209738b5b70c Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| 5dbb812e | 17-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs: move common build option from Arm-specific to common file" into integration |
| 50316e22 | 13-Jun-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
feat(psa): interface with RSS for retrieving ROTPK
Adding the AP/RSS interface for reading the ROTPK.
The read interface implements the psa_call: psa_call(RSS_CRYPTO_HANDLE, PSA_IPC_CALL,
feat(psa): interface with RSS for retrieving ROTPK
Adding the AP/RSS interface for reading the ROTPK.
The read interface implements the psa_call: psa_call(RSS_CRYPTO_HANDLE, PSA_IPC_CALL, in_vec, IOVEC_LEN(in_vec), out_vec, IOVEC_LEN(out_vec));
where the in_vec indicates which of the 3 ROTPKs we want, and the out_vec stores the ROTPK value we get back from RSS.
Through this service, we will be able to read any of the 3 ROTPKs used on a CCA platform: - ROTPK for CCA firmware (BL2, BL31, RMM). - ROTPK for secure firmware. - ROTPK for non-secure firmware.
Change-Id: I44c615588235cc797fdf38870b74b4c422be0a72 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| 94e27bc1 | 14-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(libc): add %X to printf/snprintf" into integration |
| 71d4aa61 | 14-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(mt8188): modify APU DAPC permission" into integration |
| b8b1c1f5 | 14-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "xlnx_dtb_modification" into integration
* changes: feat(versal-net): ddr address reservation in dtb at runtime feat(versal): ddr address reservation in dtb at runtime |
| e3795354 | 11-Jul-2023 |
Rob Hughes <robert.hughes@arm.com> |
chore(ethos-n): update npu firmware version
A newer version of the Arm(R) Ethos(TM)-N NPU firmware is now available, and so the constants in the SiP service need updating.
Change-Id: I8eee7d543bac0
chore(ethos-n): update npu firmware version
A newer version of the Arm(R) Ethos(TM)-N NPU firmware is now available, and so the constants in the SiP service need updating.
Change-Id: I8eee7d543bac0a726c6161a16b3df90609f6b443 Signed-off-by: Rob Hughes <robert.hughes@arm.com>
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| abd11ce7 | 14-Jul-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(xlat): fix defects on the xlat library reported by coverity scan" into integration |
| d06edabf | 12-Jul-2023 |
Chungying Lu <chungying.lu@mediatek.corp-partner.google.com> |
feat(mt8188): modify APU DAPC permission
We limited the r/w permission of some register groups for security concerns. These regitser groups should not be accessed by domain 3 or domain 5.
Change-Id
feat(mt8188): modify APU DAPC permission
We limited the r/w permission of some register groups for security concerns. These regitser groups should not be accessed by domain 3 or domain 5.
Change-Id: I2188da88d9e10a931d87bda14dc7dca46633dcd8 Signed-off-by: Chungying Lu <chungying.lu@mediatek.corp-partner.google.com>
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| 483edc20 | 13-Jul-2023 |
Matt Schulte <matsch@google.com> |
feat(libc): add %X to printf/snprintf
Enables printing captial hex chars as well as lowercase
Change-Id: I4dc48c3db97b908f0bb344d7765807967de8cf02 Signed-off-by: Matt Schulte <matsch@google.com> |
| 2974ad87 | 12-Jul-2023 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
fix(xlat): fix defects on the xlat library reported by coverity scan
The coverity defects fixed by this patch is
** CID 394601: Integer handling issues (NO_EFFECT) /lib/xlat_tables_v2/aarch64/xla
fix(xlat): fix defects on the xlat library reported by coverity scan
The coverity defects fixed by this patch is
** CID 394601: Integer handling issues (NO_EFFECT) /lib/xlat_tables_v2/aarch64/xlat_tables_arch.c: 30 in xlat_arch_is_granule_size_supported()
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: Ibc8e20bd7318a52702fbd7aa86e22cd2ded42610
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| 2503c8f3 | 13-Jul-2023 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "build(fpga): remove a710 from fpga build" into integration |