fix(services): disable workaround discovery on aarch32 for now

The Arm Architecture Service (arm_arch_svc) is required for SP_MIN on
AArch32 because the PSCI_FEATURES call implementation in TF-A alw

fix(services): disable workaround discovery on aarch32 for now

The Arm Architecture Service (arm_arch_svc) is required for SP_MIN on
AArch32 because the PSCI_FEATURES call implementation in TF-A always
indicates support for SMCCC_VERSION. However, currently it cannot be
built for AArch32 because all the workaround check functions
(check_wa_cve_2017_5715(), check_smccc_arch_wa3_applies(), ...)
are not implemented for AArch32.

While this should be ideally fixed at some point, disable the
SMCCC_ARCH_WORKAROUND implementations for AArch32 for now so at least
the rest of the calls can be built correctly. This still helps overall
because implementing SMCCC_VERSION is mandatory while the workaround
calls are optional.

Change-Id: Ic19973a8e4d50a97f274d4461794c117b337396b
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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Merge "docs(rme): update tftf build command" into integration

refactor(cpus): convert Neoverse V1 to use CPU helpers

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Idb4b47982278cda93a7c0f0a49dfceb75b8d88e4

refactor(cpus): convert Neoverse V1 to framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report w

refactor(cpus): convert Neoverse V1 to framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Testing was conducted by:

* Building for release with all errata flags enabled and running script
in change 19136 to compare output of objdump for each errata. Only
able to verify the check functions this way, rest had to manually
verified

* Manual comparison of disassembly of converted functions with non-
converted functions

aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

* Build for release with all errata flags enabled and run default tftf
tests

CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp DEBUG=0 \
CTX_INCLUDE_AARCH32_REGS=0 HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 \
BL33=./../tf-a-tests/build/fvp/release/tftf.bin \
ERRATA_V1_1618635=1 ERRATA_V1_1774420=1 ERRATA_V1_1791573=1 \
ERRATA_V1_1852267=1 ERRATA_V1_1925756=1 ERRATA_V1_1940577=1 \
ERRATA_V1_1966096=1 ERRATA_V1_2108267=1 ERRATA_V1_2139242=1 \
ERRATA_V1_2216392=1 ERRATA_V1_2294912=1 ERRATA_V1_2372203=1 \
ERRATA_V1_2743093=1 ERRATA_V1_2743233=1 ERRATA_V1_2779461=1 \
WORKAROUND_CVE_2022_23960=1 ERRATA_ABI_SUPPORT=1 all fip

* Build for debug with all errata enabled and step through ArmDS
at reset to ensure all functions are entered.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ic5697b7cd2a508dee9978d89136fbe168f34626c

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refactor(cpus): reorder Neoverse V1 errata by ascending order

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I1c531fe166218804e4fc9ebbdeda2bfebdd69081

Merge changes from topic "gr/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A76 to use cpu helpers
refactor(cpus): convert the Cortex-A76 to use the errata frame

Merge changes from topic "gr/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A76 to use cpu helpers
refactor(cpus): convert the Cortex-A76 to use the errata framework

show more ...

Merge changes from topic "gr/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A55 to use cpu helpers
refactor(cpus): convert the Cortex-A55 to use the errata frame

Merge changes from topic "gr/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A55 to use cpu helpers
refactor(cpus): convert the Cortex-A55 to use the errata framework
refactor(cpus): convert the Cortex-A76AE to use cpu helpers
refactor(cpus): convert the Cortex-A76AE to use the errata framework
refactor(cpus): convert the Cortex-A78 to use cpu helpers
refactor(cpus): convert the Cortex-A78 to use the errata framework
refactor(cpus): reorder Cortex-A78 errata by ascending order
refactor(cpus): convert the Cortex-A78C to use cpu helpers
refactor(cpus): convert the Cortex-A78C to use the errata framework
refactor(cpus): reorder Cortex-A78C errata by ascending order
refactor(cpus): convert the Cortex-X1 to use cpu helpers
refactor(cpus): convert the Cortex-X1 to use the errata framework
refactor(cpus): reorder Cortex-X1 errata by ascending order
refactor(cpus): use cpu errata wrappers Cortex-A12 aarch32 cpu
refactor(cpus): use cpu errata wrappers Cortex-A7 and A9 aarch32 cpus

show more ...

fix(cpus): workaround for Neoverse N2 erratum 2779511

Neoverse N2 erratum 2779511 is a Cat B erratum that applies to
all revisions <=r0p2 and is fixed in r0p3. The workaround is to
set bit[47] of CP

fix(cpus): workaround for Neoverse N2 erratum 2779511

Neoverse N2 erratum 2779511 is a Cat B erratum that applies to
all revisions <=r0p2 and is fixed in r0p3. The workaround is to
set bit[47] of CPUACTLR3_EL1

SDEN documentation:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Iaa0e30de8473ecb1df1fcca3a45904aac2e419b3

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fix(errata-abi): added Neoverse N2 to Errata ABI list

added the missing Neoverse N2 flag required for
enabling Neoverse N2 CPU in Errata ABI

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm

fix(errata-abi): added Neoverse N2 to Errata ABI list

added the missing Neoverse N2 flag required for
enabling Neoverse N2 CPU in Errata ABI

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I06c6fa67e2f1ccc053f1b1b9261e189c56f4347a

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fix(cpus): workaround for Neoverse N2 erratum 2743014

Neoverse N2 erratum 2743014 is a Cat B erratum that applies to
all revisions <=r0p2 and is fixed in r0p3. The workaround is to
set CPUACTLR5_EL1

fix(cpus): workaround for Neoverse N2 erratum 2743014

Neoverse N2 erratum 2743014 is a Cat B erratum that applies to
all revisions <=r0p2 and is fixed in r0p3. The workaround is to
set CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Ie7e1be5dea9d1f74738f9fed0fb58bfd41763192

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fix(docs): updated certain Neoverse N2 erratum status in docs

Certain Neoverse N2 erratum in docs were out of date with the latest
SDEN document and hence updated it to match the latest

SDEN docume

fix(docs): updated certain Neoverse N2 erratum status in docs

Certain Neoverse N2 erratum in docs were out of date with the latest
SDEN document and hence updated it to match the latest

SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I5d82a56388a46a09a42b940a633ecebdde0c74e3

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refactor(cpus): convert Neoverse N2 to use CPU helpers

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I063ff1d61bf1e0c4eef31fd55172bb0c321ed1e0

refactor(cpus): convert Neoverse N2 to framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report w

refactor(cpus): convert Neoverse N2 to framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Testing was conducted by:

* Manual comparison of disassembly of converted functions with non-
converted functions

aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

* Build for release with all errata flags enabled and run default tftf
tests

CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp CTX_INCLUDE_AARCH32_REGS=0 \
HW_ASSISTED_COHERENCY=1 USE_COHERENT_MEM=0 \
BL33=./../tf-a-tests/build/fvp/debug/tftf.bin \
ERRATA_N2_2002655=1 ERRATA_N2_2025414=1 ERRATA_N2_2067956=1 ERRATA_N2_2189731=1 \
ERRATA_N2_2138956=1 ERRATA_N2_2138953=1 ERRATA_N2_2242415=1 ERRATA_N2_2138958=1 \
ERRATA_N2_2242400=1 ERRATA_N2_2280757=1 ERRATA_N2_2326639=1 ERRATA_N2_2376738=1 \
ERRATA_N2_2388450=1 ERRATA_N2_2743014=1 ERRATA_N2_2743089=1 ERRATA_DSU_2313941=1 \
WORKAROUND_CVE_2022_23960=1 ERRATA_ABI_SUPPORT=1 all fip

* Build for debug with all errata enabled and step through ArmDS
at reset to ensure all functions are entered.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I3dd06b5d827de5836eadd58ae28f28e62039f257

show more ...

refactor(cpus): reorder Neoverse N2 errata by ascending order

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Icf4c12f8404d2e7791bd9c008fe261314b047e14

refactor(cpus): convert the Cortex-A76 to use cpu helpers

Change-Id: I9c9dff626f073d762b5c8c2d8286e1654ac5c2e5
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

refactor(cpus): convert the Cortex-A55 to use cpu helpers

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I45835b223f4734279845610529454fe0148ea43f

refactor(cpus): convert the Cortex-A76 to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Build

refactor(cpus): convert the Cortex-A76 to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building with errata and stepping through from ArmDS and running tftf.

Change-Id: I126f09de44b16e8bbb7e32477b880b4650eef23b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

refactor(cpus): convert the Cortex-A55 to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Build

refactor(cpus): convert the Cortex-A55 to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building with errata and stepping through from ArmDS and running tftf.

Change-Id: I2ff16be8bb568e37477edbbd7551877cbbde4c60
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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refactor(cpus): convert the Cortex-A76AE to use cpu helpers

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I72627afd0e2f10fb754d5c0de137fc9714ed391f

refactor(cpus): convert the Cortex-A76AE to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Buildi

refactor(cpus): convert the Cortex-A76AE to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building with errata and stepping through from ArmDS and running tftf.

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I1936ab6aaef803f653e79f5c6b590a59b34a8ed1

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refactor(cpus): convert the Cortex-A78 to use cpu helpers

Change-Id: I3a65815cee9f78acb79b86990d20cf936aee7023
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

refactor(cpus): convert the Cortex-A78 to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building

refactor(cpus): convert the Cortex-A78 to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building with errata and stepping through from ArmDS and running tftf.

Change-Id: I41e4169fb16ef488e116f6b3b1b5cc78b070c0fb
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

refactor(cpus): reorder Cortex-A78 errata by ascending order

Change-Id: I433b2b1e5b3604bb0a13d167167b0f86255c6903
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

refactor(cpus): convert the Cortex-A78C to use cpu helpers

Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
Change-Id: I6ef39641a9534e48db27ccd63b6190570dbfe760

refactor(cpus): convert the Cortex-A78C to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136

refactor(cpus): convert the Cortex-A78C to use the errata framework

Testing:
- Manual comparison of disassembly with and without conversion.
- Using the test script in gerrit - 19136
- Building with errata and stepping through from ArmDS and running tftf.

Change-Id: Ib361cdfa43fc1c88d97e346d41b1cbf211c045d9
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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