Merge changes from topic "st_remove_shm" into integration

* changes:
docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated
feat(stm32mp15): disable OP-TEE shared memory

Merge "fix(st): properly check LOADADDR" into integration

Merge "fix(cpus): workaround for Cortex-A510 erratum 2080326" into integration

fix(cpus): workaround for Cortex-A510 erratum 2080326

Cortex-A510 erratum 2080326 is a Cat B erratum that applies
to all revisions <= r0p2 and is fixed in r0p3.
The workaround sequence helps perform

fix(cpus): workaround for Cortex-A510 erratum 2080326

Cortex-A510 erratum 2080326 is a Cat B erratum that applies
to all revisions <= r0p2 and is fixed in r0p3.
The workaround sequence helps perform a DSB after each TLBI
instruction and can be applied only for version r0p2 and has
minimal performance impact.
The workaround is not applicable for versions < r0p2.

SDEN documentation:
https://developer.arm.com/documentation/SDEN1873361/latest

Change-Id: Ib9bce8b711c25a79f7b2f891ae6f8b366fc80ddd
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(cpus): fix the rev-var of Neoverse-V1

Update the revision and variant information in the
errata ABI file, neoverse_v1.S file for erratum ID - 2294912
to match the revision and variant in the lat

fix(cpus): fix the rev-var of Neoverse-V1

Update the revision and variant information in the
errata ABI file, neoverse_v1.S file for erratum ID - 2294912
to match the revision and variant in the latest SDEN.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1401781/latest

Change-Id: I38a0f53c3515860ba442b5c0872c8ab051fdda6f
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(errata-abi): update the Neoverse-N2 errata ABI struct

Updated the structure for Neoverse_N2 in the errata ABI file
for the missing entries from the neoverse_n2.S file.

Change-Id: I635c39014a7b3

fix(errata-abi): update the Neoverse-N2 errata ABI struct

Updated the structure for Neoverse_N2 in the errata ABI file
for the missing entries from the neoverse_n2.S file.

Change-Id: I635c39014a7b3e842a978a59e122d508d4bcf3c1
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(errata-abi): update the neoverse-N1 errata ABI struct

Updated the structure for Neoverse_N1 in the errata ABI file
for the missing entries from the neoverse_n1.S file.

Change-Id: I79a1a72b80778

fix(errata-abi): update the neoverse-N1 errata ABI struct

Updated the structure for Neoverse_N1 in the errata ABI file
for the missing entries from the neoverse_n1.S file.

Change-Id: I79a1a72b807781d65a6afc9e0367e77b21eecf41
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(cpus): fix the rev-var of Cortex-X2

Update the revision and variant information in the
errata ABI file, cortex_X2.S file for erratum ID - 2058056
to match the revision and variant in the latest

fix(cpus): fix the rev-var of Cortex-X2

Update the revision and variant information in the
errata ABI file, cortex_X2.S file for erratum ID - 2058056
to match the revision and variant in the latest SDEN.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest

Change-Id: I28ee39949d977c53d6f5243100f0c29bc3c0428c
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(errata-abi): update the Cortex-A78C errata ABI struct

Updated the structure for Cortex-A78C in the errata ABI file
for missing entries from the cortex_a78c.S file.

Change-Id: I3d994337221de0326

fix(errata-abi): update the Cortex-A78C errata ABI struct

Updated the structure for Cortex-A78C in the errata ABI file
for missing entries from the cortex_a78c.S file.

Change-Id: I3d994337221de03264be235f1727de7494ed4312
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(cpus): update the rev-var for Cortex-A78AE

Update the revision and variant information in the
cortex_a78_ae.s and errata ABI file for erratum ID - 2376748
based on the latest SDEN.

SDEN documen

fix(cpus): update the rev-var for Cortex-A78AE

Update the revision and variant information in the
cortex_a78_ae.s and errata ABI file for erratum ID - 2376748
based on the latest SDEN.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1707912/latest

Change-Id: I082aac41adf717b0d5d59046a8933a3f5a3de94f
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(errata-abi): update the Cortex-A76 errata ABI struct

Updated the structure for Cortex-A76 in the errata ABI file
for the missing entries from the cortex_a76.S file.

Change-Id: Iceaf26fb2de493a8

fix(errata-abi): update the Cortex-A76 errata ABI struct

Updated the structure for Cortex-A76 in the errata ABI file
for the missing entries from the cortex_a76.S file.

Change-Id: Iceaf26fb2de493a877c4c100c0137f9255fc8b9f
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(cpus): fix the rev-var for Cortex-A710

Update the revision and variant information in the
errata ABI file, cortex_A710.S file for erratum ID - 2058056
and erratum ID - 2055002 to match the revis

fix(cpus): fix the rev-var for Cortex-A710

Update the revision and variant information in the
errata ABI file, cortex_A710.S file for erratum ID - 2058056
and erratum ID - 2055002 to match the revision and variant
in the latest SDEN.

SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775101/latest

Change-Id: Ie010dae90dabf8670f588a06f9a606cf41e22afa
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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Merge changes Ia66dd232,Ie0ddbe0b,Idd191614 into integration

* changes:
fix(rcar3-drivers): update DDR setting
fix(rcar3): fix CPG register code comment
fix(rcar3): update Draak and Eagle boar

Merge changes Ia66dd232,Ie0ddbe0b,Idd191614 into integration

* changes:
fix(rcar3-drivers): update DDR setting
fix(rcar3): fix CPG register code comment
fix(rcar3): update Draak and Eagle board IDs

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Merge changes from topic "gcc_linker_aarch32" into integration

* changes:
feat(st): support gcc as linker
fix(build): allow gcc linker on Aarch32 platforms

Merge "fix(cert-create): fix key loading logic" into integration

fix(build): convert tabs to spaces

Convert any used tabs in arch_features.mk to spaces to avoid makefile
build issues. Only recipes should be indented with tabs.

ENABLE_TRBE_FOR_NS should be enable

fix(build): convert tabs to spaces

Convert any used tabs in arch_features.mk to spaces to avoid makefile
build issues. Only recipes should be indented with tabs.

ENABLE_TRBE_FOR_NS should be enabled only for aarch64 but accidentally
its enabled for aarch32 as well in FVP makefile.

Change-Id: Iee913a04d6b60a4738183a17421754c2638e8e6d
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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fix(st): properly check LOADADDR

LOADADDR variable is retrieved from line starting with RAM in map file.
But if the build path contains RAM, this keywords will appear several
times and the grep will

fix(st): properly check LOADADDR

LOADADDR variable is retrieved from line starting with RAM in map file.
But if the build path contains RAM, this keywords will appear several
times and the grep will fail. Correct that by really checking the line
starting with RAM thanks to grep '^RAM'.

Change-Id: I2ce23edb5255028b1a56ba45c16569a42ae21ae2
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/328648

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Merge changes from topic "mp/test_espi" into integration

* changes:
feat(fvp): new SiP call to set an interrupt pending
refactor(arm): allow platform specific SiP support

Merge "fix(build): pass parameters through response files" into integration

Merge "docs(maintainers): remove Jorge Ramirez-Ortiz from rcar3 maintainers" into integration

feat(fvp): new SiP call to set an interrupt pending

This patch introduces an SiP SMC call for FVP platform to set an
interrupt pending. This is needed for testing purposes.

Change-Id: I3dc68ffbec36

feat(fvp): new SiP call to set an interrupt pending

This patch introduces an SiP SMC call for FVP platform to set an
interrupt pending. This is needed for testing purposes.

Change-Id: I3dc68ffbec36d90207c30571dc1fa7ebfb75046e
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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refactor(arm): allow platform specific SiP support

This patch introduces handler to add support for SiP calls to be
handled at EL3 for Arm platforms.

Consequently, the support for SPMD LSP is moved

refactor(arm): allow platform specific SiP support

This patch introduces handler to add support for SiP calls to be
handled at EL3 for Arm platforms.

Consequently, the support for SPMD LSP is moved to corresponding
Arm platform SiP source file. This will allow us to add support
for a new SiP call in subsequent patch.

Change-Id: Ie29cb57fc622f96be3b67bebf34ce37cc82947d8
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated

TF-A is no more in charge of configuring OP-TEE shared memory.
Set the STM32MP15_OPTEE_RSV_SHM flag as deprecated (as well as the code
depend

docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated

TF-A is no more in charge of configuring OP-TEE shared memory.
Set the STM32MP15_OPTEE_RSV_SHM flag as deprecated (as well as the code
depending on it).

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I863d9a1e45e0bfc2f45d9bd84b90d626738934ab

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feat(stm32mp15): disable OP-TEE shared memory

OP-TEE manages its own memory, and can open some areas through TZC400.
There is no need to configure this shared memory in TF-A.
Just assure that CFG_CO

feat(stm32mp15): disable OP-TEE shared memory

OP-TEE manages its own memory, and can open some areas through TZC400.
There is no need to configure this shared memory in TF-A.
Just assure that CFG_CORE_RESERVED_SHM=n for OP-TEE compilation.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib54acd60d9ec243d6ef9cc6b74937b4183d9ffa5

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fix(build): pass parameters through response files

CMD.exe limits prompts to 8191 characters [1], unfortunately our command
line lengths when building with make get really long and in certain
instan

fix(build): pass parameters through response files

CMD.exe limits prompts to 8191 characters [1], unfortunately our command
line lengths when building with make get really long and in certain
instances exceed this limit. Get around this by passing options to the
compiler and linker via the response file mechanism.

[1] https://learn.microsoft.com/en-us/troubleshoot/windows-client/shell-experience/command-line-string-limitation

Change-Id: I6fee83c5892542f887daf25227fcb595a36f26b9
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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