feat(fvp): capture timestamps in bl stages

When ENABLE_RUNTIME_INSTRUMENTATION flag is set timestamps are captured
and output to the fvp console at various boot stages using the PMF
library (which a

feat(fvp): capture timestamps in bl stages

When ENABLE_RUNTIME_INSTRUMENTATION flag is set timestamps are captured
and output to the fvp console at various boot stages using the PMF
library (which are based on aarch timers).

Timestamps are captured at entry and exit points for Bl1, Bl2
and, Bl3 respectively.

Change-Id: I7c0c502e5dbf73d711700b2fe0085ca3eb9346d2
Signed-off-by: Thaddeus Serna <Thaddeus.Gonzalez-Serna@arm.com>

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fix(cpus): workaround for Cortex-X3 erratum 2742421

Cortex-X3 erratum 2742421 is a Cat B erratum that applies to
all revisions <= r1p1 and is fixed in r1p2. The workaround is to
set CPUACTLR5_EL1[56

fix(cpus): workaround for Cortex-X3 erratum 2742421

Cortex-X3 erratum 2742421 is a Cat B erratum that applies to
all revisions <= r1p1 and is fixed in r1p2. The workaround is to
set CPUACTLR5_EL1[56:55] to 2'b01.

SDEN documentation:
https://developer.arm.com/documentation/2055130/latest

Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
Change-Id: Idadd323e419739fe909b9b68ea2dbe857846666b

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fix(docs): replace deprecated urls under tfa/docs

Fixed internal links refrenced inside tfa/docs.
Followed https://www.sphinx-doc.org/en/master/usage/restructuredtext/roles.html#ref-role
for instrus

fix(docs): replace deprecated urls under tfa/docs

Fixed internal links refrenced inside tfa/docs.
Followed https://www.sphinx-doc.org/en/master/usage/restructuredtext/roles.html#ref-role
for instrustion on how to link sections within other documents.

Signed-off-by: Thaddeus Serna <thaddeus.gonzalez-serna@arm.com>
Change-Id: I8e7c090d98951b1e3d393ab5b1d6bcdaa1865c6f

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feat(errata_abi): add support for Cortex-X3

Add errata ABI support for Cortex-X3 CPU.

Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
Change-Id: Ifb68178948860cafe25b351f20c480c847608a1b

Merge "fix(cpus): workaround for Neoverse N2 erratum 2009478" into integration

Merge "feat(qemu): add dummy plat_mboot_measure_key() BL1 function" into integration

fix(fvp): increase the maximum size of Event Log

To make room for all image measurements using the
RME+SPM+TBB+MEASURED_BOOT test configuration, the Event Log's maximum
size has been significantly i

fix(fvp): increase the maximum size of Event Log

To make room for all image measurements using the
RME+SPM+TBB+MEASURED_BOOT test configuration, the Event Log's maximum
size has been significantly increased.

Change-Id: I0b9948dab893e14677bca0afa07167648a6c2729
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(fvp): increase maximum MMAP and XLAT entries count

Maximum entries for MMAP and XLAT have been increased in order to
support the configuration SPM+RME, along with MEASURED_BOOT and
TRUSTED_BOARD

fix(fvp): increase maximum MMAP and XLAT entries count

Maximum entries for MMAP and XLAT have been increased in order to
support the configuration SPM+RME, along with MEASURED_BOOT and
TRUSTED_BOARD_BOOT.

Change-Id: Ic0a0aefecb49d7ccc71357c4bd94e7bd2e5f57c4
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(arm): add Event Log area behind Trustzone Controller

To allow the SPD to access the Event Log on RME systems with
TrustZone Controller, the Event Log region needs to be configured
into the TZC.

fix(arm): add Event Log area behind Trustzone Controller

To allow the SPD to access the Event Log on RME systems with
TrustZone Controller, the Event Log region needs to be configured
into the TZC. This change will enable read-write access of this
region from the secure world, which is currently denied.

Change-Id: I0c32977386f3d7c22f310b2b9404d48e8e6cac29
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(tbbr): unrecognised 'tos-fw-key-cert' option

CCA CoT uses 'core-swd-cert' for signing all secure software, so when
using cert_create tool to generate its certificate, it throws an
error: "tools

fix(tbbr): unrecognised 'tos-fw-key-cert' option

CCA CoT uses 'core-swd-cert' for signing all secure software, so when
using cert_create tool to generate its certificate, it throws an
error: "tools/cert_create/cert_create: unrecognized option
'--tos-fw-key-cert'".
The issue has not been seen so far since "SPM+RME+TBB+Measured-Boot"
combination is not tested in CI/local-setup. It is now resolved by
guarding usage of '--tos-fw-key-cert' for non-CCA CoTs.

Change-Id: I5e61d851a71c251920171cf410cbd0129e0e0aad
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "xlnx_zynqmp_console" into integration

* changes:
fix(bl31): resolve runtime console garbage in next stage
fix(cadence): update console flush uart driver

feat(qemu): add dummy plat_mboot_measure_key() BL1 function

Adds a dummy implementation of the plat_mboot_measure_key() function in
BL1 for QEMU platform.

Signed-off-by: Jens Wiklander <jens.wiklan

feat(qemu): add dummy plat_mboot_measure_key() BL1 function

Adds a dummy implementation of the plat_mboot_measure_key() function in
BL1 for QEMU platform.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Change-Id: I5923aad962a5e34d657cf49c177e68ed2ea93291

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Merge "fix(xilinx): don't reserve 1 more byte" into integration

Merge changes I3bfdb007,I9a383e6d into integration

* changes:
build(poetry): bump requests from 2.30.0 to 2.31.0
build(npm): bump word-wrap from 1.2.3 to 1.2.4

build(poetry): bump requests from 2.30.0 to 2.31.0

Bumps [requests](https://github.com/psf/requests) from 2.30.0 to 2.31.0.
- [Release notes](https://github.com/psf/requests/releases)
- [Changelog](

build(poetry): bump requests from 2.30.0 to 2.31.0

Bumps [requests](https://github.com/psf/requests) from 2.30.0 to 2.31.0.
- [Release notes](https://github.com/psf/requests/releases)
- [Changelog](https://github.com/psf/requests/blob/main/HISTORY.md)
- [Commits](https://github.com/psf/requests/compare/v2.30.0...v2.31.0)

---
updated-dependencies:
- dependency-name: requests
dependency-type: indirect
...

Change-Id: I3bfdb007e375c708f48ce4b62d87a12a02b57ee7
Signed-off-by: dependabot[bot] <support@github.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>

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build(npm): bump word-wrap from 1.2.3 to 1.2.4

Bumps [word-wrap](https://github.com/jonschlinkert/word-wrap) from 1.2.3 to 1.2.4.
- [Release notes](https://github.com/jonschlinkert/word-wrap/release

build(npm): bump word-wrap from 1.2.3 to 1.2.4

Bumps [word-wrap](https://github.com/jonschlinkert/word-wrap) from 1.2.3 to 1.2.4.
- [Release notes](https://github.com/jonschlinkert/word-wrap/releases)
- [Commits](https://github.com/jonschlinkert/word-wrap/compare/1.2.3...1.2.4)

---
updated-dependencies:
- dependency-name: word-wrap
dependency-type: indirect
...

Change-Id: I9a383e6d6ae907858028980eadccfa2070f42d15
Signed-off-by: dependabot[bot] <support@github.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>

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fix(bl31): resolve runtime console garbage in next stage

When BL31 software is sending data through a communication channel,
there's a chance that the final portion of the data could become
disrupte

fix(bl31): resolve runtime console garbage in next stage

When BL31 software is sending data through a communication channel,
there's a chance that the final portion of the data could become
disrupted, if another software (BL32/RMM) starts setting up the
channel at the same time. To solve this issue, make sure to flush the
console data from BL31, before initializing BL32/RMM. This makes sure
that the communication stays reliable.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Icb8003e068b0b93bc4672e05f69001d9694a175c

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fix(cadence): update console flush uart driver

The implementation of code changes manages the transmit FIFO (TxFIFO)
in the UART driver. The added code snippet includes a sequence of
instructions th

fix(cadence): update console flush uart driver

The implementation of code changes manages the transmit FIFO (TxFIFO)
in the UART driver. The added code snippet includes a sequence of
instructions that ensures efficient handling of data transmission
and synchronization with the host software.

The code first checks the TxFIFO empty flag to determine whether
there is data available for transmission. If the TxFIFO is not empty,
the code waits until it becomes empty, ensuring that the transmit
operation is synchronized with the availability of data.
Subsequently, the code monitors the transmit operation's activity
status. It waits until the transmit operation becomes inactive,
indicating the completion of the previous transmission.

This synchronization step ensures that new data can be added to the
TxFIFO without causing any loss of transmission time.

Update console_flush() function, the function waits for the
Transmitter FIFO to empty and checks the transmitter's active state.
If the transmitter is in an active state, it means it is currently
shifting out a character.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I9d6c05bdfb9270924b40bf1f6ecb5fe541a2242e

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Merge "feat(morello): add cpuidle support" into integration

Merge "fix(scmi): add parameter for plat_scmi_clock_rates_array" into integration

Merge "feat(imx8m): move the gpc reg & macro to a separate header file" into integration

Merge "feat(imx8m): add more dram pll setting" into integration

Merge changes from topic "sb/split-boot-runtime-threats" into integration

* changes:
docs(threat-model): classify threats by mitigating entity
docs(threat-model): club RME note with other assump

Merge changes from topic "sb/split-boot-runtime-threats" into integration

* changes:
docs(threat-model): classify threats by mitigating entity
docs(threat-model): club RME note with other assumptions

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fix(xilinx): don't reserve 1 more byte

The commit f123b91fddfc ("fix(versal): fix BLXX memory
limits for user defined values") and commit a80da3899a5e
("fix(versal-net): fix BLXX memory limits for u

fix(xilinx): don't reserve 1 more byte

The commit f123b91fddfc ("fix(versal): fix BLXX memory
limits for user defined values") and commit a80da3899a5e
("fix(versal-net): fix BLXX memory limits for user defined
values") fixed issue regarding linker alignment section.
But removing -1 logic is not reflected in plat_fdt() memory
reservation code.
That's why remove +1 from prepare_dtb() not to generate a reserved
memory node with bigger size which ends up with reserving more
space than actually requested by a full featured bootloader or OS.

Change-Id: I0a646cee7d5a55157a6eb1b672c2edbe89e6a57f
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge "fix(arm/fpga): enable CPU features required for ARMv9.2 cores" into integration