| efbcdf71 | 03-Oct-2023 |
Soby Mathew <soby.mathew@arm.com> |
Merge "feat(rmmd): pass SMCCCv1.3 SVE hint bit to RMM" into integration |
| 67889630 | 24-Aug-2023 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
feat(rmmd): pass SMCCCv1.3 SVE hint bit to RMM
SMCCCv1.3 introduces SVE hint bit that denotes the absence of SVE
specific live state. Update the SMC function ID with SVE hint bit if it
is set the fl
feat(rmmd): pass SMCCCv1.3 SVE hint bit to RMM
SMCCCv1.3 introduces SVE hint bit that denotes the absence of SVE
specific live state. Update the SMC function ID with SVE hint bit if it
is set the flags and pass it to RMM.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ibb1d73440ed1e2283a103cfd2c4592be5d3a74cb
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| 920aa8d4 | 03-Oct-2023 |
Soby Mathew <soby.mathew@arm.com> |
Merge "feat(rmmd): enable SME for RMM" into integration |
| be3e0b89 | 03-Oct-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xilinx-console-sync" into integration
* changes:
fix(xilinx): remove console error message
feat(xilinx): sync macro names
feat(xilinx): remove crash console unused ma
Merge changes from topic "xilinx-console-sync" into integration
* changes:
fix(xilinx): remove console error message
feat(xilinx): sync macro names
feat(xilinx): remove crash console unused macros
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|
| b254b981 | 24-Aug-2023 |
Karl Li <karl.li@mediatek.corp-partner.google.com> |
feat(mt8188): add DSB before udelay
To ensure that all explicit memory accesses are complete before udelay,
insert dsb before udelay.
Change-Id: If119e920e29539ae8b68d3c44c8f77b5bf424a1a
Signed-off
feat(mt8188): add DSB before udelay
To ensure that all explicit memory accesses are complete before udelay,
insert dsb before udelay.
Change-Id: If119e920e29539ae8b68d3c44c8f77b5bf424a1a
Signed-off-by: Karl Li <karl.li@mediatek.com>
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| f92eb7e2 | 18-May-2023 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
feat(rmmd): enable SME for RMM
This patch enables Scalable Matrix Extension (SME) for RMM. RMM will
save/restore required registers that are shared with SVE/FPU register
state so that Realm can use
feat(rmmd): enable SME for RMM
This patch enables Scalable Matrix Extension (SME) for RMM. RMM will
save/restore required registers that are shared with SVE/FPU register
state so that Realm can use FPU or SVE.
The Relevant RMM support can be found here :
https://github.com/TF-RMM/tf-rmm/commit/0ccd7ae58b00
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I3bbdb840e7736dec00b71c85fcec3d5719413ffd
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|
| a1377a89 | 02-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "rm/handoff" into integration
* changes:
feat(qemu): implement firmware handoff on qemu
feat(handoff): introduce firmware handoff library |
| 7ed514e6 | 02-Oct-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_dcc_console" into integration
* changes:
chore(dcc): remove unnecessary code in dcc
fix(dcc): add dcc console unregister function |
| b990719b | 29-Sep-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(docs): add missing line in the fiptool command for stm32mp1" into integration |
| d3fcc3f0 | 29-Sep-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "docs: update TF-A v2.10 release information" into integration |
| f9820f21 | 27-Sep-2023 |
Michal Simek <michal.simek@amd.com> |
fix(xilinx): remove console error message
If console is not found there is no way where to print information about
it. Currently only cdns/dcc/pl011 uarts are supported that's why remove
the message
fix(xilinx): remove console error message
If console is not found there is no way where to print information about
it. Currently only cdns/dcc/pl011 uarts are supported that's why remove
the message which none can see anyway.
But keep "else" part with comment to avoid misra c rule 15.7 violation
which is also missing in Versal NET implementation.
Change-Id: I78e3baffd2288d2a4673099bf193f22029912840
Signed-off-by: Michal Simek <michal.simek@amd.com>
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|
| d526d00a | 29-Sep-2023 |
Lionel Debieve <lionel.debieve@foss.st.com> |
fix(docs): add missing line in the fiptool command for stm32mp1
Add the missing trusted key certificate in the fiptool
command line.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Chang
fix(docs): add missing line in the fiptool command for stm32mp1
Add the missing trusted key certificate in the fiptool
command line.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ife95b0261f04b7fd07a9b01488f9e5be9b87e841
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|
| 2226b453 | 28-Sep-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
docs: update TF-A v2.10 release information
Update version and release schedule for the upcoming TF-A
release v2.10.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I505fbb034a74c
docs: update TF-A v2.10 release information
Update version and release schedule for the upcoming TF-A
release v2.10.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I505fbb034a74ce1cc6bc20efdd26803e6fb8c0c1
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|
| f80323da | 29-Sep-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "refactor(ast2700): adopt RESET_TO_BL31 boot flow" into integration |
| 494babe0 | 28-Sep-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mp/fix_interrupt_type" into integration
* changes:
refactor(el3-runtime): plat_ic_has_interrupt_type returns bool
fix(el3-runtime): leverage generic interrupt controlle
Merge changes from topic "mp/fix_interrupt_type" into integration
* changes:
refactor(el3-runtime): plat_ic_has_interrupt_type returns bool
fix(el3-runtime): leverage generic interrupt controller helpers
fix(gicv3): map generic interrupt type to GICv3 group
chore(gicv2): use interrupt group instead of type
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|
| c9c8a799 | 19-Sep-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
chore(dcc): remove unnecessary code in dcc
Remove the dcc_console_init() function. The initialization function
is not being used and serves no purpose.
Signed-off-by: Prasad Kummari <prasad.kummari
chore(dcc): remove unnecessary code in dcc
Remove the dcc_console_init() function. The initialization function
is not being used and serves no purpose.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I056d09e153998d686d3b95ad39c563f797184c18
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|
| 564e073c | 27-Sep-2023 |
Chia-Wei Wang <chiawei_wang@aspeedtech.com> |
refactor(ast2700): adopt RESET_TO_BL31 boot flow
Revise the AST2700 boot flow to the RESET_TO_BL31 scheme.
The execution of BL1/2 can be saved from ARM CA35 while most
low level platform initializat
refactor(ast2700): adopt RESET_TO_BL31 boot flow
Revise the AST2700 boot flow to the RESET_TO_BL31 scheme.
The execution of BL1/2 can be saved from ARM CA35 while most
low level platform initialization are moved to a preceding MCU.
This patch updates the build configuration and also adds
the SMP mailbox setup code to hold secondary cores until
they are being waken up.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Change-Id: I7e0aa6416b92b97036153db1d9a26baaa41b7b18
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|
| 322af234 | 28-Jun-2023 |
Raymond Mao <raymond.mao@linaro.org> |
feat(qemu): implement firmware handoff on qemu
Implement firmware handoff from BL2 to BL33 on qemu platform
compliant to Firmware handoff specification v0.9.
Change-Id: Id8d5206a71ef6ec97cf3c97995d
feat(qemu): implement firmware handoff on qemu
Implement firmware handoff from BL2 to BL33 on qemu platform
compliant to Firmware handoff specification v0.9.
Change-Id: Id8d5206a71ef6ec97cf3c97995de328ebf0600cc
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
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|
| 77ce6a56 | 17-Jan-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st): enable RTC clock before accessing nv counter
The plat_get_nv_ctr() retrieves the non-volatile counter value from
TAMP_COUNTR register in RTCTAMP peripheral. The clock needs to be
enabled be
fix(st): enable RTC clock before accessing nv counter
The plat_get_nv_ctr() retrieves the non-volatile counter value from
TAMP_COUNTR register in RTCTAMP peripheral. The clock needs to be
enabled before accessing it.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2e9fc2c7ac516d6f8624cc6c9d442ee85629bf9a
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| 379d77b3 | 10-Jan-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st-crypto): use GENMASK_32 to define PKA registers masks
When compiling the driver in aarch64, and with LOG_LEVEL_VERBOSE, there
is a compilation error on the message displaying the version of t
fix(st-crypto): use GENMASK_32 to define PKA registers masks
When compiling the driver in aarch64, and with LOG_LEVEL_VERBOSE, there
is a compilation error on the message displaying the version of the
peripheral. The masks are making the variable unsigned long, whereas
we want to display an unsigned int. As the registers are 32-bit,
we should use GENMASK_32 instead of GENMASK.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I002dd5ad901f68a9480f758eaaa4428f969813c1
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| 5c506c73 | 06-Feb-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st): update comment on encryption key
On STM32MP2, the encryption key is 32 bytes, the key duplication
(done for 16 bytes OTP) is not done. Update the comment to precise that.
Change-Id: I6fc4d
fix(st): update comment on encryption key
On STM32MP2, the encryption key is 32 bytes, the key duplication
(done for 16 bytes OTP) is not done. Update the comment to precise that.
Change-Id: I6fc4d652fdd462808918e85f6e5bd0d68d10d436
Yann Gautier <yann.gautier@foss.st.com>
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| 0936abe9 | 19-Sep-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
fix(dcc): add dcc console unregister function
Add unregistration function for the JTAG DCC (Debug Communication
Channel) console.
The unregistration function flushes DCC buffer before unregistering
fix(dcc): add dcc console unregister function
Add unregistration function for the JTAG DCC (Debug Communication
Channel) console.
The unregistration function flushes DCC buffer before unregistering
the dcc console to make sure that no output char is pending.
Since console_flush() flushes chars for all registered consoles on
the platform, which is not required in this case, dcc_console_flush()
is being called instead.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I6f15a07c6ee947dc0e7aa8fb069227618080e611
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|
| ee7d7f66 | 27-Sep-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(spmd): coverity scan issues" into integration |
| 76e4fab0 | 05-Jan-2023 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st): allow crypto lib compilation in aarch64
Cast len with size_t, as it is unsigned long on Aarch64, and no more
unsigned int. Changing functions prototypes will not help as
.verify_signature a
fix(st): allow crypto lib compilation in aarch64
Cast len with size_t, as it is unsigned long on Aarch64, and no more
unsigned int. Changing functions prototypes will not help as
.verify_signature awaits an unsigned int for its last parameter.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I9332fd46301a9653af917802788fd97fe7c8a162
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|
| 6fef0f67 | 14-Apr-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st-uart): allow 64 bit compilation
Change a %x in %zx to print a size_t variable.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I27ac3739f4a2ec3b33c34d2257fa858cbd1aae6a |