Merge changes I93de2db1,I880f88b1,I02e2fc75,I48908413,Ie7de9a9f, ... into integration

* changes:
feat(st-ddr): add STM32MP2 driver
refactor(st-ddr): create generic services
refactor(st-ddr): r

Merge changes I93de2db1,I880f88b1,I02e2fc75,I48908413,Ie7de9a9f, ... into integration

* changes:
feat(st-ddr): add STM32MP2 driver
refactor(st-ddr): create generic services
refactor(st-ddr): remove name from stm32mp_ddr_reg_desc
refactor(st-ddr): add definition for timeouts and delays
feat(st): add stm32mp_is_wakeup_from_standby()
feat(stm32mp2): add RETRAM map/unmap capability
feat(stm32mp2): add helper to get DDRDBG base address
feat(stm32mp2): handle DDR power supplies
feat(stm32mp1): handle DDR power supplies

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fix(intel): update Agilex5 BL2 init flow and other misc changes

BL2: Update BL2 init flow, Timer base address, avoid cache
flush of BL2 image descriptors
BL31: Remove re-init of CCU and other misc u

fix(intel): update Agilex5 BL2 init flow and other misc changes

BL2: Update BL2 init flow, Timer base address, avoid cache
flush of BL2 image descriptors
BL31: Remove re-init of CCU and other misc updates

Change-Id: I5f04901cc455c306209c83aad2377bbf7d8a1789
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>

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Merge changes from topic "nxp-clk/add_ddr_clk" into integration

* changes:
fix(nxp-clk): function parameter should not be modified
feat(nxp-clk): enable the DDR clock
feat(nxp-clk): add object

Merge changes from topic "nxp-clk/add_ddr_clk" into integration

* changes:
fix(nxp-clk): function parameter should not be modified
feat(nxp-clk): enable the DDR clock
feat(nxp-clk): add objects needed for DDR clock
feat(nxp-clk): setup the DDR PLL
feat(nxp-clk): add MC_ME utilities
feat(nxp-clk): add partition reset utilities
feat(nxp-clk): add partitions objects

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feat(st-ddr): add STM32MP2 driver

Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY
and its firmware, as well as the DDR controller.

Signed-off-by: Nicolas Le Bayon <nicolas.le.

feat(st-ddr): add STM32MP2 driver

Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY
and its firmware, as well as the DDR controller.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I93de2db1b9378d5654e76b3bf6f3407d80bc4ca5

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docs: deprecate Arm TC2 FVP platform

Arm has made the strategic decision to deprecate the TC2 platform. As
a result, software development and the creation of fast models for TC2
have been officially

docs: deprecate Arm TC2 FVP platform

Arm has made the strategic decision to deprecate the TC2 platform. As
a result, software development and the creation of fast models for TC2
have been officially discontinued. The TC2 platform, now considered
obsolete, has been succeeded by the TC3 and TC4 platforms. Notably,
both TC3 and TC4 are already integrated into TF-A, with TC3 included
in the CI repository. Work to add CI support for TC4 is currently in
progress.

Change-Id: I4df3c3e947faa1849a0f4742593c604cb2ee43b9
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(s32g274a): add ncore support

Ncore is a cache-coherent interconnect module. It enables the
integration of heterogenous coherent agents and non-coherent
agents in a chip. TF-A boots with the fir

feat(s32g274a): add ncore support

Ncore is a cache-coherent interconnect module. It enables the
integration of heterogenous coherent agents and non-coherent
agents in a chip. TF-A boots with the first core in isolation
to avoid crashes due to cache invalidation operations. Later,
it will disable the isolation and reconfigure the module every
time a new core is added or removed through PSCI.

Change-Id: Ida42db91b10be1e66c3b9b73674d1e37a61844dd
Signed-off-by: Dan Nica <dan.nica@nxp.com>
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>

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fix(versal_net): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.
The condition is compa

fix(versal_net): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.
The condition is compared with NULL to get boolean result.

Change-Id: Iff25e69c646337867caad0d992d814c3cd4260cf
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(versal): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.
The condition is compared

fix(versal): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.
The condition is compared with NULL to get boolean result.

Change-Id: I7c01825c5588207085d327b5b0c7ca2c896da2dc
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(zynqmp): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.
The condition is compared

fix(zynqmp): evaluate condition for boolean

This corrects the MISRA violation C2012-11.9:
The macro NULL shall be the only permitted form of integer
null pointer constant.
The condition is compared with NULL to get boolean result.

Change-Id: I6350e2c03fdb3175deb232f28f0dfce009563eb1
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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fix(xilinx): rename variable to avoid conflict

This corrects the MISRA violation C2012-5.3:
An identifier declared in an inner scope shall not hide an
identifier declared in an outer scope.
Renamed

fix(xilinx): rename variable to avoid conflict

This corrects the MISRA violation C2012-5.3:
An identifier declared in an inner scope shall not hide an
identifier declared in an outer scope.
Renamed variable to prevent the conflict with static inline
function with same identifier name declared in the outer scope.

Change-Id: Ic07a4d25ed43fdb7fcf9fba462787d6951079b5c
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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feat(intel): update Agilex5 DDR and IOSSM driver

DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.

Change-Id: I3e4205171d9356190b60498cae322318520bb1c2

feat(intel): update Agilex5 DDR and IOSSM driver

DDR and IOSSM driver code for Agilex5 platform,
initialize the DDR/IOSSM in BL2 EL3 early flow.

Change-Id: I3e4205171d9356190b60498cae322318520bb1c2
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>

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Merge "fix(cpus): modify the fix for Cortex-A75 erratum 764081" into integration

Merge "fix(cpus): workaround for Cortex-X4 erratum 3076789" into integration

Merge changes from topic "xlnx_fix_unused_param" into integration

* changes:
fix(versal2): declare unused parameters as void
fix(versal-net): declare unused parameters as void
fix(versal): dec

Merge changes from topic "xlnx_fix_unused_param" into integration

* changes:
fix(versal2): declare unused parameters as void
fix(versal-net): declare unused parameters as void
fix(versal): declare unused parameters as void
fix(xilinx): declare unused parameters as void
fix(zynqmp): declare unused parameters as void

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chore(tc): increase stack size with 0x100 bytes

CBOR encoding in the platform test requires
a slightly bigger stack, so increase it with 0x100 bytes.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Ch

chore(tc): increase stack size with 0x100 bytes

CBOR encoding in the platform test requires
a slightly bigger stack, so increase it with 0x100 bytes.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I1b151aa29b3ccfcefa733d189d7aab88653cef1f

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chore(tc): link QCBOR library to the platform test

The delegated attestation service was updated to be
aligned with RMM spec 1.0-rel0-rc2 version. The test
suite uses the QCBOR library to encode the

chore(tc): link QCBOR library to the platform test

The delegated attestation service was updated to be
aligned with RMM spec 1.0-rel0-rc2 version. The test
suite uses the QCBOR library to encode the public key
to be a CBOR serialized COSE_Key object.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ib9e1d80f7b4bca8783ae1f7cf4567725c2aa8538

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Merge "docs(build): update GCC to 13.3.Rel1 version" into integration

Merge "fix(build): pass the PLAT option during FIP tool compilation" into integration

feat(tc): remove static memory used for fwu

With the updated firmware update implementation in the Trusted Services,
it is no longer needed to carve out static memory. Memory will be
allocated dynam

feat(tc): remove static memory used for fwu

With the updated firmware update implementation in the Trusted Services,
it is no longer needed to carve out static memory. Memory will be
allocated dynamically in U-Boot and shared with the firmware update
secure partition of Trusted Services.

Change-Id: I0fb128a458773236ee10526edfa1116b229e4d6e
Signed-off-by: Davidson K <davidson.kumaresan@arm.com>
Signed-off-by: Jackson Cooper-Driver <jackson.cooper-driver@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>

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fix(tc): correct NS timer frame ID for TC

The non-secure (NS) timer in TC is AP_GTCLK_NS_CNTBase1. This commit
corrects the NS frame ID from its original value of 0 to U(1),
ensuring that the correc

fix(tc): correct NS timer frame ID for TC

The non-secure (NS) timer in TC is AP_GTCLK_NS_CNTBase1. This commit
corrects the NS frame ID from its original value of 0 to U(1),
ensuring that the correct CNTACR register bits are written.
This change enables access to the counter registers.

Change-Id: I287ab9c373a60741f78d44a67f546326916473ea
Signed-off-by: Sandeep Chiluvuru <sandeep.chiluvuru@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>

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fix(build): pass the PLAT option during FIP tool compilation

Due to change [1], the FIP tool was compiled with the default platform
instead of the one specified via the command line, as make_helpers

fix(build): pass the PLAT option during FIP tool compilation

Due to change [1], the FIP tool was compiled with the default platform
instead of the one specified via the command line, as make_helpers.mk
set the PLAT option to default. This happened because the root Makefile
invoked FIP tool compilation without the PLAT option. The issue has
been fixed by explicitly providing the PLAT option for FIP tool
compilation.

[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/26597

Change-Id: Icc516f8d44706df03c7e6ee123b58afeda72cea7
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(cpus): modify the fix for Cortex-A75 erratum 764081

Apply the mitigation only for the revision and variant
mentioned in the SDEN.

SDEN Documentation:
https://developer.arm.com/documentation/SDE

fix(cpus): modify the fix for Cortex-A75 erratum 764081

Apply the mitigation only for the revision and variant
mentioned in the SDEN.

SDEN Documentation:
https://developer.arm.com/documentation/SDEN859515/latest

Change-Id: Ifda1f4cb32bdec9a9af29397ddc03bf22a7a87fc
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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refactor(xilinx): create generic function for DT console

The code in dt_console_init() has been refactored into multiple
functions to establish a more generic approach for retrieving UART
informatio

refactor(xilinx): create generic function for DT console

The code in dt_console_init() has been refactored into multiple
functions to establish a more generic approach for retrieving UART
information from DT. These modifications enhance code readability
and maintainability, contributing to a clearer and more sustainable
codebase for future development.

Change-Id: I877b7ae484bbf2f5919f3c79e5ae650bb93e3037
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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refactor(xilinx): rename setup_runtime_console to generic

The setup_runtime_console() function is renamed to register_console()
for the purpose of reusing it in the registration of the console.

Cha

refactor(xilinx): rename setup_runtime_console to generic

The setup_runtime_console() function is renamed to register_console()
for the purpose of reusing it in the registration of the console.

Change-Id: I6b340423169aa6794d07502dadab65c3f0209339
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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chore(xilinx): rename console variables

Updates variable names to follow a more consistent
and descriptive naming.

These changes improve code readability and maintainability, making
the codebase mo

chore(xilinx): rename console variables

Updates variable names to follow a more consistent
and descriptive naming.

These changes improve code readability and maintainability, making
the codebase more understandable and maintainable for future
development.

Change-Id: I3fff8fe371f9d4d3489ffe62cbf721381403fef5
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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