fix(xlat_tables_v2): zeromem to clear all tables

This patch replaces the for loops to sero individual tables or entries
in the translation table context with zeromem to improve the boot time.

On Te

fix(xlat_tables_v2): zeromem to clear all tables

This patch replaces the for loops to sero individual tables or entries
in the translation table context with zeromem to improve the boot time.

On Tegra platforms, this patch has proved to save 10ms during boot.

Signed-off-by: Bhavesh Parekh <bparekh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Iea9fb2c18ae7a1aef4fe42c4151a321fb3f8660e

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Merge changes from topic "mb/drtm" into integration

* changes:
feat(drtm): retrieve DLME image authentication features
feat(drtm): log No-Action Event in Event Log for DRTM measurements
feat(f

Merge changes from topic "mb/drtm" into integration

* changes:
feat(drtm): retrieve DLME image authentication features
feat(drtm): log No-Action Event in Event Log for DRTM measurements
feat(fvp): add stub function to retrieve DLME image auth features
feat(drtm): introduce plat API for DLME authentication features
feat(drtm): ensure event types aligns with DRTM specification v1.1
fix(drtm): add missing DLME data regions for min size requirement
feat(fvp): add stub platform function to get ACPI table region size
feat(drtm): add platform API to retrieve ACPI tables region size

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Merge changes from topic "gr/build_fix_spmd" into integration

* changes:
fix(rdv3): handle invalid build combination
fix(build): handle invalid spd build options

refactor(memmap): migrate to Poetry

This change refactors the memmap tool into a Poetry project, with its
own dependencies. You can continue to run it manually with:

poetry run memory <args>

C

refactor(memmap): migrate to Poetry

This change refactors the memmap tool into a Poetry project, with its
own dependencies. You can continue to run it manually with:

poetry run memory <args>

Change-Id: I346283df1b8bfad4babc1f5a3861dab94d4a006a
Signed-off-by: Chris Kay <chris.kay@arm.com>

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Merge changes I5aabe415,Ief6fb4fc into integration

* changes:
feat(stm32mp15-fdts): add SP_MIN versions of DT files
feat(st): use dedicated version of DT for SP_MIN

fix(rdv3): handle invalid build combination

`CTX_INCLUDE_SVE_REGS` should not be enabled when building with
SPD=spmd and SPMD_SPM_AT_SEL2=1 both been used.

Unfortunately a check at top level makefi

fix(rdv3): handle invalid build combination

`CTX_INCLUDE_SVE_REGS` should not be enabled when building with
SPD=spmd and SPMD_SPM_AT_SEL2=1 both been used.

Unfortunately a check at top level makefile ignored this, now its been
fixed at top level makefile. Ensure correct combination are handled,
otherwise it will lead to build failures.

Change-Id: Ib84fc0096c92d9b3d56366c0e1d77b6d83098221
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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fix(build): handle invalid spd build options

Currently the top level Makefile checks any invalid SPD build flags
before parsing platform makefile thus any invalid combination enabled
in platform mak

fix(build): handle invalid spd build options

Currently the top level Makefile checks any invalid SPD build flags
before parsing platform makefile thus any invalid combination enabled
in platform makefile will go unnoticed.

Move handling of all invalid SPD build option checks after platform level makefile is parsed.

Change-Id: Ib3b384ca99403ebaf34f6ce662c93480827e2136
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge changes Ie8c83c92,I9cca19fd into integration

* changes:
feat(stm32mp2): disable PIE by default on STM32MP2 platform
refactor(stm32mp2): remove useless STM32MP_SEC_SYSRAM_SIZE

chore(dependabot): reduce Dependabot PIP scope to non-major updates

Change-Id: I3213ad5ea76559e4774bb995fbe5ca4208b04792
Signed-off-by: Chris Kay <chris.kay@arm.com>

Merge "feat(romlib): add PSA Crypto ROMLIB support" into integration

feat(stm32mp2): disable PIE by default on STM32MP2 platform

Allow to disable ENABLE_PIE on STM32MP2. BL31 is loaded at the beginning
of SYSRAM whatever the options set. Set ENABLE_PIE to 0 by defaul

feat(stm32mp2): disable PIE by default on STM32MP2 platform

Allow to disable ENABLE_PIE on STM32MP2. BL31 is loaded at the beginning
of SYSRAM whatever the options set. Set ENABLE_PIE to 0 by default.
This should allow us to reduce BL31 and BL2 size.

Change-Id: Ie8c83c9205e81301eb1fdcf24b94216172586630
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>

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feat(mt8196): fix MT8196 gpio driver

- Add GPIO_BASE in mtgpio.c
- Modify gpio register address

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I648473fa373d208fa29c7069637974e097b75b

feat(mt8196): fix MT8196 gpio driver

- Add GPIO_BASE in mtgpio.c
- Modify gpio register address

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I648473fa373d208fa29c7069637974e097b75b26

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feat(romlib): add PSA Crypto ROMLIB support

Adding PSA Crypto MBedTLS specific jump table to allow use of ROMLIB, to
be included when PSA_CRYPTO=1 and enabled.

Signed-off-by: Lauren Wehrmeister <la

feat(romlib): add PSA Crypto ROMLIB support

Adding PSA Crypto MBedTLS specific jump table to allow use of ROMLIB, to
be included when PSA_CRYPTO=1 and enabled.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Iff7f0e3c5cba6b89f1732f6c80d3060498e3675d

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Merge "fix(st-pmic): remove deadcode from STPMIC2 driver" into integration

Merge "chore: rename arcadia to Cortex-A320" into integration

refactor(stm32mp2): remove useless STM32MP_SEC_SYSRAM_SIZE

The macro STM32MP_SEC_SYSRAM_SIZE only redefine STM32MP_SYSRAM_SIZE.
Directly use the latter one and remove the STM32MP_SEC_SYSRAM_SIZE.

S

refactor(stm32mp2): remove useless STM32MP_SEC_SYSRAM_SIZE

The macro STM32MP_SEC_SYSRAM_SIZE only redefine STM32MP_SYSRAM_SIZE.
Directly use the latter one and remove the STM32MP_SEC_SYSRAM_SIZE.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I9cca19fda7294be3f31ec74293ce122037541d12

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feat(stm32mp15-fdts): add SP_MIN versions of DT files

For ST STM32MP15 boards, where the default BL32 is OP-TEE, we add new
versions of DT files with -sp_min.dts extension to manage this
configurati

feat(stm32mp15-fdts): add SP_MIN versions of DT files

For ST STM32MP15 boards, where the default BL32 is OP-TEE, we add new
versions of DT files with -sp_min.dts extension to manage this
configuration. These files can be compiled directly, or, with the
previous patch, the same command line can be used and those sp_min
files will be automatically used, if AARCH32_SP=sp_min option is used.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I5aabe415b0302da48f02918a3dbd24f334eb8e7d

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feat(st): use dedicated version of DT for SP_MIN

If an STM32MP15 board is compiled for SP_MIN, and a specific DT file
ending with "-sp_min.dts" exist, then this file will be used to generate
BL2 and

feat(st): use dedicated version of DT for SP_MIN

If an STM32MP15 board is compiled for SP_MIN, and a specific DT file
ending with "-sp_min.dts" exist, then this file will be used to generate
BL2 and BL32 DT.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ief6fb4fcf302d07f958a0e2764b149759127f21f

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fix(st-pmic): remove deadcode from STPMIC2 driver

"regul" corresponds to a specific part of a global table that can't be
undefined. Thus, checking if it is NULL is useless.

Issue found by Coverity

fix(st-pmic): remove deadcode from STPMIC2 driver

"regul" corresponds to a specific part of a global table that can't be
undefined. Thus, checking if it is NULL is useless.

Issue found by Coverity (CID 445089).

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Ic812bc1fde12fe8389677c7c72fb85246c50f5c9

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chore: rename arcadia to Cortex-A320

Cortex-A320 has been announced, rename arcadia to Cortex-A320.

Ref:
https://newsroom.arm.com/blog/introducing-arm-cortex-a320-cpu
https://www.arm.com/products/s

chore: rename arcadia to Cortex-A320

Cortex-A320 has been announced, rename arcadia to Cortex-A320.

Ref:
https://newsroom.arm.com/blog/introducing-arm-cortex-a320-cpu
https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a320

Change-Id: Ifb3743d43dca3d8caaf1e7416715ccca4fdf195f
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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feat(drtm): retrieve DLME image authentication features

Retrieve DLME image authentication features and report them
back to the DCE preamble. Currently, this value is always set
to 0, as no platform

feat(drtm): retrieve DLME image authentication features

Retrieve DLME image authentication features and report them
back to the DCE preamble. Currently, this value is always set
to 0, as no platform supports DLME authentication.

Additionally, the default schema is always used instead of
the DLME PCR schema since DLME authentication is not currently
supported.

This change primarily upgrades the DRTM parameters version to V2,
aligning with DRTM spec v1.1 [1].

[1]: https://developer.arm.com/documentation/den0113/c/?lang=en

Change-Id: Ie2ceb0d2ff49465643597e8725710a93d89e74a2
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(drtm): log No-Action Event in Event Log for DRTM measurements

This patch updates `drtm_measurements.c` to ensure that a No-Action
event is recorded in the Event Log as part of the DRTM measurem

feat(drtm): log No-Action Event in Event Log for DRTM measurements

This patch updates `drtm_measurements.c` to ensure that a No-Action
event is recorded in the Event Log as part of the DRTM measurement
process.
This helps maintain compliance with the event logging requirements
specified in DRTM spec v1.1 [1].

[1]: https://developer.arm.com/documentation/den0113/c/?lang=en

Change-Id: Ifcf25b7ec91393a0c91b05e30f1f6cc4960d5634
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(fvp): add stub function to retrieve DLME image auth features

DLME image authentication features are currently not supported on FVP.
This patch introduces a stub function in fvp_drtm_stub.c as a

feat(fvp): add stub function to retrieve DLME image auth features

DLME image authentication features are currently not supported on FVP.
This patch introduces a stub function in fvp_drtm_stub.c as a
placeholder for retrieving DLME image authentication features.

Change-Id: I6d274834245774c5442d67ee93fcd641f3a9cd1a
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(drtm): introduce plat API for DLME authentication features

This patch introduces a platform-specific function to provide DLME
authentication features. While no platforms currently support DLME

feat(drtm): introduce plat API for DLME authentication features

This patch introduces a platform-specific function to provide DLME
authentication features. While no platforms currently support DLME
authentication, this change offers a structured way for platforms
to define and expose their DLME authentication features, with the
flexibility to extend support in the future if needed.

Change-Id: Ia708914477c4d8cfee4809a9daade9a3e91ed073
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(drtm): ensure event types aligns with DRTM specification v1.1

This patch updates event logging to comply with the latest version
(v1.1) of the DRTM specification [1]. It ensures that all requir

feat(drtm): ensure event types aligns with DRTM specification v1.1

This patch updates event logging to comply with the latest version
(v1.1) of the DRTM specification [1]. It ensures that all required
event types, including those related to DLME authentication, are
properly defined.

Although these additional events are not currently utilized in the
implementation, this change ensures their presence as specified in
DRTM v1.1 for completeness.

[1]: https://developer.arm.com/documentation/den0113/c/?lang=en

Change-Id: I6846488c4121b1e2dc948d73c946e06883e16b28
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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