| 770de65f | 27-Mar-2014 |
Vikram Kanigiri <vikram.kanigiri@arm.com> |
Ensure a console is initialized before it is used
This patch moves console_init() to bl32_early_platform_setup(). It also ensures that console_init() is called in each blX_early_platform_setup() fun
Ensure a console is initialized before it is used
This patch moves console_init() to bl32_early_platform_setup(). It also ensures that console_init() is called in each blX_early_platform_setup() function before the console is used e.g. through a printf call in an assert() statement.
Fixes ARM-software/TF-issues#127
Change-Id: I5b1f17e0152bab674d807d2a95ff3689c5d4794e
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| 18a17e6a | 08-May-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #62 from athoelke/set-little-endian-v2
Set processor endianness immediately after RESET v2 |
| c3260f9b | 30-Apr-2014 |
Soby Mathew <soby.mathew@arm.com> |
Preserve x19-x29 across world switch for exception handling
Previously exception handlers in BL3-1, X19-X29 were not saved and restored on every SMC/trap into EL3. Instead these registers were 'save
Preserve x19-x29 across world switch for exception handling
Previously exception handlers in BL3-1, X19-X29 were not saved and restored on every SMC/trap into EL3. Instead these registers were 'saved as needed' as a side effect of the A64 ABI used by the C compiler.
That approach failed when world switching but was not visible with the TSP/TSPD code because the TSP is 64-bit, did not clobber these registers when running and did not support pre-emption by normal world interrupts. These scenarios showed that the values in these registers can be passed through a world switch, which broke the normal and trusted world assumptions about these registers being preserved.
The Ideal solution saves and restores these registers when a world switch occurs - but that type of implementation is more complex. So this patch always saves and restores these registers on entry and exit of EL3.
Fixes ARM-software/tf-issues#141
Change-Id: I9a727167bbc594454e81cf78a97ca899dfb11c27
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| fd6fede5 | 08-May-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #58 from athoelke/optimise-cache-flush-v2
Optimise data cache clean/invalidate operation v2 |
| 8067ae3f | 08-May-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #61 from athoelke/use-mrs-msr-from-assembler-v2
Use MRS/MSR instructions in assembler code v2 |
| a1ec2f4c | 08-May-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #60 from athoelke/disable-mmu-v2
Replace disable_mmu with assembler version v2 |
| b3e2268e | 08-May-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #59 from athoelke/review-barriers-v2
Correct usage of data and instruction barriers v2 |
| aefebcc3 | 08-May-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #57 from sandrine-bailleux/sb/remove-pl011-base
Remove unused 'PL011_BASE' macro |
| 31bce47e | 06-May-2014 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Remove unused 'PL011_BASE' macro
'PL011_BASE' macro is no longer used because the right UART base address is now directly given to the 'console_init()' function. This patch removes it.
Change-Id: I
Remove unused 'PL011_BASE' macro
'PL011_BASE' macro is no longer used because the right UART base address is now directly given to the 'console_init()' function. This patch removes it.
Change-Id: I94759c99602df4876291a56f9f6a75de337a65ec
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| 5f6032a8 | 25-Apr-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Optimise data cache clean/invalidate operation
The data cache clean and invalidate operations dcsw_op_all() and dcsw_op_loius() were implemented to invoke a DSB and ISB barrier for every set/way ope
Optimise data cache clean/invalidate operation
The data cache clean and invalidate operations dcsw_op_all() and dcsw_op_loius() were implemented to invoke a DSB and ISB barrier for every set/way operation. This adds a substantial performance penalty to an already expensive operation.
These functions have been reworked to provide an optimised implementation derived from the code in section D3.4 of the ARMv8 ARM. The helper macro setup_dcsw_op_args has been moved and reworked alongside the implementation.
Fixes ARM-software/tf-issues#146
Change-Id: Icd5df57816a83f0a842fce935320a369f7465c7f
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| 228a9f0b | 28-Apr-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Remove unused or invalid asm helper functions
There are a small number of non-EL specific helper functions which are no longer used, and also some unusable helper functions for non-existant register
Remove unused or invalid asm helper functions
There are a small number of non-EL specific helper functions which are no longer used, and also some unusable helper functions for non-existant registers.
This change removes all of these functions.
Change-Id: Idd656cef3b59cf5c46fe2be4029d72288b649c24
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| 7935d0a5 | 28-Apr-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Access system registers directly in assembler
Instead of using the system register helper functions to read or write system registers, assembler coded functions should use MRS/MSR instructions. This
Access system registers directly in assembler
Instead of using the system register helper functions to read or write system registers, assembler coded functions should use MRS/MSR instructions. This results in faster and more compact code.
This change replaces all usage of the helper functions with direct register accesses.
Change-Id: I791d5f11f257010bb3e6a72c6c5ab8779f1982b3
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| 2f5dcfef | 28-Apr-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Replace disable_mmu with assembler version
disable_mmu() cannot work as a C function as there is no control over data accesses generated by the compiler between disabling and cleaning the data cache
Replace disable_mmu with assembler version
disable_mmu() cannot work as a C function as there is no control over data accesses generated by the compiler between disabling and cleaning the data cache. This results in reading stale data from main memory.
As assembler version is provided for EL3, and a variant that also disables the instruction cache which is now used by the BL1 exception handling function.
Fixes ARM-software/tf-issues#147
Change-Id: I0cf394d2579a125a23c2f2989c2e92ace6ddb1a6
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| 8cec598b | 28-Apr-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Correct usage of data and instruction barriers
The current code does not always use data and instruction barriers as required by the architecture and frequently uses barriers excessively due to thei
Correct usage of data and instruction barriers
The current code does not always use data and instruction barriers as required by the architecture and frequently uses barriers excessively due to their inclusion in all of the write_*() helper functions.
Barriers should be used explicitly in assembler or C code when modifying processor state that requires the barriers in order to enable review of correctness of the code.
This patch removes the barriers from the helper functions and introduces them as necessary elsewhere in the code.
PORTING NOTE: check any port of Trusted Firmware for use of system register helper functions for reliance on the previous barrier behaviour and add explicit barriers as necessary.
Fixes ARM-software/tf-issues#92
Change-Id: Ie63e187404ff10e0bdcb39292dd9066cb84c53bf
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| 40fd0725 | 24-Apr-2014 |
Andrew Thoelke <andrew.thoelke@arm.com> |
Set processor endianness immediately after RESET
SCTLR_EL3.EE is being configured too late in bl1_arch_setup() and bl31_arch_setup() after data accesses have already occured on the cold and warm boo
Set processor endianness immediately after RESET
SCTLR_EL3.EE is being configured too late in bl1_arch_setup() and bl31_arch_setup() after data accesses have already occured on the cold and warm boot paths.
This control bit must be configured immediately on CPU reset to match the endian state of the firmware (little endian).
Fixes ARM-software/tf-issues#145
Change-Id: Ie12e46fbbed6baf024c30beb50751591bb8c8655
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| e404d7f4 | 06-May-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #49 from danh-arm/dh/remove-non-const-data
Remove variables from .data section |
| 625de1d4 | 23-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Remove variables from .data section
Update code base to remove variables from the .data section, mainly by using const static data where possible and adding the const specifier as required. Most cha
Remove variables from .data section
Update code base to remove variables from the .data section, mainly by using const static data where possible and adding the const specifier as required. Most changes are to the IO subsystem, including the framework APIs. The FVP power management code is also affected.
Delay initialization of the global static variable, next_image_type in bl31_main.c, until it is realy needed. Doing this moves the variable from the .data to the .bss section.
Also review the IO interface for inconsistencies, using uintptr_t where possible instead of void *. Remove the io_handle and io_dev_handle typedefs, which were unnecessary, replacing instances with uintptr_t.
Fixes ARM-software/tf-issues#107.
Change-Id: I085a62197c82410b566e4698e5590063563ed304
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| 408c3768 | 06-May-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #48 from danh-arm/dh/major-refactoring
dh/major refactoring |
| 97043ac9 | 09-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Reduce deep nesting of header files
Reduce the number of header files included from other header files as much as possible without splitting the files. Use forward declarations where possible. This
Reduce deep nesting of header files
Reduce the number of header files included from other header files as much as possible without splitting the files. Use forward declarations where possible. This allows removal of some unnecessary "#ifndef __ASSEMBLY__" statements.
Also, review the .c and .S files for which header files really need including and reorder the #include statements alphabetically.
Fixes ARM-software/tf-issues#31
Change-Id: Iec92fb976334c77453e010b60bcf56f3be72bd3e
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| fb037bfb | 10-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Always use named structs in header files
Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be imp
Always use named structs in header files
Add tag names to all unnamed structs in header files. This allows forward declaration of structs, which is necessary to reduce header file nesting (to be implemented in a subsequent commit).
Also change the typedef names across the codebase to use the _t suffix to be more conformant with the Linux coding style. The coding style actually prefers us not to use typedefs at all but this is considered a step too far for Trusted Firmware.
Also change the IO framework structs defintions to use typedef'd structs to be consistent with the rest of the codebase.
Change-Id: I722b2c86fc0d92e4da3b15e5cab20373dd26786f
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| c5945735 | 23-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Move PSCI global functions out of private header
Move the PSCI global functions out of psci_private.h and into psci.h to allow the standard service to only depend on psci.h.
Change-Id: I8306924a381
Move PSCI global functions out of private header
Move the PSCI global functions out of psci_private.h and into psci.h to allow the standard service to only depend on psci.h.
Change-Id: I8306924a3814b46e70c1dcc12524c7aefe06eed1
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| 5b827a8f | 17-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Separate BL functions out of arch.h
Move the BL function prototypes out of arch.h and into the appropriate header files to allow more efficient header file inclusion. Create new BL private header fi
Separate BL functions out of arch.h
Move the BL function prototypes out of arch.h and into the appropriate header files to allow more efficient header file inclusion. Create new BL private header files where there is no sensible existing header file.
Change-Id: I45f3e10b72b5d835254a6f25a5e47cf4cfb274c3
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| 8a4fb6f6 | 17-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Refactor GIC header files
Move the function prototypes from gic.h into either gic_v2.h or gic_v3.h as appropriate. Update the source files to include the correct headers.
Change-Id: I368cfda175cdcb
Refactor GIC header files
Move the function prototypes from gic.h into either gic_v2.h or gic_v3.h as appropriate. Update the source files to include the correct headers.
Change-Id: I368cfda175cdcbd3a68f46e2332738ec49048e19
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| bdbfc3c2 | 17-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Separate out CASSERT macro into own header
Separate out the CASSERT macro out of bl_common.h into its own header to allow more efficient header inclusion.
Change-Id: I291be0b6b8f9879645e839a8f0dd1e
Separate out CASSERT macro into own header
Separate out the CASSERT macro out of bl_common.h into its own header to allow more efficient header inclusion.
Change-Id: I291be0b6b8f9879645e839a8f0dd1ec9b3db9639
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| bee82417 | 15-Apr-2014 |
Dan Handley <dan.handley@arm.com> |
Remove vpath usage in makefiles
Remove all usage of the vpath keyword in makefiles as it was prone to mistakes. Specify the relative paths to source files instead.
Also reorder source files in make
Remove vpath usage in makefiles
Remove all usage of the vpath keyword in makefiles as it was prone to mistakes. Specify the relative paths to source files instead.
Also reorder source files in makefiles alphabetically.
Fixes ARM-software/tf-issues#121
Change-Id: Id15f60655444bae60e0e2165259efac71a50928b
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