rockchip: support disable/enable specific gpio when suspend/resume

some specific board need to disable/enable specific gpio when
suspend/resume, so we add this function, bootloader can pass the
spec

rockchip: support disable/enable specific gpio when suspend/resume

some specific board need to disable/enable specific gpio when
suspend/resume, so we add this function, bootloader can pass the
specific gpio, and we can handle these gpios in bl31 suspend/resuem
function.

Change-Id: I373b03ef9202ee4a05a2b9caacdfa01b47ee2177

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rockchip/rk3399: improve gpio driver and support get pull mode function

We may need gpio pull mode later, so add this function.
Besides fix a set pull mode bug, and save gpio clock gate,
when operat

rockchip/rk3399: improve gpio driver and support get pull mode function

We may need gpio pull mode later, so add this function.
Besides fix a set pull mode bug, and save gpio clock gate,
when operate the gpio, we will enable gpio clock, when
finish gpio operate, restore gpio clock gate status.

Change-Id: Ia1d602804f571a17f5ddc499908663b968b02974

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Flush `psci_plat_pm_ops` after initialization

The `psci_plat_pm_ops` global pointer is initialized during cold boot by the
primary CPU and will be accessed by the secondary CPUs before enabling data

Flush `psci_plat_pm_ops` after initialization

The `psci_plat_pm_ops` global pointer is initialized during cold boot by the
primary CPU and will be accessed by the secondary CPUs before enabling data
cache during warm boot. This patch adds a missing data cache flush of
`psci_plat_psci_ops` after initialization during psci_setup() so that
secondaries can see the updated `psci_plat_psci_ops` pointer.

Fixes ARM-software/tf-issues#424

Change-Id: Id4554800b5646302b944115a33be69507d53cedb

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Merge pull request #697 from rockchip-linux/fixes-scu-idle

rockchip: fix the scu idle for rk3399

rockchip: fix the scu idle for rk3399

As rk3399 reported the d8/octane scores drop 10% with cpu idle.
The root cause is thc cpu cluster enter the slow mode.
We don't need switch the clock to 24MHz i

rockchip: fix the scu idle for rk3399

As rk3399 reported the d8/octane scores drop 10% with cpu idle.
The root cause is thc cpu cluster enter the slow mode.
We don't need switch the clock to 24MHz if cpu cluster enter the
retention mode. In order to improve performance, it just needs for
cluster enter powering off mode.

Also, we shouldn't do anything for hlvl if the system is off.

Change-Id: I2a02962a01343abd0cba47ed63192c1cdf88b119

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Merge pull request #695 from soby-mathew/sm/AArch32_fixes

Fixes for AArch32 port of TF

AArch32: Fix SCTLR context initialization

This patch fixes a bug in context management library when writing
SCTLR register during context initialization. The write happened
prior to initialization o

AArch32: Fix SCTLR context initialization

This patch fixes a bug in context management library when writing
SCTLR register during context initialization. The write happened
prior to initialization of the register context pointer. This
resulted in the compiler optimizing the write sequence from the
final binary and hence SCTLR remains uninitialized when
entering normal world. The bug is fixed by doing the
initialization of the register context pointer earlier in the
sequence.

Change-Id: Ic7465593a74534046b79f40446ffa1165c52ed76

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AArch32: resolve build error when LOG_LEVEL=50

This patch resolves a build error in Trusted Firmware when `ARCH=aarch32`
and LOG_LEVEL >= 50.

Change-Id: I62a23ded4a25304533cdcc5ff11442aee041709b

Merge pull request #689 from yatharth-arm/yk/plat_report_expn

Remove looping around `plat_report_exception`

Merge pull request #690 from soby-mathew/sm/level_sel_xlat

Automatically select initial xlation lookup level

Merge pull request #693 from dp-arm/pmf-asm

Move pmf headers to include/lib/pmf and add assembler helper

Merge pull request #692 from dp-arm/master

fiptool: Fix typo in create and update usage functions

Merge pull request #691 from rockchip-linux/fixes-suspend/resume-bugs

Fixes suspend/resume bugs

Add assembler helper to calculate PMF timestamp offset

Given the service name and timestamp id, this assembler macro
calculates the offset into a memory region where the per-cpu timestamp
value is l

Add assembler helper to calculate PMF timestamp offset

Given the service name and timestamp id, this assembler macro
calculates the offset into a memory region where the per-cpu timestamp
value is located.

Change-Id: I47f6dfa2a17be182675e2ca0489d6eed42433209

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Move pmf headers to include/lib/pmf

More headers will be needed soon so better to move these to their own
directory to avoid cluttering include/lib.

Change-Id: I6a72dc5b602d6f51954cf60aadd1beb52a26

Move pmf headers to include/lib/pmf

More headers will be needed soon so better to move these to their own
directory to avoid cluttering include/lib.

Change-Id: I6a72dc5b602d6f51954cf60aadd1beb52a268670

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Merge pull request #684 from rockchip-linux/add-sdram-for-rk3399

rockchip: add dram driver for rk3399

fiptool: Fix typo in create and update usage functions

It should be 'fiptool' instead of 'fiptfool'.

Change-Id: I84ce1b6aaae5b8b33e5781bfe4f9e9cf462edb03

rockchip: handle some interrupt before enter power mode for rk3399

For the PMU design, we don't expect to get the interrupts before enter
the power mode. Since that will cause the confusion for the

rockchip: handle some interrupt before enter power mode for rk3399

For the PMU design, we don't expect to get the interrupts before enter
the power mode. Since that will cause the confusion for the state
machine in the power mode.

Change-Id: Id8dee79ae617a66271b5caf92caf35f520f45099

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rockchip: remove the unused code for rk3399

Change-Id: I986d64df9dc62354d50ccea0468b90f090a44160
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock

If we don't enable the Schmitt trigger on the 32 kHz clock then systems
won't always resume from suspend properly. Presumably anything els

rockchip: on rk3399 enable Schmitt trigger on 32 kHz clock

If we don't enable the Schmitt trigger on the 32 kHz clock then systems
won't always resume from suspend properly. Presumably anything else in
the system that relies on the 32 kHz clock also will have problems
without the Schmitt trigger enabled.

Enable it always since having the 32 kHz clock on GPIO0_A0 isn't
exactly an optional feature, so all boards using rk3399 will need this.

Change-Id: Idc18c6cd1adc5be5f60efd9cb805d83d5cd40129

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rockchip: enable or disable auto power down base on frequency

add auto_pd_dis_freq parameter, we can pass a frequency from kernel
to disable or enable ddr auto power down function.

Change-Id: Ie309

rockchip: enable or disable auto power down base on frequency

add auto_pd_dis_freq parameter, we can pass a frequency from kernel
to disable or enable ddr auto power down function.

Change-Id: Ie30914701336c59047c380381c6b75dd76a89562

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rockchip: rk3399: add dram driver

add dram driver, and kernel can through sip function talk to bl31 to
do ddr frequency scaling. and ddr auto powerdown.

Change-Id: I0d0f2869aed95e336c6e23ba96a93109

rockchip: rk3399: add dram driver

add dram driver, and kernel can through sip function talk to bl31 to
do ddr frequency scaling. and ddr auto powerdown.

Change-Id: I0d0f2869aed95e336c6e23ba96a9310985c84840

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rockchip: on rk3399 init the PMU counts at boot; set 24M/32k properly

In a previous change we mistakenly thought that PMU_24M_EN_CFG directly
controlled whether the PMU counts ran off the 32k vs. 24

rockchip: on rk3399 init the PMU counts at boot; set 24M/32k properly

In a previous change we mistakenly thought that PMU_24M_EN_CFG directly
controlled whether the PMU counts ran off the 32k vs. 24M clock.
Apparently that's not true. Real logic is now documented in code.

Also in the previous change we mistaknely though that PMU_24M_EN_CFG was
normally supposed to be 1 and we should "restore" it at resume time.
This is a terrible idea and made the system totally unreliable after
resume. Apparently PMU_24M_EN_CFG should always be 0 with all the
current code and settings.

Let's fix the above two problems. While we're changing all of this,
let's also:

1. Init at boot time. Many of these counts are used when the system is
running normally. We want the behavior at boot to match the behavior
after suspend/resume.

2. Init CPU counts to be 1 us. Although old code was trying to set this
to 1 ms (1000x slower) at suspend/resume time, we've been testing the
kernel with 1 us for a long time now. That's because the kernel (at
boot time) set these values to 24. Let's keep at 24 until we know
that's wrong.

3. Init GPU counts to be 1 us. Old code wasn't touching the GPU, but as
documented in comments it makes sense to init here. Do it.

4. Document the crap out of this code, since the SoC's behavior is
confusing and poorly documented in the TRM.

5. Increase some stabilization times to 30 ms (from 3 ms). It's unclear
that a full 30 ms is needed, but let's be safe for now.

This also inits the counts for the GPU.

(Thanks to Doug's patch that come from https://crosreview.com/372381)

Change-Id: Id1bc159a5a99916aeab043895e5c4585c4adab22

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Automatically select initial xlation lookup level

Instead of hardcoding a level 1 table as the base translation level
table, let the code decide which level is the most appropriate given
the virtual

Automatically select initial xlation lookup level

Instead of hardcoding a level 1 table as the base translation level
table, let the code decide which level is the most appropriate given
the virtual address space size.

As the table granularity is 4 KB, this allows the code to select
level 0, 1 or 2 as base level for AArch64. This way, instead of
limiting the virtual address space width to 39-31 bits, widths of
48-25 bit can be used.

For AArch32, this change allows the code to select level 1 or 2
as the base translation level table and use virtual address space
width of 32-25 bits.

Also removed some unused definitions related to translation tables.

Fixes ARM-software/tf-issues#362

Change-Id: Ie3bb5d6d1a4730a26700b09827c79f37ca3cdb65

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Remove looping around `plat_report_exception`

This patch removes the tight loop that calls `plat_report_exception`
in unhandled exceptions in AArch64 state.
The new behaviour is to call the `plat_re

Remove looping around `plat_report_exception`

This patch removes the tight loop that calls `plat_report_exception`
in unhandled exceptions in AArch64 state.
The new behaviour is to call the `plat_report_exception` only
once followed by call to `plat_panic_handler`.
This allows platforms to take platform-specific action when
there is an unhandled exception, instead of always spinning
in a tight loop.

Note: This is a subtle break in behaviour for platforms that
expect `plat_report_exception` to be continuously executed
when there is an unhandled exception.

Change-Id: Ie2453804b9b7caf9b010ee73e1a90eeb8384e4e8

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