Remove build option `ASM_ASSERTION`

The build option `ENABLE_ASSERTIONS` should be used instead. That way
both C and ASM assertions can be enabled or disabled together.

All occurrences of `ASM_ASSE

Remove build option `ASM_ASSERTION`

The build option `ENABLE_ASSERTIONS` should be used instead. That way
both C and ASM assertions can be enabled or disabled together.

All occurrences of `ASM_ASSERTION` in common code and ARM platforms have
been replaced by `ENABLE_ASSERTIONS`.

ASM_ASSERTION has been removed from the user guide.

Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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tspd:FWU:Fix usage of SMC_RET0

SMC_RET0 should only be used when the SMC code works as a function that
returns void. If the code of the SMC uses SMC_RET1 to return a value to
signify success and doe

tspd:FWU:Fix usage of SMC_RET0

SMC_RET0 should only be used when the SMC code works as a function that
returns void. If the code of the SMC uses SMC_RET1 to return a value to
signify success and doesn't return anything in case of an error (or the
other way around) SMC_RET1 should always be used to return clearly
identifiable values.

This patch fixes two cases in which the code used SMC_RET0 instead of
SMC_RET1.

It also introduces the define SMC_OK to use when an SMC must return a
value to tell that it succeeded, the same way as SMC_UNK is used in case
of failure.

Change-Id: Ie4278b51559e4262aced13bbde4e844023270582
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #904 from vwadekar/tegra-smmu-ctx-size-fix

Tegra: smmu: fix the size used to save context

lib: stdbool header from the FreeBSD project

This patch pulls the stdbool.h header file from the FreeBSD
project. The platforms require this header to fix many MISRA
defects among other things.

Sig

lib: stdbool header from the FreeBSD project

This patch pulls the stdbool.h header file from the FreeBSD
project. The platforms require this header to fix many MISRA
defects among other things.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: smmu: fix the size used to save context

This patch fixes the size used to save the context, when the
device enters System Suspend.

Reported by: David Cunado

Signed-off-by: Varun Wadekar <vw

Tegra: smmu: fix the size used to save context

This patch fixes the size used to save the context, when the
device enters System Suspend.

Reported by: David Cunado

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Minor refactor of BL2 image load v2

Previously, get_next_bl_params_from_mem_params_desc() populated arg0
in the EL3 runtime entrypoint with a bl_params_t pointer. This is the
responsibility of the g

Minor refactor of BL2 image load v2

Previously, get_next_bl_params_from_mem_params_desc() populated arg0
in the EL3 runtime entrypoint with a bl_params_t pointer. This is the
responsibility of the generic LOAD_IMAGE_V2 framework instead of the
descriptor-based image loading utility functions. Therefore this patch
moves that code to bl2_load_images().

Also, this patch moves the code that flushes the bl_params structure to
flush_bl_params_desc(), together with the other descriptor-based image
loading flushing code.

Change-Id: I4541e3f50e3878dde7cf89e9e8f31fe0b173fb9d
Signed-off-by: Dan Handley <dan.handley@arm.com>

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Add `ENABLE_ASSERTIONS` build option

Add the new build option `ENABLE_ASSERTIONS` that controls whether or
not assert functions are compiled out. It defaults to 1 for debug builds
and to 0 for relea

Add `ENABLE_ASSERTIONS` build option

Add the new build option `ENABLE_ASSERTIONS` that controls whether or
not assert functions are compiled out. It defaults to 1 for debug builds
and to 0 for release builds.

Additionally, a following patch will be done to allow this build option
to hide auxiliary code used for the checks done in an `assert()`. This
code is is currently under the DEBUG build flag.

Assert messages are now only printed if LOG_LEVEL >= LOG_LEVEL_INFO,
which is the default for debug builds.

This patch also updates the User Guide.

Change-Id: I1401530b56bab25561bb0f274529f1d12c5263bc
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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PSCI: Build option to enable D-Caches early in warmboot

This patch introduces a build option to enable D-cache early on the CPU
after warm boot. This is applicable for platforms which do not require

PSCI: Build option to enable D-Caches early in warmboot

This patch introduces a build option to enable D-cache early on the CPU
after warm boot. This is applicable for platforms which do not require
interconnect programming to enable cache coherency (eg: single cluster
platforms). If this option is enabled, then warm boot path enables
D-caches immediately after enabling MMU.

Fixes ARM-Software/tf-issues#456

Change-Id: I44c8787d116d7217837ced3bcf0b1d3441c8d80e
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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ARM platforms: Add option to use xlat tables lib v1

ARM platforms have migrated to the translation tables library v2.
However, for testing purposes, it can be useful to temporarily switch
back to th

ARM platforms: Add option to use xlat tables lib v1

ARM platforms have migrated to the translation tables library v2.
However, for testing purposes, it can be useful to temporarily switch
back to the old version.

This patch introduces the option `ARM_XLAT_TABLES_LIB_V1`, that switches
to v1 of the library when is set to 1. By default, it is 0, so that ARM
platforms use the new version unless specifically stated.

Updated User Guide.

Change-Id: I53d3c8dd97706f6af9c6fca0364a88ef341efd31
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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TZC: rename included C file to a header

C files shouldn't be included into others. This file only contains some
macros and functions that can be made `static inline`, so it is ok to
convert it into

TZC: rename included C file to a header

C files shouldn't be included into others. This file only contains some
macros and functions that can be made `static inline`, so it is ok to
convert it into a header file.

This is the only occurrence of a C file being included in another one in
the codebase instead of using a header, other occurrences are a way of
achieving backwards-compatibility.

Functions therein have been qualified as `inline`.

Change-Id: I88fe300f6d85a7f0740ef14c9cb8fa54849218e6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Tegra186: Support AARCH32/64 encoding for MCE calls

On Tegra systems, there are multiple software components that
require to interact with MCE. The components can either be 32-bit
or 64-bit payloads

Tegra186: Support AARCH32/64 encoding for MCE calls

On Tegra systems, there are multiple software components that
require to interact with MCE. The components can either be 32-bit
or 64-bit payloads. This patch supports MCE SMC functions ID for
AARCH32 and AARCH64 architectures to support such clients.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #893 from antonio-nino-diaz-arm/an/tf-printf-error

Replace tf_printf occurrences with ERROR

Merge pull request #899 from vwadekar/tegra186-platform-support-v6

Tegra186 platform support v6

Merge pull request #890 from masahir0y/scp

Build: add generic way to include SCP_BL2 into FIP image

Merge pull request #897 from vwadekar/memctrl-v1-xlat-table-v2

Tegra: memctrl_v1: enable 'xlat_table_v2' library

Tegra: fix trivial misra issues

Not having U or ULL as a suffix for these enums causes
a lot of unnecessary MISRA issues. This patch adds U or
ULL suffix to these common enums to reduce number of
MI

Tegra: fix trivial misra issues

Not having U or ULL as a suffix for these enums causes
a lot of unnecessary MISRA issues. This patch adds U or
ULL suffix to these common enums to reduce number of
MISRA issues.

Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: no need to re-init the same console

This patch stops initialising the same UART console, as a "crash"
console. The normal and the crash consoles use the same UART port
and hence the crash con

Tegra: no need to re-init the same console

This patch stops initialising the same UART console, as a "crash"
console. The normal and the crash consoles use the same UART port
and hence the crash console init function now only checks if the
console is ready to be used.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: Add support for fake system suspend

This patch adds support for fake system suspend (SC7).
This is a debug mode, to ensure that a different code path is
executed for cases like pre-silicon de

Tegra: Add support for fake system suspend

This patch adds support for fake system suspend (SC7).
This is a debug mode, to ensure that a different code path is
executed for cases like pre-silicon development, where a
full-fledged SC7 is not possible in early stages.

This particular patch ensures that, if fake system suspend is
enabled (denoted by tegra_fake_system_suspend variable
having a non-zero value), instead of calling WFI, a request
for a warm reset is made for starting the SC7 exit procedure.

This ensures that the code path of kernel->ATF and back to
kernel is executed without depending on other components
involved in SC7 code path.

Additionally, this patch also adds support for SMC call
from kernel, enabling fake system suspend mode.

Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: memctrl_v2: restore MC_TXN_OVERRIDE settings

This patch restores the MC_TXN_OVERRIDE settings when we exit from
System Suspend.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: memctrl_v1: disable AHB redirection after cold boot

During boot, USB3 and flash media (SDMMC/SATA) devices need access to
IRAM. Because these clients connect to the MC and do not have a direc

Tegra: memctrl_v1: disable AHB redirection after cold boot

During boot, USB3 and flash media (SDMMC/SATA) devices need access to
IRAM. Because these clients connect to the MC and do not have a direct
path to the IRAM, the MC implements AHB redirection during boot to allow
path to IRAM. In this mode, accesses to a programmed memory address aperture
are directed to the AHB bus, allowing access to the IRAM. The AHB aperture
is defined by the IRAM_BASE_LO and IRAM_BASE_HI registers, which are
initialized to disable this aperture. Once bootup is complete, we must
program IRAM base/top, thus disabling access to IRAM.

This patch provides functionality to disable this access. The tegra port
calls this new function before jumping to the non-secure world during
cold boot.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: platform: support Tegra186 chip id

This patch adds support to read the chip id and identify if
the current platform is Tegra186.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

Tegra: memctrl_v2: MC transaction overrides for newer chips

This patch programs MC transaction overrides settings using
mc_txn_override_cfgs array for all Tegra chips beyond Tegra186
rev. A01

Signe

Tegra: memctrl_v2: MC transaction overrides for newer chips

This patch programs MC transaction overrides settings using
mc_txn_override_cfgs array for all Tegra chips beyond Tegra186
rev. A01

Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra186: mce: Avoid implementation-defined bitfield types

GCC version 4.8 (and presumably earlier) warn when non-standard types are
used for bitfield definitions when -pedantic is enabled. This pre

Tegra186: mce: Avoid implementation-defined bitfield types

GCC version 4.8 (and presumably earlier) warn when non-standard types are
used for bitfield definitions when -pedantic is enabled. This prevents TF
from being built with such toolchains, since -Werror -pedantic options are
used.

gcc-4.9 removed this warning; -pedantic is intended to cause gcc to emit a
warning in all cases required by the standard, but the standard does not
require a warning in this case.

See: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57773

Signed-off-by: Stephen Warren <swarren@nvidia.com>

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Tegra: smmu: support for multiple devices

This patch adds flexibility to the code to initialise multiple SMMU
devices. The base address macro name has been changed to make it
explicit that we suppor

Tegra: smmu: support for multiple devices

This patch adds flexibility to the code to initialise multiple SMMU
devices. The base address macro name has been changed to make it
explicit that we support multiple SMMUs.

Change-Id: Id4854fb010ebeb699512d79c769de24050c2ad69
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: smmu: platform handler for SMMU settings

This patch empowers the platforms to provide an array with the
registers that must be saved/restored across System Suspend.

Original-change-by: Prite

Tegra: smmu: platform handler for SMMU settings

This patch empowers the platforms to provide an array with the
registers that must be saved/restored across System Suspend.

Original-change-by: Pritesh Raithatha <praithatha@nvidia.com>

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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