History log of /rk3399_ARM-atf/ (Results 16251 – 16275 of 18314)
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b3ccb0f226-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #917 from soby-mathew/sm/sys_susp_css

CSS: Allow system suspend only via PSCI SYSTEM_SUSPEND API

16292f5405-Apr-2017 David Cunado <david.cunado@arm.com>

Update terminology: standard SMC to yielding SMC

Since Issue B (November 2016) of the SMC Calling Convention document
standard SMC calls are renamed to yielding SMC calls to help avoid
confusion wit

Update terminology: standard SMC to yielding SMC

Since Issue B (November 2016) of the SMC Calling Convention document
standard SMC calls are renamed to yielding SMC calls to help avoid
confusion with the standard service SMC range, which remains unchanged.

http://infocenter.arm.com/help/topic/com.arm.doc.den0028b/ARM_DEN0028B_SMC_Calling_Convention.pdf

This patch adds a new define for yielding SMC call type and deprecates
the current standard SMC call type. The tsp is migrated to use this new
terminology and, additionally, the documentation and code comments are
updated to use this new terminology.

Change-Id: I0d7cc0224667ee6c050af976745f18c55906a793
Signed-off-by: David Cunado <david.cunado@arm.com>

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79199f7026-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #907 from antonio-nino-diaz-arm/an/smc-ret0

tspd:FWU:Fix usage of SMC_RET0

b7a52a7826-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #900 from vwadekar/ti-uart-bug-fix

drivers: ti: uart: remove UART_FCR read-modify-write

ec54a87125-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #914 from afaerber/align-hex

fiptool: Support non-decimal --align arguments

c99a16fe25-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #901 from vwadekar/freebsd-stdbool-header

lib: stdbool header from the FreeBSD project

0d5ec95524-Apr-2017 tony.xie <tony.xie@rock-chips.com>

rockchip: rk3328: support rk3328
rk3328 is a Quad-core soc and Cortex-a53 inside!
This patch supports the following functions:
1、power up/off cpus
2、suspend/resume cpus
3、suspend/resume system
4、rese

rockchip: rk3328: support rk3328
rk3328 is a Quad-core soc and Cortex-a53 inside!
This patch supports the following functions:
1、power up/off cpus
2、suspend/resume cpus
3、suspend/resume system
4、reset system
5、power off system

Change-Id: I60687058d13912c6929293b06fed9c6bc72bdc84
Signed-off-by: tony.xie <tony.xie@rock-chips.com>

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ffc299f624-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #911 from danh-arm/dh/refactor-bl2-image-load

Minor refactor of BL2 image load v2

0c7c441124-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #909 from sandrine-bailleux-arm/sb/xlat-lib-misc-improvements

xlat lib: Use mmap_attr_t type consistently

abd2aba909-Dec-2016 Soby Mathew <soby.mathew@arm.com>

CSS: Allow system suspend only via PSCI SYSTEM_SUSPEND API

The CSS power management layer previously allowed to suspend system
power domain level via both PSCI CPU_SUSPEND and PSCI SYSTEM_SUSPEND
AP

CSS: Allow system suspend only via PSCI SYSTEM_SUSPEND API

The CSS power management layer previously allowed to suspend system
power domain level via both PSCI CPU_SUSPEND and PSCI SYSTEM_SUSPEND
APIs. System suspend via PSCI CPU_SUSPEND was always problematic to
support because of issues with targeting wakeup interrupts to
suspended cores before the per-cpu GIC initialization is done. This
is not the case for PSCI SYSTEM_SUSPEND API because all the other
cores are expected to be offlined prior to issuing system suspend and
PSCI CPU_ON explicit calls will be made to power them on. Hence the Juno
platform used to downgrade the PSCI CPU_SUSPEND request for system
power domain level to cluster level by overriding the default
`plat_psci_pm_ops` exported by CSS layer.

Given the direction the new CSS platforms are evolving, it is best to
limit the system suspend only via PSCI SYSTEM_SUSPEND API for all
CSS platforms. This patch makes changes to allow system suspend
only via PSCI SYSTEM_SUSPEND API. The override of `plat_psci_ops`
for Juno is removed.

Change-Id: Idb30eaad04890dd46074e9e888caeedc50a4b533
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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fb5f794921-Apr-2017 Andreas Färber <afaerber@suse.de>

fiptool: Support non-decimal --align arguments

An alignment value of 0x4000 is much easier to type than 16384,
so enhance get_image_align() to recognize a 0x prefix for hexadecimals.

Signed-off-by:

fiptool: Support non-decimal --align arguments

An alignment value of 0x4000 is much easier to type than 16384,
so enhance get_image_align() to recognize a 0x prefix for hexadecimals.

Signed-off-by: Andreas Färber <afaerber@suse.de>

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8178ea7c21-Apr-2017 Varun Wadekar <vwadekar@nvidia.com>

drivers: ti: uart: remove UART_FCR writes

This patch removes the code that touched UART_FCR, from
console_core_putc(). The check for whether transmit FIFO is
full is sufficient before writing to UAR

drivers: ti: uart: remove UART_FCR writes

This patch removes the code that touched UART_FCR, from
console_core_putc(). The check for whether transmit FIFO is
full is sufficient before writing to UART TX FIFO. In fact
setting UARTFCR_TXCLR immediately after a byte is written to
FIFO might even result in loss of that byte, if UART hasn't
sent that byte out yet.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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3fb340a221-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #912 from vwadekar/tegra-smmu-ctx-save-robust

Tegra: smmu: make the context save sequence robust

484acce321-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #910 from dp-arm/dp/AArch32-juno-port

Add AArch32 support for Juno

94e0ed6021-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #902 from vwadekar/tegra186-sip-mce-calls

Tegra186: Support AARCH32/64 encoding for MCE calls

e83b5fdc21-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #898 from soby-mathew/sm/dcache-early

PSCI: Build option to enable D-Caches early in warmboot

228bfaba21-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #903 from antonio-nino-diaz-arm/an/build-xlat-v1

ARM platforms: Add option to use xlat tables lib v1

2edf648221-Apr-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #906 from antonio-nino-diaz-arm/an/asserts-release

Add `ENABLE_ASSERTIONS` build option

63ac1a2a21-Apr-2017 Varun Wadekar <vwadekar@nvidia.com>

Tegra: smmu: make the context save sequence robust

This patch sanity checks the SMMU context created by the platform
code. The first entry contains the size of the array; which the
driver now verifi

Tegra: smmu: make the context save sequence robust

This patch sanity checks the SMMU context created by the platform
code. The first entry contains the size of the array; which the
driver now verifies before moving on with the save.

This patch also fixes an error in the calculation of the size of
the context that gets copied to TZDRAM.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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6f24934514-Nov-2016 Yatharth Kochar <yatharth.kochar@arm.com>

AArch32: Add SP_MIN support for JUNO

This patch adds support for SP_MIN on JUNO platform.
The changes include addition of AArch32 assembly files,
JUNO specific SP_MIN make file and miscellaneous cha

AArch32: Add SP_MIN support for JUNO

This patch adds support for SP_MIN on JUNO platform.
The changes include addition of AArch32 assembly files,
JUNO specific SP_MIN make file and miscellaneous changes
in ARM platform files to enable support for SP_MIN.

Change-Id: Id1303f422fc9b98b9362c757b1a4225a16fffc0b
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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07570d5914-Nov-2016 Yatharth Kochar <yatharth.kochar@arm.com>

Changes to support execution in AArch32 state for JUNO

Following steps are required to boot JUNO in AArch32 state:
1> BL1, in AArch64 state, loads BL2.
2> BL2, in AArch64 state, initializes DDR.
L

Changes to support execution in AArch32 state for JUNO

Following steps are required to boot JUNO in AArch32 state:
1> BL1, in AArch64 state, loads BL2.
2> BL2, in AArch64 state, initializes DDR.
Loads SP_MIN & BL33 (AArch32 executable)images.
Calls RUN_IMAGE SMC to go back to BL1.
3> BL1 writes AArch32 executable opcodes, to load and branch
at the entrypoint address of SP_MIN, at HI-VECTOR address and
then request for warm reset in AArch32 state using RMR_EL3.

This patch makes following changes to facilitate above steps:
* Added assembly function to carry out step 3 above.
* Added region in TZC that enables Secure access to the
HI-VECTOR(0xFFFF0000) address space.
* AArch32 image descriptor is used, in BL2, to load
SP_MIN and BL33 AArch32 executable images.

A new flag `JUNO_AARCH32_EL3_RUNTIME` is introduced that
controls above changes. By default this flag is disabled.

NOTE: BL1 and BL2 are not supported in AArch32 state for JUNO.

Change-Id: I091d56a0e6d36663e6d9d2bb53c92c672195d1ec
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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dc78758810-Nov-2016 Yatharth Kochar <yatharth.kochar@arm.com>

AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor

This patch adds AArch32 state support for ARM Cortex-A53,
Cortex-A57 and Cortex-A72 MPCore Processor in the CPU specific
operations fra

AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor

This patch adds AArch32 state support for ARM Cortex-A53,
Cortex-A57 and Cortex-A72 MPCore Processor in the CPU specific
operations framework.

NOTE: CPU errata handling code is not present in this patch.

Change-Id: I01eb3e028e40dde37565707ebc99e06e7a0c113d
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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0498343a11-Apr-2017 dp-arm <dimitris.papastamos@arm.com>

css: Ensure PSCI system off/reset is not interrupted

If there is a pending interrupt, it is possible for the AP to come out
of the final WFI before SCP has a chance to act on it. Prevent this
by di

css: Ensure PSCI system off/reset is not interrupted

If there is a pending interrupt, it is possible for the AP to come out
of the final WFI before SCP has a chance to act on it. Prevent this
by disabling the GIC CPU interface before issuing a WFI.

Previously, SCP would not wait on WFI before taking an action but
would shut down the core or system regardless.

Change-Id: Ib0bcf69a515d540ed4f73c11e40ec7c863e39c92
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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28fa2e9e19-Apr-2017 Sandrine Bailleux <sandrine.bailleux@arm.com>

xlat lib: Use mmap_attr_t type consistently

This patch modifies both versions of the translation table library
to use the mmap_attr_t type consistently wherever it is manipulating
MT_* attributes va

xlat lib: Use mmap_attr_t type consistently

This patch modifies both versions of the translation table library
to use the mmap_attr_t type consistently wherever it is manipulating
MT_* attributes variables. It used to use mmap_attr_t or plain integer
types interchangeably, which compiles fine because an enumeration type
can be silently converted to an integer, but which is semantically
incorrect.

This patch removes this assumption by using the abstract type
'mmap_attr_t' all the time.

Change-Id: Id1f099025d2cb962b275bb7e39ad2c4dbb4e366c
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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aa61368e22-Mar-2017 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Control inclusion of helper code used for asserts

Many asserts depend on code that is conditionally compiled based on the
DEBUG define. This patch modifies the conditional inclusion of such code
so

Control inclusion of helper code used for asserts

Many asserts depend on code that is conditionally compiled based on the
DEBUG define. This patch modifies the conditional inclusion of such code
so that it is based on the ENABLE_ASSERTIONS build option.

Change-Id: I6406674788aa7e1ad7c23d86ce94482ad3c382bd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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