History log of /rk3399_ARM-atf/ (Results 15876 – 15900 of 18314)
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579b4adb24-Aug-2017 Jeenu Viswambharan <jeenu.viswambharan@arm.com>

firmware-design.rst: Fix formatting

The format conversion wrongly formatted a couple of sections. These were
also missing from the Table of Contents.

Change-Id: I324216c27e7b4711e6cc5e25782f4b53842

firmware-design.rst: Fix formatting

The format conversion wrongly formatted a couple of sections. These were
also missing from the Table of Contents.

Change-Id: I324216c27e7b4711e6cc5e25782f4b53842140cc
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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e2af1cad24-Aug-2017 Jens Wiklander <jens.wiklander@linaro.org>

qemu: Add OP-TEE extra image parsing support

OP-TEE may have extra images to be loaded. Load them one by one and do
the parsing. In this patch, ARM TF need to load up to 3 images for
OP-TEE: header,

qemu: Add OP-TEE extra image parsing support

OP-TEE may have extra images to be loaded. Load them one by one and do
the parsing. In this patch, ARM TF need to load up to 3 images for
OP-TEE: header, pager and pages images. Header image is the info about
optee os and images. Pager image include pager code and data. Paged
image include the paging parts using virtual memory.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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19911aa624-Aug-2017 Jens Wiklander <jens.wiklander@linaro.org>

opteed: pass device tree pointer in x2

Pass device tree pointer to OP-TEE in x2. bl2 is expected to fill in the
device tree pointer in args.arg3. Passing 0 means that device tree is
unavailable.

Si

opteed: pass device tree pointer in x2

Pass device tree pointer to OP-TEE in x2. bl2 is expected to fill in the
device tree pointer in args.arg3. Passing 0 means that device tree is
unavailable.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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ccdbae7124-Aug-2017 Jens Wiklander <jens.wiklander@linaro.org>

qemu: replace deprecated plat_psci_common.c

Change to compile with new plat/common/plat_psci_common.c instead of the old
deprecated plat/common/aarch64/plat_psci_common.c

Signed-off-by: Jens Wiklan

qemu: replace deprecated plat_psci_common.c

Change to compile with new plat/common/plat_psci_common.c instead of the old
deprecated plat/common/aarch64/plat_psci_common.c

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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56ca731224-Aug-2017 Jens Wiklander <jens.wiklander@linaro.org>

qemu: replace deprecated ADDR_SPACE_SIZE

Replaces the deprecated ADDR_SPACE_SIZE with PLAT_PHY_ADDR_SPACE_SIZE
and PLAT_VIRT_ADDR_SPACE_SIZE.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.or

qemu: replace deprecated ADDR_SPACE_SIZE

Replaces the deprecated ADDR_SPACE_SIZE with PLAT_PHY_ADDR_SPACE_SIZE
and PLAT_VIRT_ADDR_SPACE_SIZE.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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5722b78c23-Aug-2017 Alistair Francis <alistair.francis@xilinx.com>

psci_common: Resolve GCC static analysis false positive

Previously commit 555ebb34db8f3424c1b394df2f10ecf9c1f70901 attmpted to fix this
GCC issue:

services/std_svc/psci/psci_common.c: In function '

psci_common: Resolve GCC static analysis false positive

Previously commit 555ebb34db8f3424c1b394df2f10ecf9c1f70901 attmpted to fix this
GCC issue:

services/std_svc/psci/psci_common.c: In function 'psci_do_state_coordination':
services/std_svc/psci/psci_common.c:220:27: error: array subscript is above
array bounds [-Werror=array-bounds]
psci_req_local_pwr_states[pwrlvl - 1][cpu_idx] = req_pwr_state;

This fix doesn't work as asserts aren't built in non-debug build flows.

Let's use GCCs #pragma option (documented here:
https://gcc.gnu.org/onlinedocs/gcc/Diagnostic-Pragmas.html) to avoid
this false positive instead.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

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8431635b17-Aug-2017 Isla Mitchell <isla.mitchell@arm.com>

FVP: Always assume shifted affinity with MT bit

At present, the MPIDR validation on FVP relies on MT bit set along
with shifted affinities. This currently is additionally dependent
on the FVP model

FVP: Always assume shifted affinity with MT bit

At present, the MPIDR validation on FVP relies on MT bit set along
with shifted affinities. This currently is additionally dependent
on the FVP model being of variant C. This however should be based
on the presence of MT bit alone.

This patch makes the change to always assume that the affinities
are shifted in the FVP model when MT bit is present.

Change-Id: I09fcb0126e1b38d29124bdeaf3450a60b95d485d
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>

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5982fa7923-Aug-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1017 from etienne-lms/minor-docs

Minor docs

66079b0423-Aug-2017 Etienne Carriere <etienne.carriere@linaro.org>

Makefile: correct path for CHECKPATCH warnings

Change-Id: I08c9789d3fd2b034b08de663d151023ca005f77f
Reported-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@

Makefile: correct path for CHECKPATCH warnings

Change-Id: I08c9789d3fd2b034b08de663d151023ca005f77f
Reported-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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d591d76623-Aug-2017 Etienne Carriere <etienne.carriere@linaro.org>

doc: minor typo fix

Change-Id: I00fae047dea0eaf7e60037598af020817c66f659
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

3bbe34e528-Jul-2017 Roberto Vargas <roberto.vargas@arm.com>

norflash: Add full status check

The nor_XXXXX functions may fail due to different reasons, and it
is convenient to do a full check to detect any failure. It is also
a good idea to have a specific fu

norflash: Add full status check

The nor_XXXXX functions may fail due to different reasons, and it
is convenient to do a full check to detect any failure. It is also
a good idea to have a specific function to do a full status check,
because new checks can be added to this function and they will be
incorporated automatically to any function calling it.

Change-Id: I54fed913e37ef574c1608e94139a519426348d12
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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2e09d4f823-Aug-2017 Ken Kuang <ken.kuang@spreadtrum.com>

fix a typo about sctlr_el2
which will cause write_sctlr_el2 use all sctlr_el1 value except the EE bit

The code doesn't "Use SCTLR_EL1.EE value to initialise sctlr_el2"
but, read out SCTLR_EL1 and cl

fix a typo about sctlr_el2
which will cause write_sctlr_el2 use all sctlr_el1 value except the EE bit

The code doesn't "Use SCTLR_EL1.EE value to initialise sctlr_el2"
but, read out SCTLR_EL1 and clear EE bit, then set to sctlr_el2

Signed-off-by: Ken Kuang <ken.kuang@spreadtrum.com>

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096b7af722-Aug-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1054 from jwerner-chromium/JW_crash_x30

Fix x30 reporting for unhandled exceptions

2458e37a22-Aug-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1053 from jwerner-chromium/JW_func_align

Add new alignment parameter to func assembler macro

784502ae28-Jul-2017 Roberto Vargas <roberto.vargas@arm.com>

norflash: Add nor_erase() to NOR driver

NOR memory only supports setting bits to 1. To clear a bit, set to zero,
the NOR memory needs to be erased.

Change-Id: Ia82eb15a5af9a6d4fc7e5ea2b58e6db87226b

norflash: Add nor_erase() to NOR driver

NOR memory only supports setting bits to 1. To clear a bit, set to zero,
the NOR memory needs to be erased.

Change-Id: Ia82eb15a5af9a6d4fc7e5ea2b58e6db87226b351
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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b4b09ca526-Jul-2017 Roberto Vargas <roberto.vargas@arm.com>

norflash: Clear status register before sending commands

The status register bits remain until explicitly cleared, which means
that a command can be incorrectly considered to have generated an error

norflash: Clear status register before sending commands

The status register bits remain until explicitly cleared, which means
that a command can be incorrectly considered to have generated an error -
for example, after reset the status register contents may be unknown or
if a previous command had failed.

This patch clears the status register before beginning any command to
be sure that the status register only represents information about the
current operation.

Change-Id: I9e98110ee24179937215461c00b6543a3467b350
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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9753cb5b26-Jul-2017 Roberto Vargas <roberto.vargas@arm.com>

norflash: Wait for WSM bit in lock/unlock

lock/unlock operation must wait until WSM bit
is set. Since we do not allow to loop forever then these functions
must return an error if WSM bit isn't enabl

norflash: Wait for WSM bit in lock/unlock

lock/unlock operation must wait until WSM bit
is set. Since we do not allow to loop forever then these functions
must return an error if WSM bit isn't enabled after a number of tries.

Change-Id: I21c9e292b514b28786ff4a225128bcd8c1bfa999
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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f4953e7626-Jul-2017 Roberto Vargas <roberto.vargas@arm.com>

norflash: clean-up norflash.c

- Add comments to all the functions
- Simplify nor_poll_dws
- Simplify nor_word_program

Change-Id: I29c0199d2908a4fceb1ac3430fcfdd699be22bb3
Signed-off-by: Roberto Var

norflash: clean-up norflash.c

- Add comments to all the functions
- Simplify nor_poll_dws
- Simplify nor_word_program

Change-Id: I29c0199d2908a4fceb1ac3430fcfdd699be22bb3
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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4d91838b27-Jul-2017 Julius Werner <jwerner@chromium.org>

Fix x30 reporting for unhandled exceptions

Some error paths that lead to a crash dump will overwrite the value in
the x30 register by calling functions with the no_ret macro, which
resolves to a BL

Fix x30 reporting for unhandled exceptions

Some error paths that lead to a crash dump will overwrite the value in
the x30 register by calling functions with the no_ret macro, which
resolves to a BL instruction. This is not very useful and not what the
reader would expect, since a crash dump should usually show all
registers in the state they were in when the exception happened. This
patch replaces the offending function calls with a B instruction to
preserve the value in x30.

Change-Id: I2a3636f2943f79bab0cd911f89d070012e697c2a
Signed-off-by: Julius Werner <jwerner@chromium.org>

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5ae4dab217-Aug-2017 danh-arm <dan.handley@arm.com>

Merge pull request #1051 from Kevin-WangTao/fix_suspend_issue

Hikey960: fix PSCI suspend stuck issue

e808242217-Aug-2017 danh-arm <dan.handley@arm.com>

Merge pull request #977 from etienne-lms/sp-min-fiq

bl32: add secure interrupt handling in AArch32 sp_min

7f943ba611-Jul-2017 Qixiang Xu <qixiang.xu@arm.com>

update the interrupt diagrams

- Redraw the interrupt diagrams with dia tool
- Change TSP_HANDLED_S_EL1_FIQ to TSP_HANDLED_S_EL1_INTR in sec-int-handling.png
- Use the makefile generate the

update the interrupt diagrams

- Redraw the interrupt diagrams with dia tool
- Change TSP_HANDLED_S_EL1_FIQ to TSP_HANDLED_S_EL1_INTR in sec-int-handling.png
- Use the makefile generate the image to avoid unnessary generate
- Add dia source code

Change-Id: I016022ca964720e8497c27c88a3f371459abc284

Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>

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4af7fcb803-Aug-2017 Tao Wang <kevin.wangtao@linaro.org>

Hikey960: fix PSCI suspend stuck issue

Clear the cpuidle flag when resuming from idle. This flag is set
when entering idle, and if it remains set when resuming, it can
prevent the cluster from power

Hikey960: fix PSCI suspend stuck issue

Clear the cpuidle flag when resuming from idle. This flag is set
when entering idle, and if it remains set when resuming, it can
prevent the cluster from powering off during the next system
suspend operation. During system suspend, all CPUs are plugged
out except the last CPU, which is suspended. If any of the
cpuidle flags are set at this point, the last CPU will be stuck
in a WFI loop and will not be powered off.
This problem only occurs during system suspend.

Signed-off-by: Tao Wang <kevin.wangtao@linaro.org>

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80ff815816-Aug-2017 danh-arm <dan.handley@arm.com>

Merge pull request #1042 from tekkamanninja/qemu_load_image_v2_upstream

qemu: Add LOAD_IMAGE_V2 support

64b3112527-May-2017 Fu Wei <wefu@redhat.com>

qemu: Add LOAD_IMAGE_V2 support

The generic LOAD_IMAGE_V2 framework has been merged and enable for almost
all the arm platform. Because qemu platform doesn't share those common
files with arm, QEMU

qemu: Add LOAD_IMAGE_V2 support

The generic LOAD_IMAGE_V2 framework has been merged and enable for almost
all the arm platform. Because qemu platform doesn't share those common
files with arm, QEMU haven't got this support yet.

This patch add all the necessary code the files for adding LOAD_IMAGE_V2
support on QEMU and enable it as default.

Fixes ARM-software/tf-issues#507

Signed-off-by: Fu Wei <fu.wei@linaro.org>

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