plat: zynqmp: Don't panic() if we can't find the FSBL struct

If we can't find the FSBL handoff struct don't panic and just use the
defaults instead.

We still print a warning to the user to let them

plat: zynqmp: Don't panic() if we can't find the FSBL struct

If we can't find the FSBL handoff struct don't panic and just use the
defaults instead.

We still print a warning to the user to let them know what we couldn't
find it.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

show more ...

plat: zynqmp: Let fsbl_atf_handover() return an error status

Instead of calling panic() in fsbl_atf_handover() return the error
status so that bl31_early_platform_setup() can act accordingly.

Signe

plat: zynqmp: Let fsbl_atf_handover() return an error status

Instead of calling panic() in fsbl_atf_handover() return the error
status so that bl31_early_platform_setup() can act accordingly.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

show more ...

Include "bl_common.h" in Xilinx zynqmp_private.h

Type "entry_point_info_t" is used in zynqmp_private.h. It is defined
in "bl_common.h". The header file which defines the type should be
included.

Si

Include "bl_common.h" in Xilinx zynqmp_private.h

Type "entry_point_info_t" is used in zynqmp_private.h. It is defined
in "bl_common.h". The header file which defines the type should be
included.

Signed-off-by: Wendy Liang <jliang@xilinx.com>

show more ...

zynqmp: pm: Added APIs for xilsecure linux support

Added SHA to calculate SHA3 hash,RSA to encrypt data with
public key and decrypt with private key and AES to do symmetric
encryption with User key

zynqmp: pm: Added APIs for xilsecure linux support

Added SHA to calculate SHA3 hash,RSA to encrypt data with
public key and decrypt with private key and AES to do symmetric
encryption with User key or device key.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

show more ...

plat: zynqmp: Add support for CG/EG/EV device detection

Read ipdisable reg which needs to be used for cg/eg/ev device detection.
ATF runs in EL3 that's why this read can be done directly.

Signed-of

plat: zynqmp: Add support for CG/EG/EV device detection

Read ipdisable reg which needs to be used for cg/eg/ev device detection.
ATF runs in EL3 that's why this read can be done directly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

show more ...

aarch64: zynqmp: Add new Ids for RFSoC

Add new id codes for RFSoC's.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

zynqmp: Fix CSU ID SVD mask fo getting chip ID

This patch corrects the SVD mask for getting chip ID
using 0xe is wrong and 0x7 is correct.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.

zynqmp: Fix CSU ID SVD mask fo getting chip ID

This patch corrects the SVD mask for getting chip ID
using 0xe is wrong and 0x7 is correct.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

show more ...

zynqmp: pm: Allow to set shutdown scope via pm_system_shutdown API

psci system_reset and system_off calls now retrieve shutdown scope on
the fly. The default scope is system, but it can be changed b

zynqmp: pm: Allow to set shutdown scope via pm_system_shutdown API

psci system_reset and system_off calls now retrieve shutdown scope on
the fly. The default scope is system, but it can be changed by calling
pm_system_shutdown(2, scope)

Until full support for different restart scopes becomes available with
PSCI 1.1 this change allows users to set the reboot scope to match
their application needs.

Possible scope values:
0 - APU subsystem: does not affect RPU, PMU or PL
1 - PS only: shutdown/restart entire PS without affecting PL
2 - System: shutdown/restart applies to entire system

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Davorin Mista <davorin.mista@aggios.com>

show more ...

zynqmp: pm: Implement PM_INIT_FINALIZE PM API call

The PM_INIT_FINALIZE PM API is required to inform the PFW that APU is
done with requesting nodes and that not-requested nodes can be powered
down.

zynqmp: pm: Implement PM_INIT_FINALIZE PM API call

The PM_INIT_FINALIZE PM API is required to inform the PFW that APU is
done with requesting nodes and that not-requested nodes can be powered
down. If PM is not enabled, this call will never be made and PFW will
never power down any of the nodes which APU can use.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

show more ...

zynqmp: pm: Rename PM_INIT to PM_INIT_FINALIZE

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

zynqmp: pm: Implemented new pm API to load secure images

This patch adds pm_secure_rsaaes() API to provide access to
the xilsecure library for loading secure images

Signed-off-by: Siva Durga Prasad

zynqmp: pm: Implemented new pm API to load secure images

This patch adds pm_secure_rsaaes() API to provide access to
the xilsecure library for loading secure images

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

show more ...

xilinx: zynqmp: Read bootmode register using PM API

Read boot mode register using pm_mmio_read if pmu is
present otherwise access it directly using mmio_read_32().

Signed-off-by: Siva Durga Prasad

xilinx: zynqmp: Read bootmode register using PM API

Read boot mode register using pm_mmio_read if pmu is
present otherwise access it directly using mmio_read_32().

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

show more ...

zynqmp: pm: Decode start address related SMC arguments for pm_req_wakeup

The pm_req_wakeup PM API accepts start address (64-bit unsiged integer)
and a flag stating if address should be used. To save

zynqmp: pm: Decode start address related SMC arguments for pm_req_wakeup

The pm_req_wakeup PM API accepts start address (64-bit unsiged integer)
and a flag stating if address should be used. To save an argument
of the SMC call, flag is encoded in the LSB of the address, since
addresses are word aligned.
Decode start address and use-address flag in the PM SMC handler and
pass them to pm_req_wakeup.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>

show more ...

zynqmp: pm: Move pm_client_wakeup call from pm_req_wakeup

Call to pm_client_wakeup from pm_req_wakeup prevented the PM API
call to be used to wake up non-APU processor (e.g. from higher ELs),
since

zynqmp: pm: Move pm_client_wakeup call from pm_req_wakeup

Call to pm_client_wakeup from pm_req_wakeup prevented the PM API
call to be used to wake up non-APU processor (e.g. from higher ELs),
since it clears power down request for specified APU processor.
Move this function out of pm_client_wakeup to allow passing wake up
requests to the PMU for other processor in the system.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>

show more ...

zynqmp: pm: Remove unused NODE_AFI, add NODE_EXTERN

NODE_EXTERN is the slave node which represents an external wake
source.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: W

zynqmp: pm: Remove unused NODE_AFI, add NODE_EXTERN

NODE_EXTERN is the slave node which represents an external wake
source.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>

show more ...

zynqmp: pm: Add support for setting suspend-to-RAM mode

Beside standard suspend-to-RAM state, Zynq MPSoC supports
suspend-to-RAM state with additional power savings, called
power-off suspend-to-RAM.

zynqmp: pm: Add support for setting suspend-to-RAM mode

Beside standard suspend-to-RAM state, Zynq MPSoC supports
suspend-to-RAM state with additional power savings, called
power-off suspend-to-RAM. If this mode is set, only NODE_EXTERN
must be set as wake source. Standard suspend-to-RAM procedure
is unchanged.

This patch adds support for setting suspend mode from higher
ELs and ensuring that all conditions for power-off suspend mode
are set.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

show more ...

zynqmp: pm: Implement pm_get_node_status API function

pm_get_node_status API function returns 3 values:
-status: Current power state of the node
-requirements: Current requirements for the node
-usa

zynqmp: pm: Implement pm_get_node_status API function

pm_get_node_status API function returns 3 values:
-status: Current power state of the node
-requirements: Current requirements for the node
-usage: Current usage of the node
The last two values only apply to slave nodes.

Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com>
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>

show more ...

Merge pull request #1387 from vishwanathahg/sgi575/core_pos_calc

Sgi575/core pos calc

Merge pull request #1383 from sandrine-bailleux-arm/topics/sb/sp-access-fpregs

SPM: Do not trap S-EL0 access to SVE/SIMD/FP regs

Merge pull request #1382 from sandrine-bailleux-arm/topics/sb/fix-doc

Fix doc for bl31_plat_get_next_image_ep_info()

Merge pull request #1381 from antonio-nino-diaz-arm/an/kernel-boot

plat/arm: Introduce ARM_LINUX_KERNEL_AS_BL33 build option

Merge pull request #1378 from vwadekar/denver-cve-2017-5715

CVE-2017-5715 mitigation for Denver CPUs

css/sgi: rework the core position calculation function

The MT bit in MPIDR is always set for SGI platforms and so the
core position calculation code is updated to take into account
the thread affini

css/sgi: rework the core position calculation function

The MT bit in MPIDR is always set for SGI platforms and so the
core position calculation code is updated to take into account
the thread affinity value as well.

Change-Id: I7b2a52707f607dc3859c6bbcd2b145b7987cb4ed
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>

show more ...

css/sgi: remove redundant copy of gic driver data

Instead of instantiating a local copy of GICv3 driver data for SGI
platforms, reuse the existing instance of GICv3 driver data available
in the arm

css/sgi: remove redundant copy of gic driver data

Instead of instantiating a local copy of GICv3 driver data for SGI
platforms, reuse the existing instance of GICv3 driver data available
in the arm common platform code.

Change-Id: If6f38e15d1f0e20cea96fff98091da300015d295
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>

show more ...

Workaround for CVE-2017-5715 on NVIDIA Denver CPUs

Flush the indirect branch predictor and RSB on entry to EL3 by issuing
a newly added instruction for Denver CPUs. Support for this operation
can be

Workaround for CVE-2017-5715 on NVIDIA Denver CPUs

Flush the indirect branch predictor and RSB on entry to EL3 by issuing
a newly added instruction for Denver CPUs. Support for this operation
can be determined by comparing bits 19:16 of ID_AFR0_EL1 with 0b0001.

To achieve this without performing any branch instruction, a per-cpu
vbar is installed which executes the workaround and then branches off
to the corresponding vector entry in the main vector table. A side
effect of this change is that the main vbar is configured before any
reset handling. This is to allow the per-cpu reset function to override
the vbar setting.

Change-Id: Ief493cd85935bab3cfee0397e856db5101bc8011
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

show more ...