| ff48086b | 21-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1293 from swarren/issue-551-followup
Don't make build results depend on dependency files |
| 60bb5258 | 21-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1294 from iwishguo/master
Change PLATFORM_ROOT to TF_PLATFORM_ROOT |
| 6d8db46b | 21-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1314 from antonio-nino-diaz-arm/an/smccc-header
Rename 'smcc' to 'smccc' |
| 36332806 | 21-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1304 from antonio-nino-diaz-arm/an/fix-copyright
tegra: Use SPDX license identifier |
| 085e80ec | 21-Mar-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Rename 'smcc' to 'smccc'
When the source code says 'SMCC' it is talking about the SMC Calling
Convention. The correct acronym is SMCCC. This affects a few definitions
and file names.
Some files hav
Rename 'smcc' to 'smccc'
When the source code says 'SMCC' it is talking about the SMC Calling
Convention. The correct acronym is SMCCC. This affects a few definitions
and file names.
Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S)
but the old files have been kept for compatibility, they include the
new ones with an ERROR_DEPRECATED guard.
Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 0d3feba9 | 19-Mar-2018 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Trusty: Fix sanity check on NS entry point
This patch fixes the sanity check on the non-secure entrypoint value
returned by bl31_plat_get_next_image_ep_info(). This issue has been
reported by Coveri
Trusty: Fix sanity check on NS entry point
This patch fixes the sanity check on the non-secure entrypoint value
returned by bl31_plat_get_next_image_ep_info(). This issue has been
reported by Coverity Scan Online:
CID 264893 (#1 of 1): Dereference null return value (NULL_RETURNS)
Dereferencing a null pointer ns_ep_info.
Change-Id: Ia0f64d8c8b005f042608f1422ecbd42bc90b2fb4
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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|
| ed811260 | 20-Mar-2018 |
danh-arm <dan.handley@arm.com> |
Fix SDEI link in readme.rst |
| 8f3418b9 | 20-Mar-2018 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1316 from davidcunado-arm/dc/version_update
Release v1.5: Update minor version number to 5 |
| cefa8c43 | 20-Mar-2018 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1322 from danh-arm/dh/v1.5-readme
Update readme.rst for v1.5 release |
| 1adde117 | 20-Mar-2018 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1326 from JoelHutton/jh/user_guide_updates
Update user guide |
| bf7008a8 | 19-Mar-2018 |
Joel Hutton <Joel.Hutton@Arm.com> |
Update user guide
Following Out of Box testing for v1.5 release:
Update host OS version to Ubuntu 16.04
Clarify configuration files needed for checkpatch
Add note on using Linaro precom
Update user guide
Following Out of Box testing for v1.5 release:
Update host OS version to Ubuntu 16.04
Clarify configuration files needed for checkpatch
Add note on using Linaro precompiled binaries
Change-Id: Ia4ae61e01128ddff1a288972ddf84b79370fa52c
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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|
| f68d22e8 | 20-Mar-2018 |
Michalis Pappas <mpappas@fastmail.fm> |
qemu: Add support for stack canary protection
Allow qemu users to enable stack protection. Since the virt platform
does not provide an RNG, use a basic, timer-based, canary generation,
similarly to
qemu: Add support for stack canary protection
Allow qemu users to enable stack protection. Since the virt platform
does not provide an RNG, use a basic, timer-based, canary generation,
similarly to FVP.
Increase SRAM size and BL2 size to fit images when stack protection is
enabled.
Notice that stack protection is not enabled by default in qemu.
Fixes ARM-software/tf-issues#568
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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|
| 46e5e035 | 20-Mar-2018 |
Michalis Pappas <mpappas@fastmail.fm> |
Platforms cannot override ENABLE_STACK_PROTECTOR
Include stack_protector's makefile after including platform.mk
to allow platforms override ENABLE_STACK_PROTECTOR
Fixes ARM-software/tf-issues#567
Platforms cannot override ENABLE_STACK_PROTECTOR
Include stack_protector's makefile after including platform.mk
to allow platforms override ENABLE_STACK_PROTECTOR
Fixes ARM-software/tf-issues#567
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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|
| 56bf9407 | 20-Mar-2018 |
Lin Huang <hl@rock-chips.com> |
rockchip/rk3399: save/restore watchdog register correctly
there are two fix for save/restore watchdog register:
1. watchdog plck will shutdown after secure_watchdog_disable(), so need
to save reg
rockchip/rk3399: save/restore watchdog register correctly
there are two fix for save/restore watchdog register:
1. watchdog plck will shutdown after secure_watchdog_disable(), so need
to save register before it and restore after secure_watchdog_enable().
2. need write 0x76 to cnt_restart to keep watchdog alive when restore
watchdog register.
Change-Id: I1f6fbceae22186e3b72a87df6332a110adf37479
Signed-off-by: Lin Huang <hl@rock-chips.com>
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|
| 5b0b7276 | 14-Mar-2018 |
Dan Handley <dan.handley@arm.com> |
Update readme.rst for v1.5 release
Change-Id: Id9bd0c20a5af4f41269a51a675018dcc59e93f6c
Signed-off-by: Dan Handley <dan.handley@arm.com> |
| 39b21d19 | 15-Mar-2018 |
Wang Feng <feng_feng.wang@spreadtrum.com> |
FVP: change the method for translating MPIDR values to a linear indices
x3 will be assigned by the folloing instructions.
So the first instruction is not needed any more.
old method:
(ClusterId *
FVP: change the method for translating MPIDR values to a linear indices
x3 will be assigned by the folloing instructions.
So the first instruction is not needed any more.
old method:
(ClusterId * FVP_MAX_CPUS_PER_CLUSTER)
+ (CPUId * FVP_MAX_PE_PER_CPU)
+ ThreadId
it should be
(ClusterId * FVP_MAX_CPUS_PER_CLUSTER) * FVP_MAX_PE_PER_CPU
+ (CPUId * FVP_MAX_PE_PER_CPU)
+ ThreadId
which can be simplified as:
(ClusterId * FVP_MAX_CPUS_PER_CLUSTER + CPUId) * FVP_MAX_PE_PER_CPU + ThreadId
Signed-off-by: Wang Feng <feng_feng.wang@spreadtrum.com>
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|
| 4a577f96 | 12-Mar-2018 |
David Cunado <david.cunado@arm.com> |
Release v1.5: Update minor version number to 5
Change-Id: Ib215150272acc2ecec43f9b69624ebbbd5d7492d
Signed-off-by: David Cunado <david.cunado@arm.com> |
| fb45044b | 15-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1312 from davidcunado-arm/dc/update_docs
Docs: Update various for v1.5 release |
| 37e1a68e | 08-Feb-2018 |
Jolly Shah <jollys@xilinx.com> |
zynqmp: pm: Minor corrections for MISRA compliance
Various changes to comply with MISRA static analysis rules
Signed-off-by: Jolly Shah <jollys@xilinx.com> |
| cc974c52 | 22-Feb-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm_service: Support multiple SDIO modes
Existing database allows to set only single mode for SDIO.
SDIO can have different groups (8 bit, 4 bit and 1 bit).
As there is only single SDIO group
zynqmp: pm_service: Support multiple SDIO modes
Existing database allows to set only single mode for SDIO.
SDIO can have different groups (8 bit, 4 bit and 1 bit).
As there is only single SDIO group in each pin, it is not
possible to use different mode groups for SDIO.
Extend database in generic way to allow multiuple function
groups in single pin. Add different SDIO groups to pins and
create separate functions for each modes.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
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|
| f134200f | 15-Feb-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm: Support ATF PM version check
Add SMC call to query ATF PM version. This version
can be used by Linux to match with expected version.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> |
| 96d69865 | 07-Feb-2018 |
Jolly Shah <jollys@xilinx.com> |
zynqmp: pm: Update API version to 1.0
With new EEMI APIs addition, version is updated to 1.0
Signed-off-by: Jolly Shah <jollys@xilinx.com> |
| 3077f8d9 | 30-Jan-2018 |
Jolly Shah <jollys@xilinx.com> |
zynqmp: Use DDR memory when DEBUG is enabled
Define default DDR location to which ATF has to compiled
if DEBUG option is enabled. This is required now, as the ATF cant fit
in OCM with DEBUG option e
zynqmp: Use DDR memory when DEBUG is enabled
Define default DDR location to which ATF has to compiled
if DEBUG option is enabled. This is required now, as the ATF cant fit
in OCM with DEBUG option enabled. The default value is 0x1000 and can be
used till 0x7ffff. User can still override as per wish/requirement
using current commandline options.
Signed-off-by: Jolly Shah <jollys@xilinx.com>
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|
| bd99265b | 30-Jan-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm: Add APIs for pin control queries
Add pin control APIs which driver can use to query
pin information from firmware. Using these APIs,
driver do not need to maintain hard-coded pin databas
zynqmp: pm: Add APIs for pin control queries
Add pin control APIs which driver can use to query
pin information from firmware. Using these APIs,
driver do not need to maintain hard-coded pin database.
Major changes in patch are:
- Add pin database with pins, functions and function groups
information
- Implement APIs for pin information queries
- Update pin control APIs for get/set functions to use new
pin control database. Remove pin database which was added
earlier.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
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|
| 63eb7a36 | 17-Jan-2018 |
Rajan Vaja <rajan.vaja@xilinx.com> |
zynqmp: pm: Add IOCTLs for global storage access
Add IOCTLs to read/write global general storage and
persistent global general storage registers access.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com
zynqmp: pm: Add IOCTLs for global storage access
Add IOCTLs to read/write global general storage and
persistent global general storage registers access.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
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|