Merge pull request #1505 from Yann-lms/mmc_delays

mmc: add required delays when retrying commands

Replace stdio.h functions by TF functions

Functions provided by stdio.h such as printf and sprintf are available
in the codebase, but they add a lot of code to the final image if they
are used:

- A

Replace stdio.h functions by TF functions

Functions provided by stdio.h such as printf and sprintf are available
in the codebase, but they add a lot of code to the final image if they
are used:

- AArch64: ~4KB
- AArch32: ~2KB in T32, ~3KB in A32

tf_printf and tf_snprintf are a lot more simple, but it is preferable
to use them when possible because they are also used in common code.

Change-Id: Id09fd2b486198fe3d79276e2c27931595b7ba60e
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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tf_snprintf: Add support for '%s'

Change-Id: Ia3a159444e638f63de7dc5a6a4b76169c757188a
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1513 from antonio-nino-diaz-arm/an/xlat-caches

xlat v2: Cleanup and dcache coherency bug fix

xlat v2: Flush xlat tables after being modified

During cold boot, the initial translation tables are created with data
caches disabled, so all modifications go to memory directly. After the
MMU is e

xlat v2: Flush xlat tables after being modified

During cold boot, the initial translation tables are created with data
caches disabled, so all modifications go to memory directly. After the
MMU is enabled and data cache is enabled, any modification to the tables
goes to data cache, and eventually may get flushed to memory.

If CPU0 modifies the tables while CPU1 is off, CPU0 will have the
modified tables in its data cache. When CPU1 is powered on, the MMU is
enabled, then it enables coherency, and then it enables the data cache.
Until this is done, CPU1 isn't in coherency, and the translation tables
it sees can be outdated if CPU0 still has some modified entries in its
data cache.

This can be a problem in some cases. For example, the warm boot code
uses only the tables mapped during cold boot, which don't normally
change. However, if they are modified (and a RO page is made RW, or a XN
page is made executable) the CPU will see the old attributes and crash
when it tries to access it.

This doesn't happen in systems with HW_ASSISTED_COHERENCY or
WARMBOOT_ENABLE_DCACHE_EARLY. In these systems, the data cache is
enabled at the same time as the MMU. As soon as this happens, the CPU is
in coherency.

There was an attempt of a fix in psci_helpers.S, but it didn't solve the
problem. That code has been deleted. The code was introduced in commit
<264410306381> ("Invalidate TLB entries during warm boot").

Now, during a map or unmap operation, the memory associated to each
modified table is flushed. Traversing a table will also flush it's
memory, as there is no way to tell in the current implementation if the
table that has been traversed has also been modified.

Change-Id: I4b520bca27502f1018878061bc5fb82af740bb92
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1501 from robertovargas-arm/cci

cci: Wait before reading status register

Add librom support in FVP

Change-Id: Idb9ba3864d6de3053260724f07172fd32c1523e0
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

Merge pull request #1512 from npoushin/integration

Add support for Arm System Guidance for Mobile fixed virtual platform

xlat v2: Cleanup get/change mem attr helpers

Changed the names for consistency with the rest of the library. Introduced
new helpers that manipulate the active translation tables context.

Change-Id:

xlat v2: Cleanup get/change mem attr helpers

Changed the names for consistency with the rest of the library. Introduced
new helpers that manipulate the active translation tables context.

Change-Id: Icaca56b67fcf6a96e88aa3c7e47411162e8e6856
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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plat/arm: Add support for SGM775

Add support for System Guidance for Mobile platform SGM775

Change-Id: I2442a50caae8f597e5e5949cd48f695cf75d9653
Signed-off-by: Nariman Poushin <nariman.poushin@lina

plat/arm: Add support for SGM775

Add support for System Guidance for Mobile platform SGM775

Change-Id: I2442a50caae8f597e5e5949cd48f695cf75d9653
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>

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css_pm_scmi: optimise cpu suspend to remove redundant scmi call

In css platforms where the cpu/cluster management is done by the hardware,
software does need to issue certain scmi requests.

This pa

css_pm_scmi: optimise cpu suspend to remove redundant scmi call

In css platforms where the cpu/cluster management is done by the hardware,
software does need to issue certain scmi requests.

This patch wraps those scmi calls around the HW_ASSISTED_COHERENCY
build option to remove them on platforms that have this hardware support.

Change-Id: Ie818e234484ef18549aa7f977aef5c3f0fc26c27
Signed-off-by: Deepak Pandey <Deepak.Pandey@arm.com>
Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>

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plat/arm: tzc_dmc500: Add missing plat_arm.h include

This omission causes a build error as the definition for
arm_tzc_regions_info_t is needed from plat_arm.h

Change-Id: I26935ee90d3e36ab6a016ff2c4

plat/arm: tzc_dmc500: Add missing plat_arm.h include

This omission causes a build error as the definition for
arm_tzc_regions_info_t is needed from plat_arm.h

Change-Id: I26935ee90d3e36ab6a016ff2c4eee4413df3e4e8
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>

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plat/arm: css: Set MT bit in incoming mpidr arugments

Change-Id: I278d6876508800abff7aa2480910306a24de5378
Signed-off-by: Nariman Poushin <nariman.poushin@linaro.org>

Merge pull request #1511 from chandnich/sgi575-updates

Sgi575 updates

plat/sgi: switch to using scmi

The Arm SGI platforms can switch to using SCMI. So enable support for
SCMI and remove portions of code that would be unused after switching
to SCMI.

Change-Id: Ifd9e1

plat/sgi: switch to using scmi

The Arm SGI platforms can switch to using SCMI. So enable support for
SCMI and remove portions of code that would be unused after switching
to SCMI.

Change-Id: Ifd9e1c944745f703da5f970b5daf1be2b07ed14e
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>

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sgi: disable CPU power down bit in reset handler

On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1'
register requires an explicit write to clear it for hotplug and
idle to function correc

sgi: disable CPU power down bit in reset handler

On SGI platforms, the 'CORE_PWRDN_EN' bit of 'CPUPWRCTLR_EL1'
register requires an explicit write to clear it for hotplug and
idle to function correctly. The reset value of this bit is zero
but it still requires this explicit clear to zero. This indicates
that this could be a model related issue but for now this issue can
be fixed be clearing the CORE_PWRDN_EN in the platform specific
reset handler function.

Change-Id: I4222930daa9a3abacdace6b7c3f4a5472ac0cb19
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>

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Add support for romlib in the build system

Romlib is a new image that is stored in ROM and contains the code of
several libraries that can be shared between different images. All
the functions withi

Add support for romlib in the build system

Romlib is a new image that is stored in ROM and contains the code of
several libraries that can be shared between different images. All
the functions within in the library are accessed using a jump table
which allows to update the romlib image whithout changing the binary
compatibility. This jump table can be also stored in RAM and it can
allow to patch a romlib with potential bugs fixes..

Change-Id: If980ccdaca24b7aaca900e32acc68baf6f94ab35
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Add atexit function to libc

We had exit but we didn't have atexit, and we were calling panic and
tf_printf from exit, which generated a dependency from exit to them.
Having atexit allows to set a di

Add atexit function to libc

We had exit but we didn't have atexit, and we were calling panic and
tf_printf from exit, which generated a dependency from exit to them.
Having atexit allows to set a different function pointer in every image.

Change-Id: I95b9556d680d96249ed3b14da159b6f417da7661
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Don't include mbebtls include paths in INCLUDES

Mbebtls include paths are controlled by the user using the variable
MBEDTLS_DIR and they are out of the TF source tree. Since these
includes have a di

Don't include mbebtls include paths in INCLUDES

Mbebtls include paths are controlled by the user using the variable
MBEDTLS_DIR and they are out of the TF source tree. Since these
includes have a different origin it is better to move them to a
different variable.

This change makes easier for the romlib Makefile to parse the include
paths.

Change-Id: I3e4c99300f1012bc7f88c6b9f5bc0ec1f7b5aa8d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Create a library file for libmbedtls

TF Makefile was linking all the objects files generated for the
Mbed TLS library instead of creating a static library that could be
used in the linking stage.

C

Create a library file for libmbedtls

TF Makefile was linking all the objects files generated for the
Mbed TLS library instead of creating a static library that could be
used in the linking stage.

Change-Id: I8e4cd843ef56033c9d3faeee71601d110b7e4c12
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Create a library file for libc

TF Makefile was linking all the objects files generated for the
c library instead of creating a static library that could be
used in the linking stage.

Change-Id: I72

Create a library file for libc

TF Makefile was linking all the objects files generated for the
c library instead of creating a static library that could be
used in the linking stage.

Change-Id: I721daea097e9b13cbb42c9f8eaa2af8fea0799cf
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Create a library file for libfdt

TF Makefile was linking all the objects files generated for the
fdt library instead of creating a static library that could be
used in the linking stage.

Change-Id:

Create a library file for libfdt

TF Makefile was linking all the objects files generated for the
fdt library instead of creating a static library that could be
used in the linking stage.

Change-Id: If3705bba188ec39e1fbf2322a7f2a9a941e1b90d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Add make macros to build library archives

This patch adds all the make macros needed to create a library archive
and to use it in the link stage.

Change-Id: I26597bfd6543649d0b68a9b1e06aec1ba353e6d

Add make macros to build library archives

This patch adds all the make macros needed to create a library archive
and to use it in the link stage.

Change-Id: I26597bfd6543649d0b68a9b1e06aec1ba353e6de
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Merge pull request #1506 from danielboulby-arm/db/SeparateCodeAndROData

Fix build for SEPARATE_CODE_AND_RODATA=0

Merge pull request #1509 from antonio-nino-diaz-arm/an/bool

xlat: psci: Use bool instead of int