| 630cdf79 | 20-Sep-2018 |
Yann Gautier <yann.gautier@st.com> |
aarch32: PAR_ADDR_MASK should explicitly use BIT_64
PAR register used here is a 64 bit register. On AARCH32 BIT macro is BIT_32. PAR_ADDR_MASK should then use BIT_64 to avoid overflow.
Signed-off-b
aarch32: PAR_ADDR_MASK should explicitly use BIT_64
PAR register used here is a 64 bit register. On AARCH32 BIT macro is BIT_32. PAR_ADDR_MASK should then use BIT_64 to avoid overflow.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 1843a199 | 20-Sep-2018 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
User guide: Document ENABLE_SPM build flag
Change-Id: Ib9a045200de4fcd00387b114cbbd006e46ad6a8b Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> |
| 52f6db9e | 20-Sep-2018 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
User guide: Fix link to Linux master tree
Change-Id: Ia67a4786350c1c2ef55125cd6a318ae6d918c08e Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> |
| 62542419 | 19-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1570 from Andre-ARM/allwinner/pmic-fixes
Allwinner PMIC fixes |
| dfc0fb27 | 09-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
drivers: i2c: mentor: move platform code into header files
At the moment we have two I2C stub drivers (for the Allwinner and the Marvell platform), which #include the actual .c driver file. Change t
drivers: i2c: mentor: move platform code into header files
At the moment we have two I2C stub drivers (for the Allwinner and the Marvell platform), which #include the actual .c driver file. Change this into the more usual design, by renaming and moving the stub drivers into platform specific header files and including these from the actual driver file. The platform specific include directories make sure the driver picks up the right header automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| d301b88b | 18-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1577 from antonio-nino-diaz-arm/an/trusty
trusty: Fix return value of trusty_init() |
| 4b8f7bf0 | 18-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1576 from antonio-nino-diaz-arm/an/fix-bl32-init
BL31: Fix warning about BL32 init function |
| 28441f94 | 18-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1575 from soby-mathew/sm/fix_cryptocell_mem
ARM platforms: Reintroduce coherent memory for BL1 and BL2 |
| 0153806b | 18-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
trusty: Fix return value of trusty_init()
The value used to signal failure is 0. It is needed to return a different value on success.
Change-Id: I2186aa7dfbfc825bfe7b3d5ae3c4de7af10ee44f Signed-off
trusty: Fix return value of trusty_init()
The value used to signal failure is 0. It is needed to return a different value on success.
Change-Id: I2186aa7dfbfc825bfe7b3d5ae3c4de7af10ee44f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 943bb7f8 | 18-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
ARM platforms: Reintroduce coherent memory for BL1 and BL2
The patch d323af9 removed the support for coherent memory in BL1 and BL2 for ARM platforms. But the CryptoCell SBROM integration depends o
ARM platforms: Reintroduce coherent memory for BL1 and BL2
The patch d323af9 removed the support for coherent memory in BL1 and BL2 for ARM platforms. But the CryptoCell SBROM integration depends on use of coherent buffers for passing data from the AP CPU to the CryptoCell. Hence this patch reintroduces support for coherent memory in BL1 and BL2 if ARM_CRYPTOCELL_INTEG=1.
Change-Id: I011482dda7f7a3ec9e3e79bfb3f4fa03796f7e02 Signed-Off-by: Soby Mathew <soby.mathew@arm.com>
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| 74ad948f | 18-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
BL31: Fix warning about BL32 init function
The expected value for failure is 0, so the warning only has to be shown in that case. This is the way the TSPD has done it since it was introduced, and th
BL31: Fix warning about BL32 init function
The expected value for failure is 0, so the warning only has to be shown in that case. This is the way the TSPD has done it since it was introduced, and the way SPM and OP-TEE do it.
Trusty wrongly returns 0 on success.
In the case of TLK, the return value of tlkd_init() is passed from the secure world in register X1 when calling the SMC TLK_ENTRY_DONE.
Change-Id: I39106d67631ee57f109619f8830bf4b9d96155e6 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 159c5249 | 08-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: sun50i_h6: initialise I2C just before powering down
Even though we initialise the platform part and the I2C controller itself at boot time, we actually only access the bus on power down.
allwinner: sun50i_h6: initialise I2C just before powering down
Even though we initialise the platform part and the I2C controller itself at boot time, we actually only access the bus on power down. Meanwhile a rich OS might have configured the I2C pins differently or even disabled the controller. So repeat the platform setup and controller initialisation just before we actually access the bus to power off the system. This is safe, because at this point the rich OS should no longer be running.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 1a910bce | 08-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: sun50i_h6: improve I2C setup
Drop the unnecessary check for the I2C pins being already configured as I2C pins (we actually don't care). Also avoid resetting *every* peripheral that is cov
allwinner: sun50i_h6: improve I2C setup
Drop the unnecessary check for the I2C pins being already configured as I2C pins (we actually don't care). Also avoid resetting *every* peripheral that is covered by the PRCM reset controller, instead just clear the one line connected to the I2C controller.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| e52ed092 | 12-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1572 from iq250vip/tf_log
Allow setting log level back to compile time value |
| 2adb7867 | 10-Sep-2018 |
Junhan Zhou <Junhan@mellanox.com> |
Allow setting log level back to compile time value
When using the tf_log_set_max_level() function, one can dynamically set the log level to a value smaller than then compile time specified one, but
Allow setting log level back to compile time value
When using the tf_log_set_max_level() function, one can dynamically set the log level to a value smaller than then compile time specified one, but not equal. This means that when the log level have been lowered, it can't be reset to the previous value. This commit modifies this function to allow setting the log level back to the compile time value.
Fixes ARM-software/tf-issues#624
Change-Id: Ib157715c8835982ce4977ba67a48e18ff23d5a61 Signed-off-by: Junhan Zhou <Junhan@mellanox.com>
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| 072063bc | 11-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1571 from jeenu-arm/deps
Update dependencies for ARM TF |
| eb19da93 | 19-Dec-2017 |
David Cunado <david.cunado@arm.com> |
Update dependencies for ARM TF
- Linaro binaries: 18.04 - mbed TLS library: 2.12.0 - FVP model versions: 11.4 build 37
This patch updates the user guide documentation to reflect these changes
Update dependencies for ARM TF
- Linaro binaries: 18.04 - mbed TLS library: 2.12.0 - FVP model versions: 11.4 build 37
This patch updates the user guide documentation to reflect these changes to the dependencies.
Change-Id: I454782ca43a0db43aeeef2ab3622f4dea9dfec55 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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| 441b1e8d | 10-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1569 from soby-mathew/sm/cov_fix_scmi
CSS: Fix overrun if system power level is not available |
| 4728900f | 10-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1568 from soby-mathew/sm/fix_ares_err_report
Fix the Cortex-ares errata reporting function name |
| 66ec7121 | 10-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Fix the Cortex-ares errata reporting function name
This patch fixes the name of the Cortex-ares errata function which was previously named `cortex_a72_errata_report` which was an error.
Change-Id:
Fix the Cortex-ares errata reporting function name
This patch fixes the name of the Cortex-ares errata function which was previously named `cortex_a72_errata_report` which was an error.
Change-Id: Ia124df4628261021baa8d9a30308bc286d45712b Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| d4ee9aa6 | 10-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
CSS: Fix overrun if system power level is not available
This patch fixes an array overrun in CSS scmi driver if the system power domain level is less than 2. This was reported from https://scan.cove
CSS: Fix overrun if system power level is not available
This patch fixes an array overrun in CSS scmi driver if the system power domain level is less than 2. This was reported from https://scan.coverity.com/projects/arm-software-arm-trusted-firmware
CID 308492
Change-Id: I3a59c700490816718d20c71141281f19b2b7e7f7 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 82426599 | 10-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1555 from theopolis/tbb-hikey960
hikey960: Add development TBB support |
| e636812d | 10-Sep-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1534 from Icenowy/sun50i_h6_pmic
Add support for Allwinner H6 + X-Powers AXP805 PMIC combination |
| 745d8a82 | 03-Sep-2018 |
Teddy Reed <teddy@casualhacking.io> |
hikey960: Add development TBB support
This patch adds experimental support for TBB to the HiKey960 board. To build and test with TBB modify the uefi-tools project platforms.config
+ATF_BUILDFLAGS=T
hikey960: Add development TBB support
This patch adds experimental support for TBB to the HiKey960 board. To build and test with TBB modify the uefi-tools project platforms.config
+ATF_BUILDFLAGS=TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 SAVE_KEYS=1 \ MBEDTLS_DIR=./mbedtls
Signed-off-by: Teddy Reed <teddy@casualhacking.io>
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| ba72b196 | 08-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1567 from jeenu-arm/ras-fix
RAS: Fix assert condition |