Tegra: define CACHE_WRITEBACK_GRANULE for scatterfile

The scatterfile to support armlink, does not seem to support
shift operator. To handle this define CACHE_WRITEBACK_GRANULE with
the direct value

Tegra: define CACHE_WRITEBACK_GRANULE for scatterfile

The scatterfile to support armlink, does not seem to support
shift operator. To handle this define CACHE_WRITEBACK_GRANULE with
the direct value.

Change-Id: I19afc7cb9c55a08cb0703f284d91018d3214353f
Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>

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maintainers: Fix broken links to some Github accounts

Change-Id: I89a451fa22d517f9c59dfa0a74f28deb6d750b8f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

trusty: Require dynamic translation tables

Trusty requires dynamic translation tables support, so the makefile of
Trusty itself should request it. Not doing so causes platforms such as
FVP to fail t

trusty: Require dynamic translation tables

Trusty requires dynamic translation tables support, so the makefile of
Trusty itself should request it. Not doing so causes platforms such as
FVP to fail to build with Trusty. Other platforms like Tegra still build
because they use dynamic translation tables by default.

Change-Id: Id67d3b9e1f7d0547fa81e81cefa3faf1e0e6f876
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1785 from vwadekar/tf2.0-tegra-downstream-rebase-1.25.19

Tf2.0 tegra downstream rebase 1.25.19

Merge pull request #1805 from antonio-nino-diaz-arm/an/generic-timer

drivers: generic_delay_timer: Assert presence of Generic Timer

drivers: generic_delay_timer: Assert presence of Generic Timer

The Generic Timer is an optional extension to an ARMv7-A implementation.
The generic delay timer can be used from any architecture supp

drivers: generic_delay_timer: Assert presence of Generic Timer

The Generic Timer is an optional extension to an ARMv7-A implementation.
The generic delay timer can be used from any architecture supported by
the Trusted Firmware. In ARMv7 it is needed to check that this feature
is present. In ARMv8 it is always present.

Change-Id: Ib7e8ec13ffbb2f64445d4ee48ed00f26e34b79b7
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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docs: add Tegra186 information to nvidia-tegra.rst

This patch adds information about the Tegra186 platforms to the
docs.

Change-Id: I69525c60a0126030dc15505ec7f02ccf8250be6f
Signed-off-by: Varun Wa

docs: add Tegra186 information to nvidia-tegra.rst

This patch adds information about the Tegra186 platforms to the
docs.

Change-Id: I69525c60a0126030dc15505ec7f02ccf8250be6f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra186: remove ENABLE_AFI_DEVICE macro usage

This patch removes this macro and its usage as it is used only
within the Tegra186 files and all derived platforms keep the
macro enabled.

Change-Id:

Tegra186: remove ENABLE_AFI_DEVICE macro usage

This patch removes this macro and its usage as it is used only
within the Tegra186 files and all derived platforms keep the
macro enabled.

Change-Id: Ib831b3c002ba4dedc3d5fafbb7d321daa28fa9ea
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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spd: trusty: memmap trusty's code memory before peeking

This patch dynamically maps the first page of trusty's code memory,
before accessing it to find out if we are running a 32-bit or 64-bit
image

spd: trusty: memmap trusty's code memory before peeking

This patch dynamically maps the first page of trusty's code memory,
before accessing it to find out if we are running a 32-bit or 64-bit
image.

On Tegra platforms, this means we have to increase the mappings to
accomodate the new memmap entry.

Change-Id: If370d1e6cfcccd69b260134c1b462d8d17bee03d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: initialise per-CPU GIC interface(s)

This patch initilises the per-CPU GIC bits during cold boot and
secondary CPU power up. Commit 80c50ee accidentally left out this
part.

Change-Id: I73ce59

Tegra: initialise per-CPU GIC interface(s)

This patch initilises the per-CPU GIC bits during cold boot and
secondary CPU power up. Commit 80c50ee accidentally left out this
part.

Change-Id: I73ce59dbc83580a84b827cab89fe7e1f65f9f130
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: spe: prepend '\r' to '\n'

This patch udpates the SPE console driver to prepend '\r' to
'\n'. This fixes the alignment of prints seen by the host
machines on their UART ports.

Tested by colle

Tegra: spe: prepend '\r' to '\n'

This patch udpates the SPE console driver to prepend '\r' to
'\n'. This fixes the alignment of prints seen by the host
machines on their UART ports.

Tested by collecting the logs from host PC using Cutecom

Reported by: Mustafa Bilgen <mbilgen@nvidia.com>

Change-Id: I6e0b412bd71ff5eb889582071df8c157da5175ed
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: Enable irq as wake-up event for cpu_standby

As per ARM ARM D1.17.2, any physical IRQ interrupt received by the PE
will be treated as a wake-up event, if SCR_EL3.IRQ is set to '1',
irrespectiv

Tegra: Enable irq as wake-up event for cpu_standby

As per ARM ARM D1.17.2, any physical IRQ interrupt received by the PE
will be treated as a wake-up event, if SCR_EL3.IRQ is set to '1',
irrespective of the value of the PSTATE.I bit value.

This patch programs the SCR_EL3.IRQ bit before entering CPU standby
state, to allow an IRQ to wake the PE. On waking up, the previous
SCR_EL3 value is restored.

Change-Id: Ie81cf3a7668f5ac35f4bf2ecc461b91b9b60650c
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>

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Tegra: remove unused libc files from makefile

This patch redefines the variable LIBC_SRCS for Tegra platforms,
to remove unused libc files from the list. This patch is a building
block to eventually

Tegra: remove unused libc files from makefile

This patch redefines the variable LIBC_SRCS for Tegra platforms,
to remove unused libc files from the list. This patch is a building
block to eventually use other libc implementations in the future.

Change-Id: Iccde5a75f5e2d6f4e2dbc6274beb423b80e846fd
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Introduce build option to override libc

This patch introduces a build option 'OVERRIDE_LIBC' that platforms
can set to override libc from the BL image. The default value is '0'
to keep the library.

Introduce build option to override libc

This patch introduces a build option 'OVERRIDE_LIBC' that platforms
can set to override libc from the BL image. The default value is '0'
to keep the library.

Change-Id: I10a0b247f6a782eeea4a0359e30a8d79b1e9e4e1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #1804 from antonio-nino-diaz-arm/an/cleanup

Minor cleanup

Merge pull request #1806 from thomas-arm/master

sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms

sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms

Add a second maintainer for Arm's SGI and SGM platform support in
trusted firmware to handle the review and maintenance of
existing a

sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms

Add a second maintainer for Arm's SGI and SGM platform support in
trusted firmware to handle the review and maintenance of
existing and upcoming platforms.

Change-Id: Ie7fa8da280d9351f7543122fb261d6ac6c7e15ad
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>

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Merge pull request #1799 from soby-mathew/sm/gicr_probe

GICv3: Allow probe for fewer GICR interfaces than exposed by the frame

Merge pull request #1783 from thloh85-intel/integration_v2

plat: intel: Add BL2 support for Stratix 10 SoC

GICv3: Allow probe for fewer GICR interfaces than exposed by the frame

Previously the GICv3 redistributor probe function
(gicv3_rdistif_base_addrs_probe()) asserted that the number of
per-CPU redist

GICv3: Allow probe for fewer GICR interfaces than exposed by the frame

Previously the GICv3 redistributor probe function
(gicv3_rdistif_base_addrs_probe()) asserted that the number of
per-CPU redistributor interfaces expected to be probed by the
platform is equal to the number exported by the redistributor
frame. This is a problem in case the number of CPUs in the
platform is less than the number of redistributor interfaces
in the frame. Hence this patch removes the assertion check
and allows probe for fewer redistributor interfaces as required
by the platform.

Change-Id: I3449763a3ad70817224442cbe184d001030c9874
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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Merge pull request #1803 from sandrine-bailleux-arm/sb/arm-bl33-fixes

Fixes related to BL33 image on Arm platforms

Merge pull request #1796 from grandpaul/rpi3-sdhost-driver

RPi3 SDHost driver

plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scru

plat: intel: Add BL2 support for Stratix 10 SoC

This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>

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Remove unneeded include paths in PLAT_INCLUDES

Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antoni

Remove unneeded include paths in PLAT_INCLUDES

Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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xlat v2: Fix comment

Change-Id: Id7c22d76b896d1dcac18cdb0e564ce4e02583e33
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>