cpus: Fix Cortex-A12 MIDR mask

The Cortex-A12's primary part number is 0xC0D not 0xC0C, so
fix that to make the A12's cpu operations findable.

Change-Id: I4440a039cd57a2fe425fd8a8ec5499ca8e895e31
S

cpus: Fix Cortex-A12 MIDR mask

The Cortex-A12's primary part number is 0xC0D not 0xC0C, so
fix that to make the A12's cpu operations findable.

Change-Id: I4440a039cd57a2fe425fd8a8ec5499ca8e895e31
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

show more ...

plat: imx8m: remove deprecated code include

The 'drivers/console/aarch64/console.S' is not needed,
so remove it from build to fix the build error when
'ERROR_DEPRECATED'set.

Change-Id: Id047a355f82

plat: imx8m: remove deprecated code include

The 'drivers/console/aarch64/console.S' is not needed,
so remove it from build to fix the build error when
'ERROR_DEPRECATED'set.

Change-Id: Id047a355f82fd33298b7e2b49eff289d28eb5b56
Signed-off-by: Jacky Bai <ping.bai@nxp.com>

show more ...

Fix restoration of PAuth context

Replace call to pauth_context_save() with pauth_context_restore()
in case of unknown SMC call.

Change-Id: Ib863d979faa7831052b33e8ac73913e2f661f9a0
Signed-off-by: A

Fix restoration of PAuth context

Replace call to pauth_context_save() with pauth_context_restore()
in case of unknown SMC call.

Change-Id: Ib863d979faa7831052b33e8ac73913e2f661f9a0
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

show more ...

plat: marvell: do not rely on argument passed via smc

There is no need to rely on x1 argument.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Change-Id: Ie7766e801e724801b42b66331ba252ede5744a

plat: marvell: do not rely on argument passed via smc

There is no need to rely on x1 argument.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Change-Id: Ie7766e801e724801b42b66331ba252ede5744a2c

show more ...

plat: marvell: sip: make sure that comphy init will use correct address

The argument passed via x1 is used as a base address for comphy related
routines. Nevertheless validation of this address wasn

plat: marvell: sip: make sure that comphy init will use correct address

The argument passed via x1 is used as a base address for comphy related
routines. Nevertheless validation of this address wasn't good enough and
allowed some non comphy related addresses to slip over.

To overcome this issue make sure that the address passed via SMC points
to valid CP range and allow to proceed comphy initializations only with
correct comphy offset.

This could be fixed in a different way e.g. by passing CP id from the
caller, but since this API is already used with various Linux, U-Boot
and UEFI versions it can't be changed.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Change-Id: Ia74dbc36efcfbefc4a102d31191e6af5808c4a82

show more ...

aarch32: Allow compiling with soft-float toolchain

ARMv7 and Cortex-A32(ARMv8/aarch32) uses "arm-linux-gnueabi" toolchain which
has both soft-float and hard-float variants and so there could be scen

aarch32: Allow compiling with soft-float toolchain

ARMv7 and Cortex-A32(ARMv8/aarch32) uses "arm-linux-gnueabi" toolchain which
has both soft-float and hard-float variants and so there could be scenarios
where soft-float toolchain is used.Even though TF-A documentation recommends
to use hard-float toolchain for aarch32 but there are external projects where
we cannot mandate the selection of toolchain and for those projects at least
the build should not fail.

Current TF-A source fails to build with soft-float toolchain because assembler
does not recognizes "vmsr" instruction which is required to enable floating
point unit.

To avoid this piece of code being compiled with soft-float toolchain add
predefined macro guard " __SOFTFP__" exposed by soft-float toolchain.

Change-Id: I76ba40906a8d622dcd476dd36ab4d277a925996c
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>

show more ...

doc: Fix heading levels for changelog

The change-log.rst file does not use the same symbols
as the other documents when organising its headings,
sub-headings and so on. In order to compile these
doc

doc: Fix heading levels for changelog

The change-log.rst file does not use the same symbols
as the other documents when organising its headings,
sub-headings and so on. In order to compile these
documents together with Sphinx, forming a top-level
index and a consistent structure, it is necessary to
normalise these.

Change-Id: Ib4620ff03a9e76fec9e36e95549016c7b3fe12bb
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

show more ...

Merge pull request #1920 from ambroise-arm/av/deprecated

Remove deprecated interfaces

Makefile: remove extra include paths in INCLUDES

Now it is needed to use the full path of the common header files.

Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more
informatio

Makefile: remove extra include paths in INCLUDES

Now it is needed to use the full path of the common header files.

Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more
information.

Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

show more ...

Remove deprecated interfaces

Change-Id: I14fcabbdfd53153d1d5f187f6f8b23a045794408
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

tzc: remove deprecated types

Types tzc_action_t and tzc_region_attributes_t are deprecated.

Change-Id: Ieefeb8521a0e1130f39d09b5c0d2728f05084773
Signed-off-by: Ambroise Vincent <ambroise.vincent@ar

tzc: remove deprecated types

Types tzc_action_t and tzc_region_attributes_t are deprecated.

Change-Id: Ieefeb8521a0e1130f39d09b5c0d2728f05084773
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

show more ...

Console: remove deprecated finish_console_register

The old version of the macro is deprecated.

Commit cc5859ca19ff ("Multi-console: Deprecate the
`finish_console_register` macro") provides more det

Console: remove deprecated finish_console_register

The old version of the macro is deprecated.

Commit cc5859ca19ff ("Multi-console: Deprecate the
`finish_console_register` macro") provides more details.

Change-Id: I3d1cdf6496db7d8e6cfbb5804f508ff46ae7e67e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

show more ...

Remove deprecated plat_crash_console_*

The default implementations are defined in crash_console_helpers.S. The
platforms have to define plat_crash_console_*.

Implemented placeholders for platforms

Remove deprecated plat_crash_console_*

The default implementations are defined in crash_console_helpers.S. The
platforms have to define plat_crash_console_*.

Implemented placeholders for platforms that were missing helpers.

Change-Id: Iea60b6f851956916e421dfd8c34a62d96eb9148e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

show more ...

Merge pull request #1917 from marex/arm/master/v3meagle-v2.0.1

rcar_gen3: plat: Add R-Car V3M support

Merge pull request #1916 from antonio-nino-diaz-arm/an/spm-xlat

SPM: Some improvements to xlat handling code

Merge pull request #1918 from lmayencourt/lm/contrib_guidelines

doc: Update contribution guidelines

Merge pull request #1915 from repk/gxl

Add support for Amlogic s905x (GXL)

SPM: Adjust size of virtual address space per partition

Rather than using a fixed virtual address space size, read all regions
in the resource description of each partition and restrict the virtual

SPM: Adjust size of virtual address space per partition

Rather than using a fixed virtual address space size, read all regions
in the resource description of each partition and restrict the virtual
address space size to the one the partition actually needs.

This also allows SPM to take advantage of the extension ARMv8.4-TTST if
the virtual address space size is small enough.

Change-Id: I8646aa95e659136b58b44b040364cdee631f7e82
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

show more ...

SPM: Refactor xlat context creation

Right now the virtual address space is fixed to
PLAT_VIRT_ADDR_SPACE_SIZE, so all base translation tables are the same
size and need the same alignment. The curre

SPM: Refactor xlat context creation

Right now the virtual address space is fixed to
PLAT_VIRT_ADDR_SPACE_SIZE, so all base translation tables are the same
size and need the same alignment. The current code allocates the exact
space needed by this initial table.

However, a following patch is going to allow each partition to choose
the size of its address space based on the memory regions defined in
their resource description, so it isn't possible to determine this at
build time. As this optimization no longer applies, it has to be
removed.

Change-Id: Ia8d19f4981e1017e4ffe0ba136de73d701044cb0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

show more ...

SPM: Move shim layer to TTBR1_EL1

This gives each Secure Partition complete freedom on its address space.
Previously, the memory used by the exception vectors was reserved and
couldn't be used. Also

SPM: Move shim layer to TTBR1_EL1

This gives each Secure Partition complete freedom on its address space.
Previously, the memory used by the exception vectors was reserved and
couldn't be used. Also, it always had to be mapped, forcing SPM to
generate translation tables that included the exception vectors as well
as the Partition memory regions. With this change, partitions can reduce
their address space size easily.

Change-Id: I67fb5e9bdf2870b73347f23bff702fab0a8f8711
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

show more ...

doc: Update contribution guidelines

Update the documentation for trustedfirmware.org migration

Change-Id: Ibb7052b0becbec3326164f1503806ca2c2fd4dcc
Signed-off-by: Louis Mayencourt <louis.mayencourt

doc: Update contribution guidelines

Update the documentation for trustedfirmware.org migration

Change-Id: Ibb7052b0becbec3326164f1503806ca2c2fd4dcc
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

show more ...

plat: gxl: Add documentation on building GXL image

Also adds a maintainer for GXL.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>

meson/gxl: Add tool to create bl31 bootable images

GXL platforms need to have a specific header at the beginning of bl31
image to be able to boot. This adds a tool to create that and calls it at
bui

meson/gxl: Add tool to create bl31 bootable images

GXL platforms need to have a specific header at the beginning of bl31
image to be able to boot. This adds a tool to create that and calls it at
build time.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>

show more ...

meson/gxl: Configure and boot SCP

On Amlogic gxl (s905x) SOC, in order to use SCP, bl31 has to send bl30
and bl301 firmware along with their SHA256 hash over scpi.

Signed-off-by: Remi Pommarel <rep

meson/gxl: Configure and boot SCP

On Amlogic gxl (s905x) SOC, in order to use SCP, bl31 has to send bl30
and bl301 firmware along with their SHA256 hash over scpi.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>

show more ...

meson/gxl: Add support for SHA256 DMA engine

In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility th

meson/gxl: Add support for SHA256 DMA engine

In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility that could be used to offload SHA-256
computations. This adds basic support of this hardware SHA-256
engine.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>

show more ...