stm32mp1: add OP-TEE support

Support booting OP-TEE as BL32 boot stage and secure runtime
service.

OP-TEE executes in internal RAM and uses a secure DDR area to store
the pager pagestore. Memory ma

stm32mp1: add OP-TEE support

Support booting OP-TEE as BL32 boot stage and secure runtime
service.

OP-TEE executes in internal RAM and uses a secure DDR area to store
the pager pagestore. Memory mapping and TZC are configured accordingly
prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where
a header file describes the effective boot images. This change
post processes header file content to get OP-TEE load addresses
and set OP-TEE boot arguments.

Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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stm32mp1: fix TZC400 configuration against non-secure DDR

This change disables secure accesses to non-secure DDR which are useless.
TF-A already maps non-secure memory with non-secure permissions th

stm32mp1: fix TZC400 configuration against non-secure DDR

This change disables secure accesses to non-secure DDR which are useless.
TF-A already maps non-secure memory with non-secure permissions thanks
to the MMU.

This change also corrects some inline comments.

Change-Id: Id4c20c9ee5c95a666dae6b7446ed80baf2d53fb0
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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stm32mp1: remove useless define

Remove STM32MP_DDR_SPEED_DFLT that is not used in STM32MP1 TF-A code.

Change-Id: I780cdc4e93a8a9d997d50f67cfc582acd4a353d6
Signed-off-by: Yann Gautier <yann.gautier@

stm32mp1: remove useless define

Remove STM32MP_DDR_SPEED_DFLT that is not used in STM32MP1 TF-A code.

Change-Id: I780cdc4e93a8a9d997d50f67cfc582acd4a353d6
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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stm32mp: split stm32mp_io_setup function

A new static function boot_mmc is created to simplify code maintenance
of stm32mp_io_setup.

Change-Id: I5c416e567e7e174fb1c2b435925a983c9c55fc40
Signed-off-

stm32mp: split stm32mp_io_setup function

A new static function boot_mmc is created to simplify code maintenance
of stm32mp_io_setup.

Change-Id: I5c416e567e7e174fb1c2b435925a983c9c55fc40
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes from topic "aa-sbsa-watchdog" into integration

* changes:
plat/arm: introduce wrapper functions to setup secure watchdog
drivers/sbsa: add sbsa watchdog driver

ti: k3: common: Align elements of map region table

This is only a formatting change but makes it instantly clear how each
region is set. This is over 80 chars and the MT_RO are not strictly
needed b

ti: k3: common: Align elements of map region table

This is only a formatting change but makes it instantly clear how each
region is set. This is over 80 chars and the MT_RO are not strictly
needed but this section very important to get right so make readability
the priority here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I2432deda05d4502b3478170296b5da43f26ad8e6

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ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default

This should be more secure and looks a bit cleaner.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ie5eaf0234b211ba02631cf5eab5faa

ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default

This should be more secure and looks a bit cleaner.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ie5eaf0234b211ba02631cf5eab5faa1402a34461

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ti: k3: common: Remove shared RAM space

We don't use this for anything right now, remove it.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I11505d01834f7ff1fdba46fda0acbb3b56fc9b66

ti: k3: common: Drop _ADDRESS from K3_USART_BASE to match other defines

This makes definitions more consistent, plus helps alignment.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I38fcdd7

ti: k3: common: Drop _ADDRESS from K3_USART_BASE to match other defines

This makes definitions more consistent, plus helps alignment.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I38fcdd76207586613d9934c9dc83d7a347e9e0fc

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Neoverse N1: Forces cacheable atomic to near

This patch forces all cacheable atomic instructions to be near, which
improves performance in highly contended parallelized use-cases.

Change-Id: I93fac

Neoverse N1: Forces cacheable atomic to near

This patch forces all cacheable atomic instructions to be near, which
improves performance in highly contended parallelized use-cases.

Change-Id: I93fac62847f4af8d5eaaf3b52318c30893e947d3
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

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Cortex A9: Fix typo in errata 794073 workaround

Change-Id: I22568caf83b9846cd7b59241fcec34a395825399
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

plat/arm: introduce wrapper functions to setup secure watchdog

The BL1 stage setup code for ARM platforms sets up the SP805 watchdog
controller as the secure watchdog. But not all ARM platforms use

plat/arm: introduce wrapper functions to setup secure watchdog

The BL1 stage setup code for ARM platforms sets up the SP805 watchdog
controller as the secure watchdog. But not all ARM platforms use SP805
as the secure watchdog controller.

So introduce two new ARM platform code specific wrapper functions to
start and stop the secure watchdog. These functions then replace the
calls to SP805 driver in common BL1 setup code. All the ARM platforms
implement these wrapper functions by either calling into SP805 driver
or the SBSA watchdog driver.

Change-Id: I1a9a11b124cf3fac2a84f22ca40acd440a441257
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

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drivers/sbsa: add sbsa watchdog driver

Add a driver for configuring the SBSA Generic Watchdog which aids in
the detection of errant system behaviour.

Change-Id: I5a1e7149c69fd8b85be7dfbcf511f431339

drivers/sbsa: add sbsa watchdog driver

Add a driver for configuring the SBSA Generic Watchdog which aids in
the detection of errant system behaviour.

Change-Id: I5a1e7149c69fd8b85be7dfbcf511f431339946f4
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

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DSU: Implement workaround for errata 798953

Under certain near idle conditions, DSU may miss response transfers on
the ACE master or Peripheral port, leading to deadlock. This workaround
disables hi

DSU: Implement workaround for errata 798953

Under certain near idle conditions, DSU may miss response transfers on
the ACE master or Peripheral port, leading to deadlock. This workaround
disables high-level clock gating of the DSU to prevent this.

Change-Id: I820911d61570bacb38dd325b3519bc8d12caa14b
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

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DSU: Small fix and reformat on errata framework

Change-Id: I50708f6ccc33059fbfe6d36fd66351f0b894311f
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

Cortex-A35: Implement workaround for errata 855472

Under specific conditions, the processor might issue an eviction and an
L2 cache clean operation to the interconnect in the wrong order. Set
the CP

Cortex-A35: Implement workaround for errata 855472

Under specific conditions, the processor might issue an eviction and an
L2 cache clean operation to the interconnect in the wrong order. Set
the CPUACTLR.ENDCCASCI bit to 1 to avoid this.

Change-Id: Ide7393adeae04581fa70eb9173b742049fc3e050
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

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Temporarily disable shared Mbed TLS heap for SGM

There is a bug in the shared heap implementation for SGM. Until the bug
is solved, the default implementation is used.

Change-Id: I010911a3f00ed860f

Temporarily disable shared Mbed TLS heap for SGM

There is a bug in the shared heap implementation for SGM. Until the bug
is solved, the default implementation is used.

Change-Id: I010911a3f00ed860f742b14daad1d99b9e7ce711
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

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Merge "Cortex A9:errata 794073 workaround" into integration

Merge changes from topic "av/tls-heap" into integration

* changes:
Mbed TLS: Remove weak heap implementation
sgm: Fix bl2 sources

Merge changes from topic "pb/tbbr-oid" into integration

* changes:
doc: Clarify cert_create build when USE_TBBR_DEFS=0
plat/sgm: Remove redundant platform_oid.h

Cortex A9:errata 794073 workaround

On Cortex A9 an errata can cause the processor to violate the rules for
speculative fetches when the MMU is off but branch prediction has not
been disabled. The wo

Cortex A9:errata 794073 workaround

On Cortex A9 an errata can cause the processor to violate the rules for
speculative fetches when the MMU is off but branch prediction has not
been disabled. The workaround for this is to execute an Invalidate
Entire Branch Prediction Array (BPIALL) followed by a DSB.

see:http://arminfo.emea.arm.com/help/topic/com.arm.doc.uan0009d/UAN0009_cortex_a9_errata_r4.pdf
for more details.

Change-Id: I9146c1fa7563a79f4e15b6251617b9620a587c93
Signed-off-by: Joel Hutton <Joel.Hutton@arm.com>

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Merge changes from topic "renesas-bsp203" into integration

* changes:
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3
rcar_gen3: drivers: Change to restore timer counter value at resume

Merge changes from topic "renesas-bsp203" into integration

* changes:
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3
rcar_gen3: drivers: Change to restore timer counter value at resume
rcar_gen3: drivers: pwrc: Add DBSC4 setting before self-refresh mode
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.2
rcar_gen3: drivers: ddr: Update DDR setting rev.0.35
rcar_gen3: drivers: qos: change subslot cycle
rcar_gen3: drivers: board: Add new board revision for H3ULCB
rcar_gen3: plat: Change periodic write DQ training option.

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Merge "Improvements in Readme" into integration

Merge "hikey960: Fix race condition between hotplug and idles" into integration

Mbed TLS: Remove weak heap implementation

The implementation of the heap function plat_get_mbedtls_heap() becomes
mandatory for platforms supporting TRUSTED_BOARD_BOOT.

The shared Mbed TLS heap def

Mbed TLS: Remove weak heap implementation

The implementation of the heap function plat_get_mbedtls_heap() becomes
mandatory for platforms supporting TRUSTED_BOARD_BOOT.

The shared Mbed TLS heap default weak function implementation is
converted to a helper function get_mbedtls_heap_helper() which can be
used by the platforms for their own function implementation.

Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

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