| 196fa6c8 | 20-May-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: update doc for U-Boot compilation
U-Boot should be compiled with stm32mp15_trusted_defconfig which is supported since tag v2019.07-rc1 with commit [1].
The creation of the U-Boot binary w
stm32mp1: update doc for U-Boot compilation
U-Boot should be compiled with stm32mp15_trusted_defconfig which is supported since tag v2019.07-rc1 with commit [1].
The creation of the U-Boot binary with stm32 header is done at U-Boot compilation step, it is no more required to call the extra command.
[1] https://git.denx.de/?p=u-boot.git;a=commit;h=015289580f81
Change-Id: Ia875c22184785fc2e02ad07993a649069cd5ce34 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| f33b2433 | 20-May-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: add general SYSCFG management
The system configuration controller is mainly used to manage the compensation cell and other IOs and system related settings.
The SYSCFG driver is in charge
stm32mp1: add general SYSCFG management
The system configuration controller is mainly used to manage the compensation cell and other IOs and system related settings.
The SYSCFG driver is in charge of configuring masters on the interconnect, IO compensation, low voltage boards, or pull-ups for boot pins. All other configurations should be handled in Linux drivers requiring it.
Device tree files are also updated to manage vdd-supply regulator.
Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 8f282dae | 07-May-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: move stm32_get_gpio_bank_clock() to private file
GPIOx clocks are specific to each STM32MP platforms. This change moves function stm32_get_gpio_bank_clock() from stm32mp common source file
stm32mp1: move stm32_get_gpio_bank_clock() to private file
GPIOx clocks are specific to each STM32MP platforms. This change moves function stm32_get_gpio_bank_clock() from stm32mp common source files to platform private stm32mp1_private.c source file.
Change-Id: I9616c0d3fe4d10af715d6f2d1550c13ab62c829a Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| dd98aec8 | 04-Jun-2019 |
Yann Gautier <yann.gautier@st.com> |
clk: stm32mp1: correctly handle Clock Spreading Generator
To activate the CSG option, the driver needs to set the bit2 of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator. This bit shoul
clk: stm32mp1: correctly handle Clock Spreading Generator
To activate the CSG option, the driver needs to set the bit2 of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator. This bit should not be cleared when starting the PLL.
Change-Id: Ie5c720ff03655f27a7e7e9e7ccf8295dd046112f Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| d4151d2f | 07-May-2019 |
Yann Gautier <yann.gautier@st.com> |
clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
Rework the macro that eases the table definition: the src and msk fields are now using MASK and SHIFT defines of each source regi
clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
Rework the macro that eases the table definition: the src and msk fields are now using MASK and SHIFT defines of each source register. Some macros had then to be modified: _USART1_SEL, _ASS_SEL and _MSS_SEL to _UART1_SEL, _AXIS_SEL, and _MCUS_SEL to match register fields.
Note: the mask for RCC_ASSCKSELR_AXISSRC is changed from 0x3 to 0x7 to reflect the size of the register field, even if there are only 3 possible clock sources.
The mask value is also corrected for QSPI and FMC clock selection.
Change-Id: I44114e3c1dd37b9fa1be1ba519611abd9a07764c Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| f66358af | 17-May-2019 |
Yann Gautier <yann.gautier@st.com> |
clk: stm32mp1: move oscillator functions to generic file
Those functions are generic for parsing nodes from device tree hence could be located in generic source file.
The oscillators description st
clk: stm32mp1: move oscillator functions to generic file
Those functions are generic for parsing nodes from device tree hence could be located in generic source file.
The oscillators description structure is also moved to STM32MP1 clock driver, as it is no more used in stm32mp1_clkfunc and cannot be in a generic file.
Change-Id: I93ba74f4eea916440fef9b160d306af1b39f17c6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| e1abd560 | 17-Apr-2019 |
Yann Gautier <yann.gautier@st.com> |
arch: add some defines for generic timer registers
Those defines are used in STM32MP1 clock driver. It is better to put them altogether with already defined registers.
Change-Id: I6f8ad8c2477b947af
arch: add some defines for generic timer registers
Those defines are used in STM32MP1 clock driver. It is better to put them altogether with already defined registers.
Change-Id: I6f8ad8c2477b947af6f76283a4ef5c40212d0027 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 97c9a42d | 17-Jun-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge "Fix type of cot_desc_ptr" into integration |
| 45c28e95 | 17-Jun-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge "DSU: Apply erratum 936184 for Neoverse N1/E1" into integration |
| 6acb509c | 17-Jun-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge "allwinner: Disable unused features to save space" into integration |
| fbcdc4eb | 14-Jun-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: qos: H3: Fix checkpatch issues
Fix checkpatch issues, clean up macro indentation. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I60
rcar_gen3: drivers: qos: H3: Fix checkpatch issues
Fix checkpatch issues, clean up macro indentation. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I605109b5e41219473a4cbc4a1929b84377ba0b67
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| 7479a33f | 13-Jun-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: qos: H3: Drop MD pin check
The DBSC_SCFCTST2 is always written with the same value, no matter what the MD pin value is, drop the entire check and just write the register with the
rcar_gen3: drivers: qos: H3: Drop MD pin check
The DBSC_SCFCTST2 is always written with the same value, no matter what the MD pin value is, drop the entire check and just write the register with the one and only possible value.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I4d8926eb3c44c61ec777c05c581ce8247f13daa6
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| 1a9eb1ed | 13-Jun-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: qos: H3: Drop useless comments
Drop useless comments in dbsc_setting(). No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9e3d025567ff
rcar_gen3: drivers: qos: H3: Drop useless comments
Drop useless comments in dbsc_setting(). No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9e3d025567ff4e10e2b4448e8a518b4eee13f6c5
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| 606dfb2c | 13-Jun-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: qos: H3: Drop extra level of nesting
The extra level of nesting is not necessary, drop it. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Chang
rcar_gen3: drivers: qos: H3: Drop extra level of nesting
The extra level of nesting is not necessary, drop it. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I7b55a6fa53145ff0427e05656234917f486031df
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| fcc9d57c | 13-Jun-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t
Convert the mstat table from a complex structure to simple sequence of uint64_t values, since the structure described just that and the l
rcar_gen3: drivers: qos: H3: Convert mstat table to uint64_t
Convert the mstat table from a complex structure to simple sequence of uint64_t values, since the structure described just that and the loop can operate over incrementing sequence of addresses just fine.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I379a1a5dfe2095d9477b364393ab120c4d8e1ba4
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| 4318b580 | 13-Jun-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file
Pull out the mstat fix array into separate file, to align the structure of the driver with the other SoCs. No functional change.
rcar_gen3: drivers: qos: H3: Factor out mstat fix into separate file
Pull out the mstat fix array into separate file, to align the structure of the driver with the other SoCs. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ia92abe11c425220a065d707c350644c955efef92
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| 60d78ca4 | 13-Jun-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: qos: H3: Use common register definition
Use common qos_regs.h instead of a local copy in the H3 QoS init. Fill missing registers into qos_regs.h . No functional change.
Signed-o
rcar_gen3: drivers: qos: H3: Use common register definition
Use common qos_regs.h instead of a local copy in the H3 QoS init. Fill missing registers into qos_regs.h . No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I0b5ceab71be07e270885bdff403e5292e3373787
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| 2f6f00dc | 14-Jun-2019 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
bl2_el3: clean up linker script
This linker script is so unreadable due to sprinkled #ifdef.
Direct read-only data to 'ROM' and read-write data to 'RAM'.
Both go to the same memory device when BL2
bl2_el3: clean up linker script
This linker script is so unreadable due to sprinkled #ifdef.
Direct read-only data to 'ROM' and read-write data to 'RAM'.
Both go to the same memory device when BL2_IN_XIP_MEM is disabled.
Change-Id: Ieeac3f1a4e05e9e8599de2ec84260819c70f361e Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 018358fc | 18-May-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: console: Convert to multi-console API
Convert the R-Car Gen3 platform and both SCIF and Log drivers to multi-console API.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Chang
rcar_gen3: console: Convert to multi-console API
Convert the R-Car Gen3 platform and both SCIF and Log drivers to multi-console API.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I18556973937d150b60453f9150d54ee612571e35
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| 2efb7ddc | 07-Jun-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Fix type of cot_desc_ptr
The chain of trust description and the pointer pointing to its first element were incompatible, thus requiring an explicit type cast for the assignment.
- cot_desc was an a
Fix type of cot_desc_ptr
The chain of trust description and the pointer pointing to its first element were incompatible, thus requiring an explicit type cast for the assignment.
- cot_desc was an array of const pointers to const image descriptors.
- cot_desc_ptr was a const pointer to (non-constant) pointers to const image descriptors.
Thus, trying to assign cot_desc to cot_desc_ptr (with no cast) would generate the following compiler warning:
drivers/auth/tbbr/tbbr_cot.c:826:14: warning: initialization discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] REGISTER_COT(cot_desc); ^~~~~~~~
Change-Id: Iae62dd1bdb43fe379e3843d96461d47cc2f68a06 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 2e302371 | 05-Jun-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
doc: Isolate security-related build options
Reference security specific build options from the user guide.
Change-Id: I0e1efbf47d914cf3c473104175c702ff1a80eb67 Signed-off-by: Ambroise Vincent <ambr
doc: Isolate security-related build options
Reference security specific build options from the user guide.
Change-Id: I0e1efbf47d914cf3c473104175c702ff1a80eb67 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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| bb2f077a | 10-Jun-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
DSU: Apply erratum 936184 for Neoverse N1/E1
Change-Id: Idd08914bcb945ad6aa0621e594c95df88ee8f9c8 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com> |
| e1368771 | 11-Jun-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "plat/arm: Skip BL2U if RESET_TO_SP_MIN flag is set" into integration |
| dd5deabd | 11-Jun-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
plat/arm: Skip BL2U if RESET_TO_SP_MIN flag is set
BL2U should not build when RESET_TO_SP_MIN flag is set, like BL1 and BL2.
Change-Id: Iac516121f98611ca1f58d2b5efdec6525b06ce4e Signed-off-by: Loui
plat/arm: Skip BL2U if RESET_TO_SP_MIN flag is set
BL2U should not build when RESET_TO_SP_MIN flag is set, like BL1 and BL2.
Change-Id: Iac516121f98611ca1f58d2b5efdec6525b06ce4e Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| 4143ed8f | 11-Jun-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "Update maintainers list" into integration |