| dc150425 | 15-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "synquacer: Fix compilation fail for SPM support build config" into integration |
| c85f8f09 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Fix E3 DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I689418768e87a8c1b6eeeb9f1a
rcar_gen3: drivers: ddr-a: Fix E3 DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I689418768e87a8c1b6eeeb9f1a48dfb333908017
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| 2c400e94 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Pass ddrBackup around
Pass the ddrBackup variable around instead of making it a global variable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ib7
rcar_gen3: drivers: ddr-a: Pass ddrBackup around
Pass the ddrBackup variable around instead of making it a global variable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ib796181247712e464b77f5f8be5f851745727d74 --- NOTE: The camelcase is fixed in later patch.
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| 32e6b50e | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Inline ddr_init_e3.h
Partly inline ddr_init_e3.h into ddr_init_e3.c . Drop duplicate INITDRAM_* macros, which are defined in boot_init_dram.h .
Signed-off-by: Marek Vasut
rcar_gen3: drivers: ddr-a: Inline ddr_init_e3.h
Partly inline ddr_init_e3.h into ddr_init_e3.c . Drop duplicate INITDRAM_* macros, which are defined in boot_init_dram.h .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I758661d337a86b6a07f82cd4067fbc149cbaed1e
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| 8bfca58b | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Fix V3M DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I4f3e3812ffaa24fec50857756
rcar_gen3: drivers: ddr-a: Fix V3M DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I4f3e3812ffaa24fec50857756539b563eff33cdd
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| d2ee6e01 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Fix D3 DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9b26b838e8c45d9b4f53c67663
rcar_gen3: drivers: ddr-a: Fix D3 DDR init coding style
Coding style cleanup, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9b26b838e8c45d9b4f53c67663ec94002dd9edfe
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| dfd80943 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32()
Replace ad-hoc register accessors with generic ones, remove the ad-hoc implementation. No functional change.
Sign
rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32()
Replace ad-hoc register accessors with generic ones, remove the ad-hoc implementation. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I21446a00a38c6a39d6a48652c34f59814074e831
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| efe6eaab | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr-a: Unify register definitions
Unify boot_init_dram_regdef_*.h into boot_init_dram_regdef.h and clean up it's coding style a bit.
Signed-off-by: Marek Vasut <marek.vasut+rene
rcar_gen3: drivers: ddr-a: Unify register definitions
Unify boot_init_dram_regdef_*.h into boot_init_dram_regdef.h and clean up it's coding style a bit.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Iae3375969c05f80209ebf7b1ebc3633a7f6317ff
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| 8ddd91b0 | 14-Jul-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: drivers: ddr: Replace BITn with BIT(n) macro
Remove the ad-hoc BITn macros and replace them with generic BIT(n) macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renes
rcar_gen3: drivers: ddr: Replace BITn with BIT(n) macro
Remove the ad-hoc BITn macros and replace them with generic BIT(n) macro. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I5d0b44d6cba5a69895fed505f6ff780d3574907f
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| 91e6bef9 | 08-Jul-2019 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
synquacer: Fix compilation fail for SPM support build config
Fix the header file path
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I73a92a3f0049ecbda7eade452405927c04
synquacer: Fix compilation fail for SPM support build config
Fix the header file path
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Change-Id: I73a92a3f0049ecbda7eade452405927c04048e01
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| 7cb68807 | 12-Jul-2019 |
Paul Beesley <paul.beesley@arm.com> |
doc: Generate PlantUML diagrams automatically
Currently we have some pre-rendered versions of certain diagrams in SVG format. These diagrams have corresponding PlantUML source that can be rendered a
doc: Generate PlantUML diagrams automatically
Currently we have some pre-rendered versions of certain diagrams in SVG format. These diagrams have corresponding PlantUML source that can be rendered automatically as part of the documentation build, removing the need for any intermediate files.
This patch adds the Sphinx "plantuml" extension, replaces references to the pre-rendered SVG files within the documents, and finally removes the SVG files and helper script.
New requirements for building the docs are the "sphinxcontrib-plantuml" Python module (added to the pip requirements.txt file) and the Graphviz package (provides the "dot" binary) which is in the Ubuntu package repositories.
Change-Id: I24b52ee40ff79676212ed7cff350294945f1b50d Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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| 9b350702 | 12-Jul-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes I94acd1bb,I0ece5226,I82d0a213,Ia4fc9456,Ic9fb7ed1 into integration
* changes: rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.4 rcar_gen3: drivers: rpc: Modify PFC code rca
Merge changes I94acd1bb,I0ece5226,I82d0a213,Ia4fc9456,Ic9fb7ed1 into integration
* changes: rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.4 rcar_gen3: drivers: rpc: Modify PFC code rcar_gen3: drivers: rpc: Change RPC PHY calibration setting rcar_gen3: drivers: ddr-b: Update DDR setting for H3, M3, M3N rcar_gen3: drivers: ddr-a: Update E3 DDR setting
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| 3ce3ce07 | 12-Jul-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Re-apply GIT_COMMIT_ID check for checkpatch" into integration |
| 363fb55a | 20-May-2019 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.4
Update the revision number in the revision management file.
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-of
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.4
Update the revision number in the revision management file.
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I94acd1bb53d9d2453e550e2a13b6391b9088ff8d
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| c186ec51 | 20-May-2019 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
rcar_gen3: drivers: rpc: Modify PFC code
Modify PFC code and rename macro of MFIS according to Errata of Hardware User's Manual
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.co
rcar_gen3: drivers: rpc: Modify PFC code
Modify PFC code and rename macro of MFIS according to Errata of Hardware User's Manual
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I0ece522647319286350843bbbe8b8ba8b0ae9bac
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| a3aa877c | 20-May-2019 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
rcar_gen3: drivers: rpc: Change RPC PHY calibration setting
Modify RPC code according to Errata of Hardware User's Manual
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Sig
rcar_gen3: drivers: rpc: Change RPC PHY calibration setting
Modify RPC code according to Errata of Hardware User's Manual
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I82d0a2136c7f18870842f84c49343977708eef1e
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| 783c5304 | 17-May-2019 |
Chiaki Fujii <chiaki.fujii.wj@renesas.com> |
rcar_gen3: drivers: ddr-b: Update DDR setting for H3, M3, M3N
[IPL/DDR] - Update H3, M3, M3N DDR setting rev.0.36.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Signed-off-by: Marek Vas
rcar_gen3: drivers: ddr-b: Update DDR setting for H3, M3, M3N
[IPL/DDR] - Update H3, M3, M3N DDR setting rev.0.36.
Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ia4fc9456876a14a9cf3ced93163477974f6cc8bf
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| cf57ff8b | 12-Jul-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Re-apply GIT_COMMIT_ID check for checkpatch
As it turns out, Gerrit's merge commits don't always respect that format so these mistakes have to be ignored as false positives.
Change-Id: I4e38d9c34c9
Re-apply GIT_COMMIT_ID check for checkpatch
As it turns out, Gerrit's merge commits don't always respect that format so these mistakes have to be ignored as false positives.
Change-Id: I4e38d9c34c95588e7916fba4c154f017d8c92dec Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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| 70f7c4e1 | 12-Jul-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "AArch64: Add 128-bit integer types definitions" into integration |
| b7e398d6 | 12-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Enable MTE support unilaterally for Normal World
This patch enables MTE for Normal world if the CPU suppors it. Enabling MTE for secure world will be done later.
Change-Id: I9ef64460beaba15e9a9c20a
Enable MTE support unilaterally for Normal World
This patch enables MTE for Normal world if the CPU suppors it. Enabling MTE for secure world will be done later.
Change-Id: I9ef64460beaba15e9a9c20ab02da4fb2208b6f7d Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 93c690eb | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Enable -Wshift-overflow=2 to check for undefined shift behavior
The -Wshift-overflow=2 option enables checks for left bit shifts. Specifically, the option will warn when the result of a shift will b
Enable -Wshift-overflow=2 to check for undefined shift behavior
The -Wshift-overflow=2 option enables checks for left bit shifts. Specifically, the option will warn when the result of a shift will be placed into a signed integer and overflow the sign bit there, which results in undefined behavior.
To avoid the warnings from these checks, the left operand of a shift can be made an unsigned integer by using the U() macro or appending the u suffix.
Change-Id: I50c67bedab86a9fdb6c87cfdc3e784f01a22d560 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| 3e43121e | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update base code to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id
Update base code to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: Iddd6f38139a4c6e500468b4fc48d04e0939f574e Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| d3b6df7c | 11-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update hisilicon drivers to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
C
Update hisilicon drivers to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: I67984b6c48c08af61e95a4dbd18047e2c3151f9a Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| 9264f087 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update synopsys drivers to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Ch
Update synopsys drivers to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: I54560fe290e7dc52d364d0fe1c81a16f4c8d9a7b Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| dc5baeb3 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update imx platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change
Update imx platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit.
Change-Id: Ia0a10b4a30e63c0cbf1d0f8dfe5768e0a93ae1c7 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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