| ea735643 | 18-Sep-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "db/unsigned_long" into integration
* changes: Unsigned long should not be used as per coding guidelines SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64 |
| 5f2849b6 | 18-Sep-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "qemu_sbsa" into integration
* changes: qemu: Simplify the image size calculation qemu: introducing sub-platforms to qemu platform |
| 9a006ad1 | 17-May-2018 |
Radoslaw Biernacki <radoslaw.biernacki@linaro.org> |
qemu: Simplify the image size calculation
Patch introduce the macro NS_IMAGE_MAX_SIZE to simplify the image size calculation. Use of additional parenthesis removes the possibility of improper calcul
qemu: Simplify the image size calculation
Patch introduce the macro NS_IMAGE_MAX_SIZE to simplify the image size calculation. Use of additional parenthesis removes the possibility of improper calculations due nested macro expansion for subtraction. In case of platforms with DRAM window over 32bits, patch also removes potential problems with type casting, as meminfo.image_size is uint32_t but macro calculations were done in 64bit space.
Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Change-Id: I2d05a2d9dd6000dba6114df53262995cf85af018
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| 301d27d9 | 17-May-2018 |
Radoslaw Biernacki <radoslaw.biernacki@linaro.org> |
qemu: introducing sub-platforms to qemu platform
This commit change the plat/qemu directory structure into:
`-- plat `-- qemu |-- common (files shared with all qemu subplatforms)
qemu: introducing sub-platforms to qemu platform
This commit change the plat/qemu directory structure into:
`-- plat `-- qemu |-- common (files shared with all qemu subplatforms) |-- qemu (original qemu platform) |-- qemu_sbsa (new sqemu_sbsa platform) |-- subplat1 `-- subplat2
This opens the possibility of adding new qemu sub-platforms which reuse existing common platform code. The first platform which will leverage new structure will be SBSA platform.
Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: Id0d8133e1fffc1b574b69aa2770ebc02bb837a9b
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| deb330cb | 14-Sep-2019 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: fix to load FIP by partition table.
Avoid to load FIP by hacking address. Load it by partition table instead.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Change-Id: I0283fc2e6e
hikey: fix to load FIP by partition table.
Avoid to load FIP by hacking address. Load it by partition table instead.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Change-Id: I0283fc2e6e459bff14de19d92db4158e05106ee4
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| c61cf58f | 14-Sep-2019 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: fix to load FIP by partition table
Avoid to load FIP by hacking address. Load it by partition table instead.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Change-Id: Ib476d024
hikey960: fix to load FIP by partition table
Avoid to load FIP by hacking address. Load it by partition table instead.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Change-Id: Ib476d024a51e4b9705441a0007d78f9fdf0ca078
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| f8631f51 | 14-Sep-2019 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
drivers: partition: support different block size
The block size of some storage device is 4096-byte long, such as UFS. But PARTITION_BLOCK_SIZE is defined as 512-byte long. So replace it by PLAT_PAR
drivers: partition: support different block size
The block size of some storage device is 4096-byte long, such as UFS. But PARTITION_BLOCK_SIZE is defined as 512-byte long. So replace it by PLAT_PARTITION_BLOCK_SIZE. Make it configurable in platform.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Change-Id: Iada05f7c646d0a0f2c0d3b8545540b3cb7153de3
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| edcadeb7 | 18-Sep-2019 |
Carlo Caione <ccaione@baylibre.com> |
amlogic: makefile: Use PLAT variable when possible
To address the file names.
Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ib79b8dfa032a1db012c5031d47de61e1a16b5f9a |
| 26d94393 | 18-Sep-2019 |
Carlo Caione <ccaione@baylibre.com> |
amlogic: sha_dma: Move register mappings to platform header
The registers location for the SHA DMA driver is not unique for the different platforms. Move the mapping out of the driver and into the p
amlogic: sha_dma: Move register mappings to platform header
The registers location for the SHA DMA driver is not unique for the different platforms. Move the mapping out of the driver and into the platform-specific header.
Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ice64637844a3cb384b01e466cb8c1cea5f764129
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| 5cfdfc3c | 16-Sep-2019 |
Carlo Caione <ccaione@baylibre.com> |
amlogic: scpi: Add support to retrieve chip ID
Both kernel and U-Boot use a SMC call to the secure monitor to get the chip ID. This call is translated by BL31 to a call to the SCP to retrieve the ID
amlogic: scpi: Add support to retrieve chip ID
Both kernel and U-Boot use a SMC call to the secure monitor to get the chip ID. This call is translated by BL31 to a call to the SCP to retrieve the ID. Add a new SiP call and the backing SCPI command.
Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ib128f5645ee92866e7ebbcd550dacd33f573524b
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| ed01e0c4 | 16-Sep-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: rpi3: Do prescaler and control setup in C rpi3: Prepare for supporting a GIC (in RPi4) rpi3: Make SHARED_RAM optio
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: rpi3: Do prescaler and control setup in C rpi3: Prepare for supporting a GIC (in RPi4) rpi3: Make SHARED_RAM optional rpi3: Rename RPI3_IO_BASE to RPI_IO_BASE rpi3: Move shared rpi3 files into common directory
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| f65423cd | 16-Sep-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: Add fdt_add_reserved_memory() helper function qemu: Move and generalise FDT PSCI fixup |
| c011d7d5 | 16-Sep-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: rpi3: Move rng driver to drivers rpi3: Move VC mailbox driver into generic drivers directory rpi3: Move rpi3_hw.h
Merge changes from topic "raspberry-pi-4-support" into integration
* changes: rpi3: Move rng driver to drivers rpi3: Move VC mailbox driver into generic drivers directory rpi3: Move rpi3_hw.h header file to include/rpi_hw.h
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| b7ef641d | 16-Sep-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "rpi3: Add "rpi" platform directory" into integration |
| 539061b8 | 21-Aug-2019 |
kenny liang <kenny.liang@mediatek.com> |
mediatek: mt8183: add MTK MCDI driver
Add MCDI driver for power saving.
Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I93ecff4d7581f678be09dd8fb5dfaaccd5f2c22c |
| 9fc34bbd | 21-Aug-2019 |
kenny liang <kenny.liang@mediatek.com> |
mediatek: mt8183: add MTK SSPM driver
Add MTK SSPM driver.
Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I30dd9a95456b8c3c8d18fd22120824eec97634ee |
| 3c25ba44 | 21-Aug-2019 |
kenny liang <kenny.liang@mediatek.com> |
mediatek: mt8183: add MTK SPM driver
Add MTK SPM driver for suspend/resume scenario.
Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I8207eea95914da9e63c62f3afc8329f3ccd9a22c |
| f9f84f44 | 20-Aug-2019 |
kenny liang <kenny.liang@mediatek.com> |
mediatek: mt8183: add MTK uart driver for controlling clock gate
Add uart clock gate contol for suspend/resume scenario.
Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: Id4197b0720
mediatek: mt8183: add MTK uart driver for controlling clock gate
Add uart clock gate contol for suspend/resume scenario.
Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: Id4197b0720630ec6c74aec206a9b206511bf515a
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| e419574e | 21-Aug-2019 |
kenny liang <kenny.liang@mediatek.com> |
mediatek: mt8183: configure MCUSYS DCM
Configure MCUSYS DCM.
Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: Ib810125b514cbcc43c770377bc71a29a05a19320 |
| f389d0e9 | 02-May-2019 |
kenny liang <kenny.liang@mediatek.com> |
mediatek: mt8173: refactor RTC and PMIC drivers
Refactor RTC and PMIC drivers.
Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I74fca536cd61e00c962f080f1ba3759287682ecf |
| ee006a79 | 03-Sep-2019 |
Deepika Bhavnani <deepika.bhavnani@arm.com> |
Unsigned long should not be used as per coding guidelines
We should either change them to `unsigned int` or `unsigned long long` when the size of the variable is the same in AArch64 and AArch32 or t
Unsigned long should not be used as per coding guidelines
We should either change them to `unsigned int` or `unsigned long long` when the size of the variable is the same in AArch64 and AArch32 or to `u_register_t` if it is supposed to be 32 bit wide in AArch32 and 64 bit wide in AArch64.
Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I80e2a6edb33248ee88be395829abbd4c36c89abe
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| eeb5a7b5 | 03-Sep-2019 |
Deepika Bhavnani <deepika.bhavnani@arm.com> |
SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
AArch64 System register SCTLR_EL1[31:0] is architecturally mapped to AArch32 System register SCTLR[31:0] AArch64 System register ACTLR_E
SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64
AArch64 System register SCTLR_EL1[31:0] is architecturally mapped to AArch32 System register SCTLR[31:0] AArch64 System register ACTLR_EL1[31:0] is architecturally mapped to AArch32 System register ACTLR[31:0].
`u_register_t` should be used when it's important to store the contents of a register in its native size
Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com> Change-Id: I0055422f8cc0454405e011f53c1c4ddcaceb5779
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| dcf6d4f8 | 15-Jul-2019 |
Andre Przywara <andre.przywara@arm.com> |
rpi3: Do prescaler and control setup in C
To initialise the arch timer configuration and some clock prescaler, we need to do two MMIO access *once*, early during boot.
As tempting as it may sound,
rpi3: Do prescaler and control setup in C
To initialise the arch timer configuration and some clock prescaler, we need to do two MMIO access *once*, early during boot.
As tempting as it may sound, plat_reset_handler() is not the right place to do this, as it will be called on every CPU coming up, both for secondary cores as well as during warmboots. So this access will be done multiple times, and even during a rich OS' runtime. Whether doing so anyway is actually harmful is hard to say, but we should definitely avoid this if possible.
Move the initialisation of these registers to C code in bl1_early_platform_setup(), where it will still be executed early enough (before enabling the console), but only once during the whole boot process.
Change-Id: I081c41a5476d424411411488ff8f633e87d3bcc5 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 3ef45dda | 15-Jul-2019 |
Andre Przywara <andre.przywara@arm.com> |
Add fdt_add_reserved_memory() helper function
If a firmware component like TF-A reserves special memory regions for its own or secure payload services, it should announce the location and size of th
Add fdt_add_reserved_memory() helper function
If a firmware component like TF-A reserves special memory regions for its own or secure payload services, it should announce the location and size of those regions to the non-secure world. This will avoid disappointment when some rich OS tries to acccess this memory, which will likely end in a crash.
The traditional way of advertising reserved memory using device tree is using the special memreserve feature of the device tree blob (DTB). However by definition those regions mentioned there do not prevent the rich OS to map this memory, which may lead to speculative accesses to this memory and hence spurious bus errors.
A safer way of carving out memory is to use the /reserved-memory node as part of the normal DT structure. Besides being easier to setup, this also defines an explicit "no-map" property to signify the secure-only nature of certain memory regions, which avoids the rich OS to accidentally step on it.
Add a helper function to allow platform ports to easily add a region.
Change-Id: I2b92676cf48fd3bdacda05b5c6b1c7952ebed68c Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 990ab78e | 09-Jul-2019 |
Andre Przywara <andre.przywara@arm.com> |
rpi3: Move rng driver to drivers
To allow sharing the driver between the RPi3 and RPi4, move the random number generator driver into the generic driver directory.
Change-Id: Iae94d7cb22c6bce3af9bff
rpi3: Move rng driver to drivers
To allow sharing the driver between the RPi3 and RPi4, move the random number generator driver into the generic driver directory.
Change-Id: Iae94d7cb22c6bce3af9bff709d76d4caf87b14d1 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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