stm32mp1: add compilation flags for boot devices

Adds compilation flags to specify which drivers will be
embedded in the generated firmware.

Change-Id: Ie9decc89c3f26cf17e7148a3a4cf337fd35940f7
Sig

stm32mp1: add compilation flags for boot devices

Adds compilation flags to specify which drivers will be
embedded in the generated firmware.

Change-Id: Ie9decc89c3f26cf17e7148a3a4cf337fd35940f7
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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lib: utils_def: add CLAMP macro

Add the standard CLAMP macro. It ensures that
x is between the limits set by low and high.
If low is greater than high the result is undefined.

Signed-off-by: Lione

lib: utils_def: add CLAMP macro

Add the standard CLAMP macro. It ensures that
x is between the limits set by low and high.
If low is greater than high the result is undefined.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ia173bb9ca51bc8d9a8ec573bbc15636a94f881f4

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compiler_rt: Import popcountdi2.c and popcountsi2.c files

Imported from the LLVM compiler_rt library on master branch as of
30 Oct 2018 (SVN revision: r345645).

This is to get the __popcountsi2(si_

compiler_rt: Import popcountdi2.c and popcountsi2.c files

Imported from the LLVM compiler_rt library on master branch as of
30 Oct 2018 (SVN revision: r345645).

This is to get the __popcountsi2(si_int a) and __popcountdi2(di_int a)
builtin which are required by a driver that uses a __builtin_popcount().

Change-Id: I8e0d97cebdd90d224690c8ce1b02e657acdddb25
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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Add SPI-NOR framework

SPI-NOR framework is based on SPI-MEM framework using
spi_mem_op execution interface.

It implements read functions and allows NOR configuration
up to quad mode.
Default manage

Add SPI-NOR framework

SPI-NOR framework is based on SPI-MEM framework using
spi_mem_op execution interface.

It implements read functions and allows NOR configuration
up to quad mode.
Default management is 1 data line but it can be overridden
by platform.
It also includes specific quad mode configuration for
Spansion, Micron and Macronix memories.

Change-Id: If49502b899b4a75f6ebc3190f6bde1013651197f
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>

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Add SPI-NAND framework

This framework supports SPI-NAND and is based on the
SPI-MEM framework for SPI operations. It uses a common high
level access using the io_mtd.

It is limited to the read func

Add SPI-NAND framework

This framework supports SPI-NAND and is based on the
SPI-MEM framework for SPI operations. It uses a common high
level access using the io_mtd.

It is limited to the read functionalities.

Default behavior is the basic one data line operation
but it could be overridden by platform.

Change-Id: Icb4e0887c4003a826f47c876479dd004a323a32b
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>

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Add SPI-MEM framework

This framework supports SPI operations using a common
spi_mem_op structure:
- command
- addr
- dummy
- data

The framework manages SPI bus configuration:
- speed
- bus wi

Add SPI-MEM framework

This framework supports SPI operations using a common
spi_mem_op structure:
- command
- addr
- dummy
- data

The framework manages SPI bus configuration:
- speed
- bus width (Up to quad mode)
- chip select

Change-Id: Idc2736c59bfc5ac6e55429eba5d385275ea3fbde
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>

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Add raw NAND framework

The raw NAND framework supports SLC NAND devices.

It introduces a new high level interface (io_mtd) that
defines operations a driver can register to the NAND framework.
This

Add raw NAND framework

The raw NAND framework supports SLC NAND devices.

It introduces a new high level interface (io_mtd) that
defines operations a driver can register to the NAND framework.
This interface will fill in the io_mtd device specification:
- device_size
- erase_size
that could be used by the io_storage interface.

NAND core source file integrates the standard read loop that
performs NAND device read operations using a skip bad block strategy.
A platform buffer must be defined in case of unaligned
data. This buffer must fit to the maximum device page size
defined by PLATFORM_MTD_MAX_PAGE_SIZE.

The raw_nand.c source file embeds the specific NAND operations
to read data.
The read command is a raw page read without any ECC correction.
This can be overridden by a low level driver.
No generic support for write or erase command or software
ECC correction.

NAND ONFI detection is available and can be enabled using
NAND_ONFI_DETECT=1.
For non-ONFI NAND management, platform can define required
information.

Change-Id: Id80e9864456cf47f02b74938cf25d99261da8e82
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>

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Merge changes from topic "ld/mtd_framework" into integration

* changes:
io: change seek offset to signed long long
compiler_rt: Import aeabi_ldivmode.S file and dependencies

Merge "zynqmp: pm: Add CLK_SET_RATE_PARENT in gem clock node" into integration

Merge changes from topic "add-versal-soc-support" into integration

* changes:
zynqmp: pm: clock: Move custom flags to typeflags
zynqmp: pm: clock: Add support for custom type flags
plat: xilin

Merge changes from topic "add-versal-soc-support" into integration

* changes:
zynqmp: pm: clock: Move custom flags to typeflags
zynqmp: pm: clock: Add support for custom type flags
plat: xilinx: zynqmp: Add GET_CALLBACK_DATA function
zynqmp: pm: Remove CLK_TOPSW_LSBUS from invalid clock list

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Set lld as the default linker for Clang builds

The LLVM linker replaces the GNU linker as default for the link on Clang
builds. It is possible to override the default linker by setting the LD build

Set lld as the default linker for Clang builds

The LLVM linker replaces the GNU linker as default for the link on Clang
builds. It is possible to override the default linker by setting the LD build
flag.

The patch also updates the TF-A doc.

Change-Id: Ic08552b9994d4fa8f0d4863e67a2726c1dce2e35
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>

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docs: Add upcoming Change Log to Table of Contents

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I2a7f38eaae3a78fc3caa37833af755c15e8236ce

Tegra194: platform handler for entering CPU standby state

This patch implements a handler to enter the standby state on
Tegra194 platforms. On receiving a CPU_STANDBY state request,
the platform han

Tegra194: platform handler for entering CPU standby state

This patch implements a handler to enter the standby state on
Tegra194 platforms. On receiving a CPU_STANDBY state request,
the platform handler issues TEGRA_NVG_CORE_C6 request to the
MCE firmware to take the CPU into the standby state.

Change-Id: I703a96ec12205853ddb3c3871b23e338e1f60687
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra194: memctrl: force viw and vifalr/w transactions as non-coherent

Force memory transactions from viw and viflar/w as non-coherent from
no-override. This is necessary as iso clients shouldn't us

Tegra194: memctrl: force viw and vifalr/w transactions as non-coherent

Force memory transactions from viw and viflar/w as non-coherent from
no-override. This is necessary as iso clients shouldn't use coherent
path and stage-2 smmu mappings won't mark transactions as non-coherent.
For native case, no-override works. But, not for virtualization case.

Change-Id: I1a8fc17787c8d0f8579bdaeeb719084993e27276
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

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Tegra194: memctrl: fix bug in client order id reg value generation

Client order id reset values are incorrectly and'ed with
mc_client_order_id macro, which resulted in getting reg value as
always ze

Tegra194: memctrl: fix bug in client order id reg value generation

Client order id reset values are incorrectly and'ed with
mc_client_order_id macro, which resulted in getting reg value as
always zero. Updated mc_client_order_id macro to avoid and'ing outside
the macro, to take the reg value and update specific bit field
as necessary.

Change-Id: I880be6e4291d7cd58cf70d7c247a4044e57edd9e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>

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Tegra194: memctrl: enable mc coalescer

This patch enable the Memory Controller's "Coalescer" feature to
improve performance of memory transactions.

Change-Id: I50ba0354116284f85d9e170c293ce77e9f3fb

Tegra194: memctrl: enable mc coalescer

This patch enable the Memory Controller's "Coalescer" feature to
improve performance of memory transactions.

Change-Id: I50ba0354116284f85d9e170c293ce77e9f3fb4d8
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>

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Tegra194: update scratch registers used to read boot parameters

This patch changes SCRATCH_BOOT_PARAMS_ADDR macro to use SECURE_SCRATCH_RSV81
instead of SECURE_SCRATCH_RSV44. The previous level boot

Tegra194: update scratch registers used to read boot parameters

This patch changes SCRATCH_BOOT_PARAMS_ADDR macro to use SECURE_SCRATCH_RSV81
instead of SECURE_SCRATCH_RSV44. The previous level bootloader changed this
setting, so update here to keep both components in sync.

Change-Id: I4e0c1b54fc69482d5513a8608d0bf616677e1bdd
Signed-off-by: steven kao <skao@nvidia.com>

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Tegra194: implement system shutdown/reset handlers

This patch implements the PSCI system shutdown and reset handlers,
that in turn issue the MCE commands.

Change-Id: Ia9c831674d7be615a6e336abca42f3

Tegra194: implement system shutdown/reset handlers

This patch implements the PSCI system shutdown and reset handlers,
that in turn issue the MCE commands.

Change-Id: Ia9c831674d7be615a6e336abca42f397e4455572
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>

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Tegra194: mce: support for shutdown and reboot

This patch adds support for shutdown/reboot handlers to the MCE
driver.

ATF communicates with mce using nvg interface for shutdown &
reboot. Both shut

Tegra194: mce: support for shutdown and reboot

This patch adds support for shutdown/reboot handlers to the MCE
driver.

ATF communicates with mce using nvg interface for shutdown &
reboot. Both shutdown and reboot use the same nvg index.
However, the 1st bit of the nvg data argument differentiates
whether its a shutdown or reboot.

Change-Id: Id2d1b0c4fec55abf69b7f8adb65ca70bfa920e73
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>

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Tegra194: request CG7 before checking if SC7 is allowed

Currently firmware seems to be checking if we can get into system
suspend after checking if CC6 & C7 is allowed. For system suspend
to be trig

Tegra194: request CG7 before checking if SC7 is allowed

Currently firmware seems to be checking if we can get into system
suspend after checking if CC6 & C7 is allowed. For system suspend
to be triggered, the firmware needs to request for CG7 as well.

This patch fixes this anomaly.

Change-Id: I39c4c50092a4288f4f3fa4b0b1d5026be50f058f
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra194: config to enable/disable strict checking mode

This patch adds a new configuration option to the platform makefiles
that disables/enables strict checking mode. The config is enabled
by defa

Tegra194: config to enable/disable strict checking mode

This patch adds a new configuration option to the platform makefiles
that disables/enables strict checking mode. The config is enabled
by default.

Change-Id: I727dd0facee88d9517bf6956eaf9163eba25c8bb
Signed-off-by: Steven Kao <skao@nvidia.com>

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Tegra194: remove unused platform configs

This patch cleans the makefile to remove unused platform config
options.

Change-Id: I96d9795c0f0ba593de96017dc9a401d7c2ab471a
Signed-off-by: Varun Wadekar <

Tegra194: remove unused platform configs

This patch cleans the makefile to remove unused platform config
options.

Change-Id: I96d9795c0f0ba593de96017dc9a401d7c2ab471a
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra194: restore XUSB stream IDs on System Resume

The stream IDs for XUSB programmed during cold boot are lost on System
Suspend. This patch restores the XUSB stream IDs on System Resume.

NOTE: TH

Tegra194: restore XUSB stream IDs on System Resume

The stream IDs for XUSB programmed during cold boot are lost on System
Suspend. This patch restores the XUSB stream IDs on System Resume.

NOTE: THE WARMBOOT CODE NEEDS TO MAKE SURE THAT THE XUSB MODULE IS OUT
OF RESET AND THE CLOCKS ARE ENABLED, BEFORE POWERING ON THE CPU, DURING
SYSTEM RESUME.

Change-Id: Ibd5f1e5ebacffa6b29b625f4c41ecf204afa8191
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge "rcar_gen3: Add missing #{address,size}-cells into generated DT" into integration

Merge "docs: Creating a Change Log Template File" into integration