| 3c6fcf11 | 12-Feb-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Move remaining arm platform to fconf
Change-Id: I011256ca60672a00b711c3f5725211be64bbc2b2 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com> |
| 62c9be71 | 27-Sep-2019 |
Petre-Ionut Tudor <petre-ionut.tudor@arm.com> |
Update docs with PMU security information
This patch adds information on the PMU configuration registers and security considerations related to the PMU.
Signed-off-by: Petre-Ionut Tudor <petre-ionu
Update docs with PMU security information
This patch adds information on the PMU configuration registers and security considerations related to the PMU.
Signed-off-by: Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: I36b15060b9830a77d3f47f293c0a6dafa3c581fb
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| 3ac82b25 | 07-Feb-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
doc: debugfs remove references section and add topic to components index
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I8c2e6dc98f2f30a81f4f80cc0ca1232fed7a53c9 |
| 572fcdd5 | 12-Feb-2020 |
joanna.farley <joanna.farley@arm.com> |
Merge "Fixes ROTPK hash generation for ECDSA encryption" into integration |
| 97600cb5 | 29-Nov-2019 |
Jacky Bai <ping.bai@nxp.com> |
plat: imx8m: Fix the rdc memory region slot's offset
Each memory region slot occupies 16bypte space, so correct the the offset of config register address.
Change-Id: Ief8f21bb8ada78b5663768ee1e40f9
plat: imx8m: Fix the rdc memory region slot's offset
Each memory region slot occupies 16bypte space, so correct the the offset of config register address.
Change-Id: Ief8f21bb8ada78b5663768ee1e40f9e0eae57165 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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| 8eaffdf7 | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make on-chip SRAM region configurable
The on-chip SRAM region will be changed in the next SoC. Make it configurable. Also, split the mmap code into a new helper function so that it can be
uniphier: make on-chip SRAM region configurable
The on-chip SRAM region will be changed in the next SoC. Make it configurable. Also, split the mmap code into a new helper function so that it can be re-used for another boot mode.
Change-Id: I89f40432bf852a58ebc9be5d9dec4136b8dc010b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| eba319be | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make I/O register region configurable
The I/O register region will be changed in the next SoC. Make it configurable.
Change-Id: Iec0cbd1ef2d0703ebc7c3d3082edd73791bbfec9 Signed-off-by: Ma
uniphier: make I/O register region configurable
The I/O register region will be changed in the next SoC. Make it configurable.
Change-Id: Iec0cbd1ef2d0703ebc7c3d3082edd73791bbfec9 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 2cb26005 | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: extend boot device detection for future SoCs
The next SoC will have: - No boot swap - SD boot - No USB boot
Add new fields to handle this.
Change-Id: I772395f2c5dfc612e575b0cbd0657
uniphier: extend boot device detection for future SoCs
The next SoC will have: - No boot swap - SD boot - No USB boot
Add new fields to handle this.
Change-Id: I772395f2c5dfc612e575b0cbd0657a5fa9611c25 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| eea5b880 | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make PSCI related base address configurable
The register base address will be changed in the next SoC. Make it configurable.
Change-Id: Ibe07bd9db128b0f7e629916cb6ae21ba7984eca9 Signed-of
uniphier: make PSCI related base address configurable
The register base address will be changed in the next SoC. Make it configurable.
Change-Id: Ibe07bd9db128b0f7e629916cb6ae21ba7984eca9 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 1046c1ca | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: change block_addressing flag to bool
The flag, uniphier_emmc_block_addressing, is boolean logic, so "bool' is more suitable.
uniphier_emmc_is_over_2gb() is not boolean - it returns 1 / 0
uniphier: change block_addressing flag to bool
The flag, uniphier_emmc_block_addressing, is boolean logic, so "bool' is more suitable.
uniphier_emmc_is_over_2gb() is not boolean - it returns 1 / 0 depending on the card density, or a negative value on failure. Rename it to make it less confusing.
Change-Id: Ia646b1929147b644e0df07c46b54ab80548bc3bd Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 8d538f3d | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make counter control base address configurable
The register base will be changed in the next SoC. Make it configurable.
Change-Id: I4a7cf85fe50e4d71db58a3372a71774e43193bd3 Signed-off-by:
uniphier: make counter control base address configurable
The register base will be changed in the next SoC. Make it configurable.
Change-Id: I4a7cf85fe50e4d71db58a3372a71774e43193bd3 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 43bbac27 | 28-Jan-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: change the return value type of .is_usb_boot() to bool
This is boolean logic, so "bool" is more suitable.
Change-Id: I439c5099770600a65b8f58390a4c621c2ee487a5 Signed-off-by: Masahiro Yama
uniphier: change the return value type of .is_usb_boot() to bool
This is boolean logic, so "bool" is more suitable.
Change-Id: I439c5099770600a65b8f58390a4c621c2ee487a5 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 4511322f | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make UART base address configurable
The next SoC supports the same UART, but the register base will be changed. Make it configurable.
Change-Id: Ida5c9151b2f3554afd15555b22838437eef443f7
uniphier: make UART base address configurable
The next SoC supports the same UART, but the register base will be changed. Make it configurable.
Change-Id: Ida5c9151b2f3554afd15555b22838437eef443f7 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 2d431df8 | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make pinmon base address configurable
The register base will be changed in the next SoC. Make it configurable.
Change-Id: I9fbb6bdd1cf06207618742d4ad7970d911c9bc26 Signed-off-by: Masahiro
uniphier: make pinmon base address configurable
The register base will be changed in the next SoC. Make it configurable.
Change-Id: I9fbb6bdd1cf06207618742d4ad7970d911c9bc26 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| bda9cd70 | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make NAND controller base address configurable
The next SoC does not support the NAND controller, but make the base address configurable for consistency and future proof.
Change-Id: I776e
uniphier: make NAND controller base address configurable
The next SoC does not support the NAND controller, but make the base address configurable for consistency and future proof.
Change-Id: I776e43ff2b0408577919b0b72849c3e1e5ce0758 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 070dcbf5 | 03-Feb-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make eMMC controller base address configurable
The next SoC supports the same eMMC controller, but the register base will be changed. Make it configurable.
Change-Id: I00cb5531bc3d8d49357
uniphier: make eMMC controller base address configurable
The next SoC supports the same eMMC controller, but the register base will be changed. Make it configurable.
Change-Id: I00cb5531bc3d8d49357ad5e922cdd3d785355edf Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 21c4f56f | 11-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "lm/fconf" into integration
* changes: arm-io: Panic in case of io setup failure MISRA fix: Use boolean essential type fconf: Add documentation fconf: Move platform
Merge changes from topic "lm/fconf" into integration
* changes: arm-io: Panic in case of io setup failure MISRA fix: Use boolean essential type fconf: Add documentation fconf: Move platform io policies into fconf fconf: Add mbedtls shared heap as property fconf: Add TBBR disable_authentication property fconf: Add dynamic config DTBs info as property fconf: Populate properties from dtb during bl2 setup fconf: Load config dtb from bl1 fconf: initial commit
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| 698e231d | 11-Feb-2020 |
Max Shvetsov <maksims.svecovs@arm.com> |
Fixes ROTPK hash generation for ECDSA encryption
Forced hash generation used to always generate hash via RSA encryption. This patch changes encryption based on ARM_ROTPK_LOCATION. Also removes setti
Fixes ROTPK hash generation for ECDSA encryption
Forced hash generation used to always generate hash via RSA encryption. This patch changes encryption based on ARM_ROTPK_LOCATION. Also removes setting KEY_ALG based on ARM_ROTPL_LOCATION - there is no relation between these two.
Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: Id727d2ed06176a243719fd0adfa0cae26c325005
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| 63aa4094 | 11-Feb-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "spmd" into integration
* changes: SPMD: enable SPM dispatcher support SPMD: hook SPMD into standard services framework SPMD: add SPM dispatcher based upon SPCI Beta 0
Merge changes from topic "spmd" into integration
* changes: SPMD: enable SPM dispatcher support SPMD: hook SPMD into standard services framework SPMD: add SPM dispatcher based upon SPCI Beta 0 spec SPMD: add support to run BL32 in TDRAM and BL31 in secure DRAM on Arm FVP SPMD: add support for an example SPM core manifest SPMD: add SPCI Beta 0 specification header file
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| 513b6165 | 10-Feb-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "coverity: Fix MISRA null pointer violations" into integration |
| c8e0f950 | 10-Feb-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Make PAC demangling more generic" into integration |
| 82ed37ee | 10-Feb-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "SPM: modify sptool to generate individual SP blobs" into integration |
| ea25ce90 | 10-Feb-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fvp: Slightly Bump the stack size for bl1 and bl2" into integration |
| 65f6c3e9 | 10-Feb-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "amlogic/axg" into integration
* changes: amlogic: axg: Add a build flag when using ATOS as BL32 amlogic: axg: Add support for the A113D (AXG) platform |
| c3fb00d9 | 11-Oct-2019 |
Achin Gupta <achin.gupta@arm.com> |
SPMD: enable SPM dispatcher support
This patch adds support to the build system to include support for the SPM dispatcher when the SPD configuration option is spmd.
Signed-off-by: Achin Gupta <achi
SPMD: enable SPM dispatcher support
This patch adds support to the build system to include support for the SPM dispatcher when the SPD configuration option is spmd.
Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: Ic1ae50ecd7403fcbcf1d318abdbd6ebdc642f732
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