| 9c1a6f4e | 23-Apr-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "spm: Normalize the style of spm core manifest" into integration |
| d7b5f026 | 31-Mar-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
spm: Normalize the style of spm core manifest
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Change-Id: Ib39e53eb53521b8651fb30b7bf0058f7669569d5 |
| 5a726a5d | 06-Apr-2020 |
Aditya Angadi <aditya.angadi@arm.com> |
board/rddanielxlr: add support for rd-daniel config-xlr platform
RD-Daniel Config-XLR platform has four identical chips connected via a
high speed coherent CCIX link. Each chip has four Neoverse cor
board/rddanielxlr: add support for rd-daniel config-xlr platform
RD-Daniel Config-XLR platform has four identical chips connected via a
high speed coherent CCIX link. Each chip has four Neoverse cores
connected via coherent CMN interconnect.
Change-Id: I37d1b91f2b6ba08f61c64d0288bc16a429836c08
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 62b56a72 | 22-Apr-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fdts: a5ds: Fix for the system timer issue." into integration |
| fe4fa94e | 21-Apr-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "doc: Treat Sphinx warnings as errors" into integration |
| 8b815a4e | 17-Apr-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Treat Sphinx warnings as errors
'make doc' will now fail if Sphinx outputs any warning messages during
documentation generation.
Change-Id: I3e466af58ccf29b14a7e61037539b79ab6fc6037
Signed-off
doc: Treat Sphinx warnings as errors
'make doc' will now fail if Sphinx outputs any warning messages during
documentation generation.
Change-Id: I3e466af58ccf29b14a7e61037539b79ab6fc6037
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 8ff55a9e | 20-Apr-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Incrementing the minor version to reflect upcoming v2.3 release" into integration |
| eca80334 | 20-Apr-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Incrementing the minor version to reflect upcoming v2.3 release
Change-Id: I27f7d92988fc16f68041c2ddaa8dd3a60362ddd1
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
| e3c152d1 | 17-Apr-2020 |
lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com> |
fdts: a5ds: Fix for the system timer issue.
A5DS FPGA system timer clock frequency is 7.5Mhz.
The dt is file updated inline with the hardware
clock frequency.
Change-Id: I3f6c2e0d4a7b293175a42cf398
fdts: a5ds: Fix for the system timer issue.
A5DS FPGA system timer clock frequency is 7.5Mhz.
The dt is file updated inline with the hardware
clock frequency.
Change-Id: I3f6c2e0d4a7b293175a42cf398a8730448504af9
Signed-off-by: lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com>
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|
| 6428938f | 17-Apr-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "juno/sgm: Align SCP_BL2 to page boundary" into integration |
| e822372a | 17-Apr-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "doc: Fixup some SMCCC links" into integration |
| 868a7d1e | 17-Apr-2020 |
Chris Kay <chris.kay@arm.com> |
juno/sgm: Align SCP_BL2 to page boundary
This commit fixes an assertion that was triggering in certain contexts:
ERROR: mmap_add_region_check() failed. error -22
ASSERT: lib/xlat_tables_v2/
juno/sgm: Align SCP_BL2 to page boundary
This commit fixes an assertion that was triggering in certain contexts:
ERROR: mmap_add_region_check() failed. error -22
ASSERT: lib/xlat_tables_v2/xlat_tables_core.c:790
Change-Id: Ia55b3fb4f496c8cd791ea6093d122edae0a7e92a
Signed-off-by: Chris Kay <chris.kay@arm.com>
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 71ac931f | 17-Apr-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Fixup some SMCCC links
This is a fixup for patch 3ba55a3c5fa260c9218be1adff8f39fc2a568d68
("docs: Update SMCCC doc, other changes for release"), where some
links names got changed but their ref
doc: Fixup some SMCCC links
This is a fixup for patch 3ba55a3c5fa260c9218be1adff8f39fc2a568d68
("docs: Update SMCCC doc, other changes for release"), where some
links names got changed but their references didn't.
Change-Id: I980d04dde338f3539a2ec1ae2e807440587b1cf5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 6e186332 | 17-Apr-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "doc: Set fconf as experimental feature" into integration |
| 89a16e8f | 16-Apr-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "docs: Update SMCCC doc, other changes for release" into integration |
| f9b546f6 | 16-Apr-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "docs: Updating Change log for v2.3 Release" into integration |
| c2c150e7 | 09-Apr-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
doc: Set fconf as experimental feature
Following the messages on the mailing list regarding the possible issue around
reading DTB's information, we decided to flag the fconf feature as experimental.
doc: Set fconf as experimental feature
Following the messages on the mailing list regarding the possible issue around
reading DTB's information, we decided to flag the fconf feature as experimental.
A uniform approach should be used to handle properties miss and DTB validation.
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Change-Id: Ib3c86e81fb2e89452c593f68d825d3d8f505e1fb
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| 4204e074 | 14-Apr-2020 |
laurenw-arm <lauren.wehrmeister@arm.com> |
docs: Updating Change log for v2.3 Release
Updating the change log for the v2.3 release and the upcoming change log
template for v2.4 release.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@
docs: Updating Change log for v2.3 Release
Updating the change log for the v2.3 release and the upcoming change log
template for v2.4 release.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ice875d3c93227069738a429d4b945512af8470e9
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|
| 3ba55a3c | 16-Apr-2020 |
laurenw-arm <lauren.wehrmeister@arm.com> |
docs: Update SMCCC doc, other changes for release
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ie842d6a9919776de151a4e9304f870aede07c47a |
| 7a684041 | 16-Apr-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "docs: Fixes and updates for the v2.3 release" into integration |
| c55f4cfb | 16-Apr-2020 |
joanna.farley <joanna.farley@arm.com> |
Merge "docs: Updating Release information for v2.4" into integration |
| 495553d5 | 15-Apr-2020 |
laurenw-arm <lauren.wehrmeister@arm.com> |
docs: Fixes and updates for the v2.3 release
A small set of misc changes to ensure correctness before the v2.3
release.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I5b
docs: Fixes and updates for the v2.3 release
A small set of misc changes to ensure correctness before the v2.3
release.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I5b4e35b3b46616df0453cecff61f5a414951cd62
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|
| 3056819b | 15-Apr-2020 |
laurenw-arm <lauren.wehrmeister@arm.com> |
docs: Updating Release information for v2.4
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I5a7ae778999295f3453b7ab0bfc26351e545fb8f |
| 9cf7f355 | 30-Oct-2019 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Provide a hint to power controller for DSU cluster power down
By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all
Provide a hint to power controller for DSU cluster power down
By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all cores are powered down.
The AArch32 CLUSTERPWRDN register is architecturally mapped to the
AArch64 CLUSTERPWRDN_EL1 register
Change-Id: Ie6e67c1c7d811fa25c51e2e405ca7f59bd20c81b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| cc52800d | 15-Apr-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "plat/arm/sgi: update mmap and xlat count" into integration |