History log of /rk3399_ARM-atf/ (Results 1126 – 1150 of 18586)
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c2fa83f921-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "feat(mt8189): add thermal driver support" into integration

c76b118321-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "fix(mt8189): remove unused SPM definitions and files" into integration

9029408019-Aug-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

feat(versal2): remove handoff entry from tl

In Versal Gen 2, handoff passing mechanism is via transfer list.
Transfer list is packaged with handoff addresses of BL32, BL33 along
with DT blob as part

feat(versal2): remove handoff entry from tl

In Versal Gen 2, handoff passing mechanism is via transfer list.
Transfer list is packaged with handoff addresses of BL32, BL33 along
with DT blob as part of it.
Once TF-A process the hand off details, rest of the components
(primarily U-Boot) should not parse these details at non-secure world.

Post retrieval of handoff information, remove entry point structures
catering to OP-TEE and U-Boot.

Change-Id: Ia5ace44de68721dc73f29a07b1e79a9c97e4122a
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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9fc5866a20-Aug-2025 Kun Lu <kun.lu@mediatek.corp-partner.google.com>

fix(mt8189): remove unused SPM definitions and files

Remove unused SPM definitions and files to fix the coverity failure.

1. Remove PMIC_GS_DUMP_VER.
2. Remove CONFIG_MTK_VCOREDVFS_SUPPOR

Signed-o

fix(mt8189): remove unused SPM definitions and files

Remove unused SPM definitions and files to fix the coverity failure.

1. Remove PMIC_GS_DUMP_VER.
2. Remove CONFIG_MTK_VCOREDVFS_SUPPOR

Signed-off-by: Kun Lu <kun.lu@mediatek.com>
Change-Id: I61ff4aa847bf1399b080a3c6ddecf0e3cdcbd724

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efc1931f20-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "fix(cpus): correct alto library" into integration

da81d45d19-Aug-2025 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

fix(simd): enforce FP regs context mgmt when SVE regs are enabled

Due to architectural dependency, FP register context management
needs to be enabled when SVE register context management is enabled.

fix(simd): enforce FP regs context mgmt when SVE regs are enabled

Due to architectural dependency, FP register context management
needs to be enabled when SVE register context management is enabled.
This patch adds a make-time constraint for the same.

Change-Id: I8ae52edcb10085105c6e0c5504f427093059f50d
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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ef80b7a211-Aug-2025 Jit Loon Lim <jit.loon.lim@altera.com>

fix(intel): correct condition to process unused entries

A logic error in the response queue handling caused available
entries to be skipped after an upstream change inverted the
flag check. This fix

fix(intel): correct condition to process unused entries

A logic error in the response queue handling caused available
entries to be skipped after an upstream change inverted the
flag check. This fix restores the intended logic so that unused
response slots are correctly detected and processed.

Change-Id: I253f098573c3c84dc43f48cff893c410684322a2
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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f1b1fae917-Jun-2025 Jit Loon Lim <jit.loon.lim@altera.com>

fix(intel): iossm v2 enhancement refactor

This patch is to used to update iossm v2 enhancement.
The major change is to replace io_mb_req to
mmio_read.
Next is to refactor the code.

Change-Id: Id084

fix(intel): iossm v2 enhancement refactor

This patch is to used to update iossm v2 enhancement.
The major change is to replace io_mb_req to
mmio_read.
Next is to refactor the code.

Change-Id: Id0842392f362e30252f1ac9f32797d8d3a419997
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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30bbc4fa14-Aug-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(drtm): remove plat_system_reset()

The name plat_system_reset() has been in use for some time by a mediatek
platform (in plat/mediatek/mt8173/plat_pm.c). However, DRTM added a
global hook, that i

fix(drtm): remove plat_system_reset()

The name plat_system_reset() has been in use for some time by a mediatek
platform (in plat/mediatek/mt8173/plat_pm.c). However, DRTM added a
global hook, that is only implemented on FVP, that conflicts with it.
This sometimes results in failed builds.

DRTM remediation ends with a platform reset. However, there is currently
an error message printed that this is not supported. In this case, the
correct thing to do is to panic and as such this hook is not needed.

Further, the correct sequence to reset the system is different and is
only fully implemented by psci_system_reset(). This is a portable
implementation supported by a wide variety of platform.

So remove plat_system_reset(). Once DRTM remediation properly supports
resetting, the psci_system_reset() function should be used to achieve
reset correctly and portably.

Change-Id: Ia4e150c51aeec613838464fbb0e1d0542f19ccab
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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71f7a36318-Aug-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(aarch32): make get_cpu_ops_ptr() PCS compliant

The get_cpu_ops_ptr() function gets called from C (mainly in errata
reporting) but it is not PCS compliant - it clobbers r4 and r5. This
doesn't us

fix(aarch32): make get_cpu_ops_ptr() PCS compliant

The get_cpu_ops_ptr() function gets called from C (mainly in errata
reporting) but it is not PCS compliant - it clobbers r4 and r5. This
doesn't usually cause any problems, but if the stars align it blows up.

Convert the heart of the function to a non-PCS compliant macro that can
be invoked in the early entrypoint code and change the get_cpu_ops_ptr()
to a PCS compliant wrapper for calling into C. Additionally, the
resultant inlining in the entrypoint will lead to a tiny performance
bump due to the one fewer jump to an uncached memory location.

Change-Id: I7f3b50e56a1288d2a8136a7b8c01544bab19c57b
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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15954e7d20-Aug-2025 Chris Kay <chris.kay@arm.com>

Merge "fix(trng): avoid undefined behaviour in pack_entropy" into integration

1363096623-May-2025 Mahesh Rao <mahesh.rao@altera.com>

fix(intel): add missing cache flush operation for hmac

Add missing cache flush operation for HMAC verify
operation.Also update the code to query the correct
buffer for the final result of HMAC veri

fix(intel): add missing cache flush operation for hmac

Add missing cache flush operation for HMAC verify
operation.Also update the code to query the correct
buffer for the final result of HMAC verify operation.

Change-Id: I85208765313b9048cfef13727d280dca8af6d548
Signed-off-by: Mahesh Rao <mahesh.rao@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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6715022719-Aug-2025 Mark Dykes <mark.dykes@arm.com>

Merge "fix(psci): initialize the variables" into integration

0dfcf61e19-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "fix(optee): allow opteed_handle_smc_load to handle 64-bit data_pa" into integration

60a15d6319-Aug-2025 Mark Dykes <mark.dykes@arm.com>

Merge "fix(intel): select the DFI interface based on the hand-off data" into integration

4348393219-Aug-2025 Arvind Ram Prakash <arvind.ramprakash@arm.com>

fix(cpus): correct alto library

Powerdown handling is updated to reflect powerdown
abandon changes and incorrect error message has been fixed.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@a

fix(cpus): correct alto library

Powerdown handling is updated to reflect powerdown
abandon changes and incorrect error message has been fixed.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I7d33542c13c52e74261937f96327951c0116fbd1

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ab5cbea619-Aug-2025 Mark Dykes <mark.dykes@arm.com>

Merge "fix(intel): set BIT2 of system manager MPFE Interface Select" into integration

6d36b69919-Aug-2025 Mark Dykes <mark.dykes@arm.com>

Merge "fix(intel): flush the mailbox response buffer in SiPSVC V3" into integration

b3555f1214-Aug-2025 Prasad Kummari <prasad.kummari@amd.com>

fix(versal2): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to
pl011, regardless of the user-specified CONSOLE value. This causes a
build requested wi

fix(versal2): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to
pl011, regardless of the user-specified CONSOLE value. This causes a
build requested with CONSOLE=pl011_1 to register both pl011_1 and
pl011 as boot and runtime consoles. If the hardware is connected only
to UART1, this causes TF-A to hang when UART0 is selected as the
runtime console, since it waits indefinitely on the transmit FIFO.
The fix ensures that, in a DEBUG build, CONSOLE_RUNTIME defaults to
the same value as CONSOLE.

Change-Id: I2e29d5b77c43aa65f58224d226683f4a8d94271a
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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18283e6d14-Aug-2025 Prasad Kummari <prasad.kummari@amd.com>

fix(versal-net): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to
pl011, regardless of the user-specified VERSAL_NET_CONSOLE value.
This causes a buil

fix(versal-net): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to
pl011, regardless of the user-specified VERSAL_NET_CONSOLE value.
This causes a build requested with VERSAL_NET_CONSOLE=pl011_1 to
register both pl011_1 and pl011 as boot and runtime consoles. If the
hardware is connected only to UART1, this causes TF-A to hang when
UART0 is selected as the runtime console, since it waits indefinitely
on the transmit FIFO. The fix ensures that, in a DEBUG build,
CONSOLE_RUNTIME defaults to the same value as VERSAL_NET_CONSOLE.

Change-Id: Icad043a61f9d90480a8aceab701a5791d26e3d70
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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0701792f12-Aug-2025 Prasad Kummari <prasad.kummari@amd.com>

fix(versal): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to
pl011, regardless of the user-specified VERSAL_CONSOLE value. This
causes a build reques

fix(versal): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to
pl011, regardless of the user-specified VERSAL_CONSOLE value. This
causes a build requested with VERSAL_CONSOLE=pl011_1 to register both
pl011_1 and pl011 as boot and runtime consoles. If the hardware is
connected only to UART1, this causes TF-A to hang when UART0 is
selected as the runtime console, since it waits indefinitely on the
transmit FIFO. The fix ensures that, in a DEBUG build, CONSOLE_RUNTIME
defaults to the same value as VERSAL_CONSOLE.

Change-Id: I7aeedb04040ea4ab4b8aecde98af5cc39df09c1a
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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2546350314-Aug-2025 Prasad Kummari <prasad.kummari@amd.com>

fix(zynqmp): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME
to cadence1, regardless of the user-specified ZYNQMP_CONSOLE value.
This causes a build req

fix(zynqmp): runtime console in debug mode

Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME
to cadence1, regardless of the user-specified ZYNQMP_CONSOLE value.
This causes a build requested with ZYNQMP_CONSOLE= cadence1 to
register both cadence1 and cadence as boot and runtime consoles.
If the hardware is connected only to UART1, this causes TF-A to hang
when UART0 is selected as the runtime console, since it waits
indefinitely on the transmit FIFO. The fix ensures that, in a DEBUG
build, CONSOLE_RUNTIME defaults to the same value as ZYNQMP_CONSOLE.

Change-Id: Ieff6adf4c6c30e07b8c7309c4835dcb32dcf9373
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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9232d3f224-Jul-2025 Xialin Liu <xialin.liu@arm.com>

feat(drtm): remove todo that is implemented

The PE state is set in compliance with the PSCI specification.
The general purpose registers are reset, the PC is set to the
entry point, the SPSR registe

feat(drtm): remove todo that is implemented

The PE state is set in compliance with the PSCI specification.
The general purpose registers are reset, the PC is set to the
entry point, the SPSR register is set. The todo can be removed
as the PE state is set appropriately.

Change-Id: Ib41bbf119e6175a11b37f07fe3df9e81fe10b5f6
Signed-off-by: Xialin Liu <xialin.liu@arm.com>

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b37872f519-Aug-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge "feat(juno): increase MAX_XLAT_TABLES for SPMC_AT_EL3" into integration

f2db4ebc13-Aug-2025 Jamie Fox <jamiefox@google.com>

fix(trng): avoid undefined behaviour in pack_entropy

When nbits is a multiple of the word size, the pack_entropy function
right shifts the mask by the type width, which is undefined. In
practice, th

fix(trng): avoid undefined behaviour in pack_entropy

When nbits is a multiple of the word size, the pack_entropy function
right shifts the mask by the type width, which is undefined. In
practice, the 64-bit shift compiles to a no-op and the implementation
depends on this behaviour, so this patch changes the function to skip
the masking if nbits is multiple of the word size.

Change-Id: I478b8102aae0a1d49182e7a8a55f70fd9438b9f9
Signed-off-by: Jamie Fox <jamiefox@google.com>

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