Merge "drivers/stm32_hash: register resources as secure or not" into integration

Merge "drivers/stm32_gpio: register GPIO resources as secure or not" into integration

Merge "drivers/stm32_iwdg: register IWDG resources as secure or not" into integration

Merge "drivers/stm32mp_pmic: register PMIC resources as secure or not" into integration

Merge "stm32mp1: register shared resource per GPIO bank/pin" into integration

Merge "stm32mp1: register shared resource per IOMEM address" into integration

Merge "stm32mp1: allow non-secure access to reset upon periph registration" into integration

Merge "stm32mp1: allow non-secure access to clocks upon periph registration" into integration

Merge "stm32mp1: shared resources: peripheral registering" into integration

Merge "drivers: st: clock: register parent of secure clocks" into integration

Merge "stm32mp1: shared resources: add trace messages" into integration

Merge "fiptool: return zero status on help and help <command>" into integration

Merge changes from topic "fpga_cmdline" into integration

* changes:
arm_fpga: Predefine DTB and BL33 load addresses
arm_fpga: Add Klein and Matterhorn support
arm_fpga: Support more CPU cluste

Merge changes from topic "fpga_cmdline" into integration

* changes:
arm_fpga: Predefine DTB and BL33 load addresses
arm_fpga: Add Klein and Matterhorn support
arm_fpga: Support more CPU clusters

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TF-A: Redefine true/false definitions

This patch redefines 'true' and 'false' definitions in
'include/lib/libc/stdbool.h' to fix defect reported by
MISRA C-2012 Rule 10.1
"The expression \"0\" of no

TF-A: Redefine true/false definitions

This patch redefines 'true' and 'false' definitions in
'include/lib/libc/stdbool.h' to fix defect reported by
MISRA C-2012 Rule 10.1
"The expression \"0\" of non-boolean essential type is
being interpreted as a boolean value for the operator \"? :\"."

Change-Id: Ie1b16e5826e5427cc272bd753e15d4d283e1ee4c
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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Merge "io_storage: remove redundant assigments" into integration

Merge "SPMD: fix boundary check if manifest is page aligned" into integration

SPMD: fix boundary check if manifest is page aligned

while mapping SPMC manifest page in the SPMD translation regime the
mapped size was resolved to zero if SPMC manifest base address is PAGE
aligne

SPMD: fix boundary check if manifest is page aligned

while mapping SPMC manifest page in the SPMD translation regime the
mapped size was resolved to zero if SPMC manifest base address is PAGE
aligned, causing SPMD to abort.

To fix the problem change mapped size to PAGE_SIZE if manifest base is
PAGE aligned.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I06cd39dbefaf492682d9bbb0c82b950dd31fb416

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Merge "Add myself and Andre Przywara as code owners for the Arm FPGA platform port" into integration

Merge "plat/arm: Fix build failure due to increase in BL2 size" into integration

driver: brcm: add RNG driver

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Change-Id: I490d7e4d49bd9f5a62d343a264a1e14c2066ceca

plat/brcm: Define RNG base address

Change-Id: I4f5efcd7638a25c317382b51f05e6b9aa283d068
Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>

io_fip: return -ENFILE when a file is already open

The cause of failure is not memory shortage.

The comment for ENFILE in include/lib/libc/errno.h

/* Too many open files in system */

... is a b

io_fip: return -ENFILE when a file is already open

The cause of failure is not memory shortage.

The comment for ENFILE in include/lib/libc/errno.h

/* Too many open files in system */

... is a better match to the warning message here.

Change-Id: I45a1740995d464edd8b3e32b93f1f92ba17e5874
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge changes I9feae1fc,I5cbe7192,I1867ece3,I85c2434a,If8edeeec, ... into integration

* changes:
plat: marvell: armada: mcbin: squash several IO windows into one
plat: marvell: armada: fix BL32

Merge changes I9feae1fc,I5cbe7192,I1867ece3,I85c2434a,If8edeeec, ... into integration

* changes:
plat: marvell: armada: mcbin: squash several IO windows into one
plat: marvell: armada: fix BL32 extra parameters usage
drivers: marvell: Fix the LLC SRAM driver
plat: marvell: armada: a8k: change CCU LLC SRAM mapping
plat: marvell: armada: adjust trusted DRAM size to match OP-TEE OS
drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW
plat: marvell: armada: move mg conf related code to appropriate driver
marvell: comphy: start AP FW when comphy AP mode selected
drivers: marvell: mg_conf_cm3: add basic driver
tools: doimage: change the binary image alignment to 16
tools: doimage: migrate to mbedtls v2.8 APIs

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Add myself and Andre Przywara as code owners for the Arm FPGA platform port

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I6d3949a971fada5a086b788dbe274f8451fcfc0d

plat/arm: Fix build failure due to increase in BL2 size

BL2 size gets increased due to the libfdt library update and
that eventually cause no-optimization build failure for BL2 as below:
aarch64-no

plat/arm: Fix build failure due to increase in BL2 size

BL2 size gets increased due to the libfdt library update and
that eventually cause no-optimization build failure for BL2 as below:
aarch64-none-elf-ld.bfd: BL2 image has exceeded its limit.
aarch64-none-elf-ld.bfd: region `RAM' overflowed by 4096 bytes
Makefile:1070: recipe for target 'build/fvp/debug/bl2/bl2.elf' failed
make: *** [build/fvp/debug/bl2/bl2.elf] Error 1

Fixed build failure by increasing BL2 image size limit by 4Kb.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I92a57eb4db601561a98e254b64994bb921a88db3

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